From patchwork Mon Mar 2 14:06:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 11415673 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74F0492A for ; Mon, 2 Mar 2020 14:07:44 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B79621556 for ; Mon, 2 Mar 2020 14:07:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5B79621556 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1j8liS-00037O-LB; Mon, 02 Mar 2020 14:06:40 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1j8liR-00037E-8A for xen-devel@lists.xenproject.org; Mon, 02 Mar 2020 14:06:39 +0000 X-Inumbo-ID: 087a873c-5c8f-11ea-9f80-12813bfff9fa Received: from mx2.suse.de (unknown [195.135.220.15]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 087a873c-5c8f-11ea-9f80-12813bfff9fa; Mon, 02 Mar 2020 14:06:38 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id BFFA8AEB8 for ; Mon, 2 Mar 2020 14:06:37 +0000 (UTC) From: Jan Beulich To: "xen-devel@lists.xenproject.org" References: <9687cc05-d3f5-c139-bbc4-a3eb05afdbea@suse.com> Message-ID: Date: Mon, 2 Mar 2020 15:06:36 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <9687cc05-d3f5-c139-bbc4-a3eb05afdbea@suse.com> Content-Language: en-US Subject: [Xen-devel] [PATCH 1/2] x86/mce: add Xeon Icelake to list of CPUs that support PPIN X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Tony Luck New CPU model, same MSRs to control and read the inventory number. Signed-off-by: Tony Luck [Linux commit dc6b025de95bcd22ff37c4fabb022ec8a027abf1] Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -871,6 +871,7 @@ static void intel_init_ppin(const struct case 0x55: /* Skylake X */ case 0x56: /* Broadwell Xeon D */ case 0x57: /* Knights Landing */ + case 0x6a: /* Icelake X */ case 0x85: /* Knights Mill */ if ( (c != &boot_cpu_data && !ppin_msr) ||