diff mbox series

[XEN,v2,4/5] x86/intel: optional build of intel.c

Message ID ce06eff2060c94ebf659d11f7390c577a3c6a24e.1723806405.git.Sergiy_Kibrik@epam.com (mailing list archive)
State New
Headers show
Series x86/CPU: optional build of Intel/AMD CPUs support | expand

Commit Message

Sergiy Kibrik Aug. 16, 2024, 11:17 a.m. UTC 
With specific config option INTEL in place and most of the code that depends
on intel.c now can be optionally enabled/disabled it's now possible to put
the whole intel.c under INTEL option as well. This will allow for a Xen build
without Intel CPU support.

Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com>
CC: Alejandro Vallejo <alejandro.vallejo@cloud.com>
CC: Jan Beulich <jbeulich@suse.com>
---
changes in v2:
  - drop set_in_mcu_opt_ctrl() stub
---
 xen/arch/x86/cpu/Makefile            | 4 ++--
 xen/arch/x86/cpu/common.c            | 2 ++
 xen/arch/x86/include/asm/processor.h | 3 ++-
 3 files changed, 6 insertions(+), 3 deletions(-)

Comments

Jan Beulich Aug. 19, 2024, 12:31 p.m. UTC | #1 
On 16.08.2024 13:17, Sergiy Kibrik wrote:
> With specific config option INTEL in place and most of the code that depends
> on intel.c now can be optionally enabled/disabled it's now possible to put
> the whole intel.c under INTEL option as well. This will allow for a Xen build
> without Intel CPU support.
> 
> Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com>

Acked-by: Jan Beulich <jbeulich@suse.com>
diff mbox series

Patch

diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile
index 80739d0256..eeb9ebe562 100644
--- a/xen/arch/x86/cpu/Makefile
+++ b/xen/arch/x86/cpu/Makefile
@@ -6,8 +6,8 @@  obj-y += amd.o
 obj-$(CONFIG_CENTAUR) += centaur.o
 obj-y += common.o
 obj-$(CONFIG_HYGON) += hygon.o
-obj-y += intel.o
-obj-y += intel_cacheinfo.o
+obj-$(CONFIG_INTEL) += intel.o
+obj-$(CONFIG_INTEL) += intel_cacheinfo.o
 obj-y += mwait-idle.o
 obj-$(CONFIG_SHANGHAI) += shanghai.o
 obj-y += vpmu.o
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index dcc2753212..580b01d6d5 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -336,8 +336,10 @@  void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
+#ifdef CONFIG_INTEL
 	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
 				  actual_cpu = intel_cpu_dev;    break;
+#endif
 	case X86_VENDOR_AMD:      actual_cpu = amd_cpu_dev;      break;
 #ifdef CONFIG_CENTAUR
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h
index 66463f6a6d..a52f8b0a83 100644
--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -507,13 +507,14 @@  static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model,
 extern int8_t opt_tsx;
 extern bool rtm_disabled;
 void tsx_init(void);
+void update_mcu_opt_ctrl(void);
 #else
 #define opt_tsx      0     /* explicitly indicate TSX is off */
 #define rtm_disabled false /* RTM was not force-disabled */
 static inline void tsx_init(void) {}
+static inline void update_mcu_opt_ctrl(void) {}
 #endif
 
-void update_mcu_opt_ctrl(void);
 void set_in_mcu_opt_ctrl(uint32_t mask, uint32_t val);
 
 enum ap_boot_method {