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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5334c75a2cbsm18101e87.187.2024.08.21.09.06.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Aug 2024 09:06:21 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4faece5b-5fd7-11ef-a508-bb4a2ccca743 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724256382; x=1724861182; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SUWnXdeASKM3s0vW7zMmdmova3lTcgmrVyUhj9D0sEQ=; b=m3j2xzRBYQz51sLqUih/NTDVf7/NSsJ4rTInJQ+Xarmkb191UgxucZ6zubyv98539m k3Ci529XmK335nFBOKLyXW71ZvUO+Y/PbnCyUnlZ5V28/dnnfWGHeotiiDFySHfmUxJ3 ioon6H4CjXdmnA96y1veJzJkSj/rTqS/a1Tw0EjhnQqu6y6OMXoZ3tPk3ZxKws3zBEP7 pg5rhlLuDuWxbiCK9//STWouHkc/+OtQM+1GTtddza0nGf99BoPKQJpdThXM6S2dGaS9 UsEACwAeW+Vh9ND5A/kBf31WcY11ecezUdDFQtTQdd2CnG+bjAdGWv4hHG/ria1shKxX DMsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724256382; x=1724861182; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SUWnXdeASKM3s0vW7zMmdmova3lTcgmrVyUhj9D0sEQ=; b=lFDWd91FTkydXbgFtvEdgBjs/TsDUgoizTpJDqMr45HMK76vODA1tRuhC+j1WwyhAT XyFCyOmtWZhuy4+74LPtT8bEubyKvF18ClvL32CcCAZypQiE1cJNVKfbfPVu4ebrCk2M vc1VhGbw7JPYLjaSKVloZLAccUg3U6EDsNelJMj90M7FXg04lt3bg7IBYZAMTMPdCx6f +dLFMVF1sMDPniV4Dv5YkbfTgKP+zVa6ElBVh2C47rnkabojKYoEJV8zDf7P0wgyNKXF g1rvy0vOnH0neFpG+G4LXBlEIDEuQ2LaNZUNmJ2HrvbDbvdgtJ20EYIeWk/NU3358p6p Sk8g== X-Gm-Message-State: AOJu0YxAWxEUpL1sHLG1iG/x/Rgu7NhuoCdz0ohTqArKH16EooM75O4V d9eV/iFK8tzf7v5Gj1cTawt11updnoyqZ5OFG57fzHeQhi/9juP5pIAzYQ== X-Google-Smtp-Source: AGHT+IGly+3FqelWmnfZ4T6w26becCVTPBLUHuQXOh7Aci+pcMZxXbsLZRWwPuwV0jnSTRkjQ9mktg== X-Received: by 2002:a05:6512:1115:b0:52b:aae0:2d41 with SMTP id 2adb3069b0e04-5334caa4b27mr41128e87.28.1724256381689; Wed, 21 Aug 2024 09:06:21 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Jan Beulich , Julien Grall , Stefano Stabellini Subject: [PATCH v5 3/7] xen/riscv: introduce asm/pmap.h header Date: Wed, 21 Aug 2024 18:06:12 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: MIME-Version: 1.0 Introduce arch_pmap_{un}map functions and select HAS_PMAP for CONFIG_RISCV. Add pte_from_mfn() for use in arch_pmap_map(). Introduce flush_xen_tlb_one_local() and use it in arch_pmap_{un}map(). Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in V5: - Add Reviewed-by: Jan Beulich . - Fix a typo in "Changes in V4": - "drop flush_xen_tlb_range_va_local() as it isn't used in this patch" -> "drop flush_xen_tlb_range_va() as it isn't used in this patch" - "s/flush_xen_tlb_range_va_local/flush_tlb_range_va_local" -> "s/flush_xen_tlb_one_local/flush_tlb_one_local" --- Changes in V4: - mark arch_pmap_{un}map() as __init: documentation purpose and a necessary (but not sufficient) condition here, to validly use local TLB flushes only. - add flush_xen_tlb_one_local() to arch_pmap_map() as absense of "negative" TLB entrues will be guaranted only in the case when Svvptc extension is present. - s/mfn_from_pte/pte_from_mfn - drop mfn_to_xen_entry() as pte_from_mfn() does the same thing - add flags argument to pte_from_mfn(). - update the commit message. - drop flush_xen_tlb_range_va() as it isn't used in this patch - s/flush_xen_tlb_one_local/flush_tlb_one_local --- Changes in V3: - rename argument of function mfn_to_xen_entry(..., attr -> flags ). - update the code of mfn_to_xen_entry() to use flags argument. - add blank in mfn_from_pte() in return line. - introduce flush_xen_tlb_range_va_local() and use it inside arch_pmap_{un}map(). - s/__ASM_PMAP_H__/ASM_PMAP_H - add SPDX-License-Identifier: GPL-2.0 --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/include/asm/flushtlb.h | 6 +++++ xen/arch/riscv/include/asm/page.h | 6 +++++ xen/arch/riscv/include/asm/pmap.h | 36 +++++++++++++++++++++++++++ 4 files changed, 49 insertions(+) create mode 100644 xen/arch/riscv/include/asm/pmap.h diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 259eea8d3b..0112aa8778 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -3,6 +3,7 @@ config RISCV select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME select HAS_DEVICE_TREE + select HAS_PMAP config RISCV_64 def_bool y diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index 7ce32bea0b..f4a735fd6c 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -5,6 +5,12 @@ #include #include +/* Flush TLB of local processor for address va. */ +static inline void flush_tlb_one_local(vaddr_t va) +{ + asm volatile ( "sfence.vma %0" :: "r" (va) : "memory" ); +} + /* * Filter the given set of CPUs, removing those that definitely flushed their * TLB since @page_timestamp. diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index a7419b93b2..55916eaa92 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -94,6 +94,12 @@ static inline pte_t read_pte(pte_t *p) return read_atomic(p); } +static inline pte_t pte_from_mfn(mfn_t mfn, unsigned int flags) +{ + unsigned long pte = (mfn_x(mfn) << PTE_PPN_SHIFT) | flags; + return (pte_t){ .pte = pte }; +} + #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PAGE_H */ diff --git a/xen/arch/riscv/include/asm/pmap.h b/xen/arch/riscv/include/asm/pmap.h new file mode 100644 index 0000000000..60065c996f --- /dev/null +++ b/xen/arch/riscv/include/asm/pmap.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef ASM_PMAP_H +#define ASM_PMAP_H + +#include +#include +#include +#include + +#include +#include +#include + +static inline void __init arch_pmap_map(unsigned int slot, mfn_t mfn) +{ + pte_t *entry = &xen_fixmap[slot]; + pte_t pte; + + ASSERT(!pte_is_valid(*entry)); + + pte = pte_from_mfn(mfn, PAGE_HYPERVISOR_RW); + write_pte(entry, pte); + + flush_tlb_one_local(FIXMAP_ADDR(slot)); +} + +static inline void __init arch_pmap_unmap(unsigned int slot) +{ + pte_t pte = {}; + + write_pte(&xen_fixmap[slot], pte); + + flush_tlb_one_local(FIXMAP_ADDR(slot)); +} + +#endif /* ASM_PMAP_H */