@@ -37,18 +37,6 @@
#define VGA_MEM_BASE 0xa0000
#define VGA_MEM_SIZE 0x20000
-/* force some bits to zero */
-static const uint8_t sr_mask[8] = {
- (uint8_t)~0xfc,
- (uint8_t)~0xc2,
- (uint8_t)~0xf0,
- (uint8_t)~0xc0,
- (uint8_t)~0xf1,
- (uint8_t)~0xff,
- (uint8_t)~0xff,
- (uint8_t)~0x00,
-};
-
static int stdvga_outb(uint64_t addr, uint8_t val)
{
struct hvm_hw_stdvga *s = ¤t->domain->arch.hvm.stdvga;
@@ -60,12 +48,6 @@ static int stdvga_outb(uint64_t addr, ui
s->sr_index = val;
break;
- case 0x3c5: /* sequencer data register */
- rc = (s->sr_index < sizeof(s->sr));
- if ( rc )
- s->sr[s->sr_index] = val & sr_mask[s->sr_index] ;
- break;
-
case 0x3ce: /* graphics address register */
s->gr_index = val;
break;
@@ -112,7 +112,6 @@ struct vpci_arch_msix_entry {
struct hvm_hw_stdvga {
uint8_t sr_index;
- uint8_t sr[8];
uint8_t gr_index;
struct page_info *vram_page[64]; /* shadow of 0xa0000-0xaffff */
spinlock_t lock;