From patchwork Wed Apr 3 12:38:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883597 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3C01139A for ; Wed, 3 Apr 2019 12:39:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DA0B28736 for ; Wed, 3 Apr 2019 12:39:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80D1028751; Wed, 3 Apr 2019 12:39:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DE4928736 for ; Wed, 3 Apr 2019 12:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726615AbfDCMjA (ORCPT ); Wed, 3 Apr 2019 08:39:00 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:39220 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726097AbfDCMjA (ORCPT ); Wed, 3 Apr 2019 08:39:00 -0400 Received: by mail-lj1-f193.google.com with SMTP id l7so14698420ljg.6; Wed, 03 Apr 2019 05:38:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=YuwDeLOu7J+9yvpF4B79wIauJ4Zld+23zPVisqEDNJY=; b=tNnrHkSCfA+djkW/+67x3NoJV9rQNPhFbDkdZvCMVwENvePCStwEB5Rwugjbs9DEOK j3O8dWxQI4esL3VRykbfnV2xbHkVYS16YP0rGXBC9sp2R6RFdVaSKdH3+k3h62HVmoLM uidT9prDYPhMvYuDV5NfIa1eCk1fbuFT7x7X+yL7f6/V9JOjrqyJqGpI/HlupsJusL7e 1iEMVGTpfVfmN6DA0AYFi4wVoIu05W+70REuCQ0mTNBA9pajHm5dF4iIm4uh0SdIZ6L9 RBQFgGKKD/VH2VsWbD8JFVY0vCDKfC/0gsmYG3xrEU/Buz9YkM6Afh0FS/1ip+LmYDbL A39Q== X-Gm-Message-State: APjAAAUjoA32vAg15zPJbvyFDAaAywcs/jsh3sbOUKjIHntV1vvT/AcZ K2tlczm7dYIcVBa+UWarJWI= X-Google-Smtp-Source: APXvYqxckxFH0CkOlcOKe6jD7yQtZeH61n8F4HxdqpZzndegfy7jn9gWoyzy5TJuvylt17uftrTKnw== X-Received: by 2002:a2e:1245:: with SMTP id t66mr42736851lje.18.1554295135775; Wed, 03 Apr 2019 05:38:55 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id u1sm2975011lfm.4.2019.04.03.05.38.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:38:55 -0700 (PDT) Date: Wed, 3 Apr 2019 15:38:40 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 1/8] mfd: regulator: clk: split rohm-bd718x7.h Message-ID: <81d7136a77a2786c122a1cbf3289c96c51ded79f.1554294791.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Split the bd718x7.h to ROHM common and bd718x7 specific parts so that we do not need to add same things in every new ROHM PMIC header. Please note that this change requires changes also in bd718x7 sub-device drivers for regulators and clk. Signed-off-by: Matti Vaittinen Acked-by: Mark Brown Acked-by: Stephen Boyd Acked-for-MFD-by: Lee Jones --- drivers/clk/clk-bd718x7.c | 6 +++--- drivers/mfd/rohm-bd718x7.c | 23 ++++++++++++----------- drivers/regulator/bd718x7-regulator.c | 25 +++++++++++++------------ include/linux/mfd/rohm-bd718x7.h | 22 ++++++++-------------- include/linux/mfd/rohm-generic.h | 20 ++++++++++++++++++++ 5 files changed, 56 insertions(+), 40 deletions(-) create mode 100644 include/linux/mfd/rohm-generic.h diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c index 60422c72d142..461228ebf703 100644 --- a/drivers/clk/clk-bd718x7.c +++ b/drivers/clk/clk-bd718x7.c @@ -17,7 +17,7 @@ struct bd718xx_clk { u8 reg; u8 mask; struct platform_device *pdev; - struct bd718xx *mfd; + struct rohm_regmap_dev *mfd; }; static int bd71837_clk_set(struct clk_hw *hw, int status) @@ -68,7 +68,7 @@ static int bd71837_clk_probe(struct platform_device *pdev) int rval = -ENOMEM; const char *parent_clk; struct device *parent = pdev->dev.parent; - struct bd718xx *mfd = dev_get_drvdata(parent); + struct rohm_regmap_dev *mfd = dev_get_drvdata(parent); struct clk_init_data init = { .name = "bd718xx-32k-out", .ops = &bd71837_clk_ops, @@ -119,5 +119,5 @@ static struct platform_driver bd71837_clk = { module_platform_driver(bd71837_clk); MODULE_AUTHOR("Matti Vaittinen "); -MODULE_DESCRIPTION("BD71837 chip clk driver"); +MODULE_DESCRIPTION("BD71837/BD71847 chip clk driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c index a29d529a96f4..7beb444a57cb 100644 --- a/drivers/mfd/rohm-bd718x7.c +++ b/drivers/mfd/rohm-bd718x7.c @@ -98,18 +98,19 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, return -ENOMEM; bd718xx->chip_irq = i2c->irq; - bd718xx->chip_type = (unsigned int)(uintptr_t) + bd718xx->chip.chip_type = (unsigned int)(uintptr_t) of_device_get_match_data(&i2c->dev); - bd718xx->dev = &i2c->dev; + bd718xx->chip.dev = &i2c->dev; dev_set_drvdata(&i2c->dev, bd718xx); - bd718xx->regmap = devm_regmap_init_i2c(i2c, &bd718xx_regmap_config); - if (IS_ERR(bd718xx->regmap)) { + bd718xx->chip.regmap = devm_regmap_init_i2c(i2c, + &bd718xx_regmap_config); + if (IS_ERR(bd718xx->chip.regmap)) { dev_err(&i2c->dev, "regmap initialization failed\n"); - return PTR_ERR(bd718xx->regmap); + return PTR_ERR(bd718xx->chip.regmap); } - ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->regmap, + ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->chip.regmap, bd718xx->chip_irq, IRQF_ONESHOT, 0, &bd718xx_irq_chip, &bd718xx->irq_data); if (ret) { @@ -118,7 +119,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, } /* Configure short press to 10 milliseconds */ - ret = regmap_update_bits(bd718xx->regmap, + ret = regmap_update_bits(bd718xx->chip.regmap, BD718XX_REG_PWRONCONFIG0, BD718XX_PWRBTN_PRESS_DURATION_MASK, BD718XX_PWRBTN_SHORT_PRESS_10MS); @@ -129,7 +130,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, } /* Configure long press to 10 seconds */ - ret = regmap_update_bits(bd718xx->regmap, + ret = regmap_update_bits(bd718xx->chip.regmap, BD718XX_REG_PWRONCONFIG1, BD718XX_PWRBTN_PRESS_DURATION_MASK, BD718XX_PWRBTN_LONG_PRESS_10S); @@ -149,7 +150,7 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, button.irq = ret; - ret = devm_mfd_add_devices(bd718xx->dev, PLATFORM_DEVID_AUTO, + ret = devm_mfd_add_devices(bd718xx->chip.dev, PLATFORM_DEVID_AUTO, bd718xx_mfd_cells, ARRAY_SIZE(bd718xx_mfd_cells), NULL, 0, regmap_irq_get_domain(bd718xx->irq_data)); @@ -162,11 +163,11 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c, static const struct of_device_id bd718xx_of_match[] = { { .compatible = "rohm,bd71837", - .data = (void *)BD718XX_TYPE_BD71837, + .data = (void *)ROHM_CHIP_TYPE_BD71837, }, { .compatible = "rohm,bd71847", - .data = (void *)BD718XX_TYPE_BD71847, + .data = (void *)ROHM_CHIP_TYPE_BD71847, }, { } }; diff --git a/drivers/regulator/bd718x7-regulator.c b/drivers/regulator/bd718x7-regulator.c index b2191be49670..1c8c8497ac0a 100644 --- a/drivers/regulator/bd718x7-regulator.c +++ b/drivers/regulator/bd718x7-regulator.c @@ -1152,12 +1152,12 @@ static int bd718xx_probe(struct platform_device *pdev) { struct bd718xx *mfd; struct regulator_config config = { 0 }; - struct bd718xx_pmic_inits pmic_regulators[] = { - [BD718XX_TYPE_BD71837] = { + struct bd718xx_pmic_inits pmic_regulators[ROHM_CHIP_TYPE_AMOUNT] = { + [ROHM_CHIP_TYPE_BD71837] = { .r_datas = bd71837_regulators, .r_amount = ARRAY_SIZE(bd71837_regulators), }, - [BD718XX_TYPE_BD71847] = { + [ROHM_CHIP_TYPE_BD71847] = { .r_datas = bd71847_regulators, .r_amount = ARRAY_SIZE(bd71847_regulators), }, @@ -1173,15 +1173,15 @@ static int bd718xx_probe(struct platform_device *pdev) goto err; } - if (mfd->chip_type >= BD718XX_TYPE_AMOUNT || - !pmic_regulators[mfd->chip_type].r_datas) { + if (mfd->chip.chip_type >= ROHM_CHIP_TYPE_AMOUNT || + !pmic_regulators[mfd->chip.chip_type].r_datas) { dev_err(&pdev->dev, "Unsupported chip type\n"); err = -EINVAL; goto err; } /* Register LOCK release */ - err = regmap_update_bits(mfd->regmap, BD718XX_REG_REGLOCK, + err = regmap_update_bits(mfd->chip.regmap, BD718XX_REG_REGLOCK, (REGLOCK_PWRSEQ | REGLOCK_VREG), 0); if (err) { dev_err(&pdev->dev, "Failed to unlock PMIC (%d)\n", err); @@ -1200,7 +1200,8 @@ static int bd718xx_probe(struct platform_device *pdev) * bit allowing HW defaults for power rails to be used */ if (!use_snvs) { - err = regmap_update_bits(mfd->regmap, BD718XX_REG_TRANS_COND1, + err = regmap_update_bits(mfd->chip.regmap, + BD718XX_REG_TRANS_COND1, BD718XX_ON_REQ_POWEROFF_MASK | BD718XX_SWRESET_POWEROFF_MASK | BD718XX_WDOG_POWEROFF_MASK | @@ -1215,17 +1216,17 @@ static int bd718xx_probe(struct platform_device *pdev) } } - for (i = 0; i < pmic_regulators[mfd->chip_type].r_amount; i++) { + for (i = 0; i < pmic_regulators[mfd->chip.chip_type].r_amount; i++) { const struct regulator_desc *desc; struct regulator_dev *rdev; const struct bd718xx_regulator_data *r; - r = &pmic_regulators[mfd->chip_type].r_datas[i]; + r = &pmic_regulators[mfd->chip.chip_type].r_datas[i]; desc = &r->desc; config.dev = pdev->dev.parent; - config.regmap = mfd->regmap; + config.regmap = mfd->chip.regmap; rdev = devm_regulator_register(&pdev->dev, desc, &config); if (IS_ERR(rdev)) { @@ -1254,7 +1255,7 @@ static int bd718xx_probe(struct platform_device *pdev) */ if (!use_snvs || !rdev->constraints->always_on || !rdev->constraints->boot_on) { - err = regmap_update_bits(mfd->regmap, r->init.reg, + err = regmap_update_bits(mfd->chip.regmap, r->init.reg, r->init.mask, r->init.val); if (err) { dev_err(&pdev->dev, @@ -1264,7 +1265,7 @@ static int bd718xx_probe(struct platform_device *pdev) } } for (j = 0; j < r->additional_init_amnt; j++) { - err = regmap_update_bits(mfd->regmap, + err = regmap_update_bits(mfd->chip.regmap, r->additional_inits[j].reg, r->additional_inits[j].mask, r->additional_inits[j].val); diff --git a/include/linux/mfd/rohm-bd718x7.h b/include/linux/mfd/rohm-bd718x7.h index fd194bfc836f..7f2dbde402a1 100644 --- a/include/linux/mfd/rohm-bd718x7.h +++ b/include/linux/mfd/rohm-bd718x7.h @@ -4,14 +4,9 @@ #ifndef __LINUX_MFD_BD718XX_H__ #define __LINUX_MFD_BD718XX_H__ +#include #include -enum { - BD718XX_TYPE_BD71837 = 0, - BD718XX_TYPE_BD71847, - BD718XX_TYPE_AMOUNT -}; - enum { BD718XX_BUCK1 = 0, BD718XX_BUCK2, @@ -321,18 +316,17 @@ enum { BD718XX_PWRBTN_LONG_PRESS_15S }; -struct bd718xx_clk; - struct bd718xx { - unsigned int chip_type; - struct device *dev; - struct regmap *regmap; - unsigned long int id; + /* + * Please keep this as the first member here as some + * drivers (clk) supporting more than one chip may only know this + * generic struct 'struct rohm_regmap_dev' and assume it is + * the first chunk of parent device's private data. + */ + struct rohm_regmap_dev chip; int chip_irq; struct regmap_irq_chip_data *irq_data; - - struct bd718xx_clk *clk; }; #endif /* __LINUX_MFD_BD718XX_H__ */ diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h new file mode 100644 index 000000000000..bff15ac26f2c --- /dev/null +++ b/include/linux/mfd/rohm-generic.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2018 ROHM Semiconductors */ + +#ifndef __LINUX_MFD_ROHM_H__ +#define __LINUX_MFD_ROHM_H__ + +enum { + ROHM_CHIP_TYPE_BD71837 = 0, + ROHM_CHIP_TYPE_BD71847, + ROHM_CHIP_TYPE_BD70528, + ROHM_CHIP_TYPE_AMOUNT +}; + +struct rohm_regmap_dev { + unsigned int chip_type; + struct device *dev; + struct regmap *regmap; +}; + +#endif From patchwork Wed Apr 3 12:41:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B9F96139A for ; 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Wed, 03 Apr 2019 05:41:40 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id m28sm3250634lfc.54.2019.04.03.05.41.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:41:39 -0700 (PDT) Date: Wed, 3 Apr 2019 15:41:32 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 2/8] mfd: bd70528: Support ROHM bd70528 PMIC - core Message-ID: <76089cc417ea197174d5772faa252329fa9afb21.1554294791.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ROHM BD70528MWV is an ultra-low quiescent current general purpose single-chip power management IC for battery-powered portable devices. Add MFD core which enables chip access for following subdevices: - regulators/LED drivers - battery-charger - gpios - 32.768kHz clk - RTC - watchdog Signed-off-by: Matti Vaittinen --- Changelog v12: - No functional changes. - Fixed styling issues pointed by Lee Jones drivers/mfd/Kconfig | 17 ++ drivers/mfd/Makefile | 1 + drivers/mfd/rohm-bd70528.c | 429 +++++++++++++++++++++++++++++++ include/linux/mfd/rohm-bd70528.h | 383 +++++++++++++++++++++++++++ 4 files changed, 830 insertions(+) create mode 100644 drivers/mfd/rohm-bd70528.c create mode 100644 include/linux/mfd/rohm-bd70528.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 0ce2d8dfc5f1..8189e377d0d3 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1866,6 +1866,23 @@ config MFD_ROHM_BD718XX NXP i.MX8. It contains 8 BUCK outputs and 7 LDOs, voltage monitoring and emergency shut down as well as 32,768KHz clock output. +config MFD_ROHM_BD70528 + tristate "ROHM BD70528 Power Management IC" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select MFD_CORE + help + Select this option to get support for the ROHM BD70528 Power + Management IC. BD71837 is general purpose single-chip power + management IC for battery-powered portable devices. It contains + 3 ultra-low current consumption buck converters, 3 LDOs and 2 LED + drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz + crystal oscillator, high-accuracy VREF for use with an external ADC, + 10 bits SAR ADC for battery temperature monitor and 1S battery + charger. + config MFD_STM32_LPTIMER tristate "Support for STM32 Low-Power Timer" depends on (ARCH_STM32 && OF) || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index b4569ed7f3f3..dc1c9431c8d9 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -246,4 +246,5 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o +obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o diff --git a/drivers/mfd/rohm-bd70528.c b/drivers/mfd/rohm-bd70528.c new file mode 100644 index 000000000000..035977fcdf69 --- /dev/null +++ b/drivers/mfd/rohm-bd70528.c @@ -0,0 +1,429 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2019 ROHM Semiconductors +// +// ROHM BD70528 PMIC driver + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WD_CTRL_MAGIC1 0x55 +#define WD_CTRL_MAGIC2 0xAA +#define BD70528_NUM_OF_GPIOS 4 + +struct pmic_data { + struct rohm_regmap_dev chip; + struct mutex rtc_timer_lock; +}; + +static const struct resource rtc_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD70528_INT_RTC_ALARM, "bd70528-rtc-alm"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_ELPS_TIM, "bd70528-elapsed-timer"), +}; + +static const struct resource charger_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_RES, "bd70528-bat-ov-res"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_DET, "bd70528-bat-ov-det"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DBAT_DET, "bd70528-bat-dead"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_RES, "bd70528-bat-warmed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_DET, "bd70528-bat-cold"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_RES, "bd70528-bat-cooled"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_DET, "bd70528-bat-hot"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_CHG_TSD, "bd70528-chg-tshd"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_RMV, "bd70528-bat-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_DET, "bd70528-bat-detected"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_RES, "bd70528-dcin2-ov-res"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_DET, "bd70528-dcin2-ov-det"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_RMV, "bd70528-dcin2-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_DET, "bd70528-dcin2-detected"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_RMV, "bd70528-dcin1-removed"), + DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_DET, "bd70528-dcin1-detected"), +}; + +static struct mfd_cell bd70528_mfd_cells[] = { + { .name = "bd70528-pmic", }, + { .name = "bd70528-gpio", }, + /* + * We use BD71837 driver to drive the clock block. Only differences to + * BD70528 clock gate are the register address and mask. + */ + { .name = "bd718xx-clk", }, + { .name = "bd70528-wdt", }, + { + .name = "bd70528-power", + .resources = charger_irqs, + .num_resources = ARRAY_SIZE(charger_irqs), + }, { + .name = "bd70528-rtc", + .resources = rtc_irqs, + .num_resources = ARRAY_SIZE(rtc_irqs), + }, +}; + +static const struct regmap_range volatile_ranges[] = { + { + .range_min = BD70528_REG_INT_MAIN, + .range_max = BD70528_REG_INT_OP_FAIL, + }, { + .range_min = BD70528_REG_RTC_COUNT_H, + .range_max = BD70528_REG_RTC_ALM_REPEAT, + }, { + /* + * WDT control reg is special. Magic values must be written to + * it in order to change the control. Should not be cached. + */ + .range_min = BD70528_REG_WDT_CTRL, + .range_max = BD70528_REG_WDT_CTRL, + }, { + /* + * BD70528 also contains a few other registers which require + * magic sequences to be written in order to update the value. + * At least SHIPMODE, HWRESET, WARMRESET,and STANDBY + */ + .range_min = BD70528_REG_SHIPMODE, + .range_max = BD70528_REG_STANDBY, + }, +}; + +static const struct regmap_access_table volatile_regs = { + .yes_ranges = &volatile_ranges[0], + .n_yes_ranges = ARRAY_SIZE(volatile_ranges), +}; + +static struct regmap_config bd70528_regmap = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &volatile_regs, + .max_register = BD70528_MAX_REGISTER, + .cache_type = REGCACHE_RBTREE, +}; + +/* + * Mapping of main IRQ register bits to sub-IRQ register offsets so that we can + * access corect sub-IRQ registers based on bits that are set in main IRQ + * register. + */ + +/* bit [0] - Shutdown register */ +unsigned int bit0_offsets[] = {0}; /* Shutdown register */ +unsigned int bit1_offsets[] = {1}; /* Power failure register */ +unsigned int bit2_offsets[] = {2}; /* VR FAULT register */ +unsigned int bit3_offsets[] = {3}; /* PMU register interrupts */ +unsigned int bit4_offsets[] = {4, 5}; /* Charger 1 and Charger 2 registers */ +unsigned int bit5_offsets[] = {6}; /* RTC register */ +unsigned int bit6_offsets[] = {7}; /* GPIO register */ +unsigned int bit7_offsets[] = {8}; /* Invalid operation register */ + +static struct regmap_irq_sub_irq_map bd70528_sub_irq_offsets[] = { + REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), +}; + +static struct regmap_irq bd70528_irqs[] = { + REGMAP_IRQ_REG(BD70528_INT_LONGPUSH, 0, BD70528_INT_LONGPUSH_MASK), + REGMAP_IRQ_REG(BD70528_INT_WDT, 0, BD70528_INT_WDT_MASK), + REGMAP_IRQ_REG(BD70528_INT_HWRESET, 0, BD70528_INT_HWRESET_MASK), + REGMAP_IRQ_REG(BD70528_INT_RSTB_FAULT, 0, BD70528_INT_RSTB_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_VBAT_UVLO, 0, BD70528_INT_VBAT_UVLO_MASK), + REGMAP_IRQ_REG(BD70528_INT_TSD, 0, BD70528_INT_TSD_MASK), + REGMAP_IRQ_REG(BD70528_INT_RSTIN, 0, BD70528_INT_RSTIN_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_FAULT, 1, + BD70528_INT_BUCK1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_FAULT, 1, + BD70528_INT_BUCK2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_FAULT, 1, + BD70528_INT_BUCK3_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO1_FAULT, 1, BD70528_INT_LDO1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO2_FAULT, 1, BD70528_INT_LDO2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LDO3_FAULT, 1, BD70528_INT_LDO3_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_FAULT, 1, BD70528_INT_LED1_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_FAULT, 1, BD70528_INT_LED2_FAULT_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_OCP, 2, BD70528_INT_BUCK1_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_OCP, 2, BD70528_INT_BUCK2_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_OCP, 2, BD70528_INT_BUCK3_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_OCP, 2, BD70528_INT_LED1_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_OCP, 2, BD70528_INT_LED2_OCP_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_FULLON, 2, + BD70528_INT_BUCK1_FULLON_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_FULLON, 2, + BD70528_INT_BUCK2_FULLON_MASK), + REGMAP_IRQ_REG(BD70528_INT_SHORTPUSH, 3, BD70528_INT_SHORTPUSH_MASK), + REGMAP_IRQ_REG(BD70528_INT_AUTO_WAKEUP, 3, + BD70528_INT_AUTO_WAKEUP_MASK), + REGMAP_IRQ_REG(BD70528_INT_STATE_CHANGE, 3, + BD70528_INT_STATE_CHANGE_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_OV_RES, 4, BD70528_INT_BAT_OV_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_OV_DET, 4, BD70528_INT_BAT_OV_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DBAT_DET, 4, BD70528_INT_DBAT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_RES, 4, + BD70528_INT_BATTSD_COLD_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_DET, 4, + BD70528_INT_BATTSD_COLD_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_RES, 4, + BD70528_INT_BATTSD_HOT_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_DET, 4, + BD70528_INT_BATTSD_HOT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_CHG_TSD, 4, BD70528_INT_CHG_TSD_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_RMV, 5, BD70528_INT_BAT_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_BAT_DET, 5, BD70528_INT_BAT_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_RES, 5, + BD70528_INT_DCIN2_OV_RES_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_DET, 5, + BD70528_INT_DCIN2_OV_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_RMV, 5, BD70528_INT_DCIN2_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN2_DET, 5, BD70528_INT_DCIN2_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN1_RMV, 5, BD70528_INT_DCIN1_RMV_MASK), + REGMAP_IRQ_REG(BD70528_INT_DCIN1_DET, 5, BD70528_INT_DCIN1_DET_MASK), + REGMAP_IRQ_REG(BD70528_INT_RTC_ALARM, 6, BD70528_INT_RTC_ALARM_MASK), + REGMAP_IRQ_REG(BD70528_INT_ELPS_TIM, 6, BD70528_INT_ELPS_TIM_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO0, 7, BD70528_INT_GPIO0_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO1, 7, BD70528_INT_GPIO1_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO2, 7, BD70528_INT_GPIO2_MASK), + REGMAP_IRQ_REG(BD70528_INT_GPIO3, 7, BD70528_INT_GPIO3_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK1_DVS_OPFAIL, 8, + BD70528_INT_BUCK1_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK2_DVS_OPFAIL, 8, + BD70528_INT_BUCK2_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_BUCK3_DVS_OPFAIL, 8, + BD70528_INT_BUCK3_DVS_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED1_VOLT_OPFAIL, 8, + BD70528_INT_LED1_VOLT_OPFAIL_MASK), + REGMAP_IRQ_REG(BD70528_INT_LED2_VOLT_OPFAIL, 8, + BD70528_INT_LED2_VOLT_OPFAIL_MASK), +}; + +static struct regmap_irq_chip bd70528_irq_chip = { + .name = "bd70528_irq", + .main_status = BD70528_REG_INT_MAIN, + .irqs = &bd70528_irqs[0], + .num_irqs = ARRAY_SIZE(bd70528_irqs), + .status_base = BD70528_REG_INT_SHDN, + .mask_base = BD70528_REG_INT_SHDN_MASK, + .ack_base = BD70528_REG_INT_SHDN, + .type_base = BD70528_REG_GPIO1_IN, + .init_ack_masked = true, + .num_regs = 9, + .num_main_regs = 1, + .num_type_reg = 4, + .sub_reg_offsets = &bd70528_sub_irq_offsets[0], + .num_main_status_bits = 8, + .irq_reg_stride = 1, +}; + +/* + * The BD70528 watch-dog must be disabled when RTC is set. Thus both WDT and + * RTC need to have access to WDT control. We want to allow compiling the + * BD70528 driver without WDT or without the RTC. Thus the common code is here + * and RTC can be compiled in without WDT driver or WDT without RTC. + */ + +/** + * bd70528_wdt_set - arm or disarm watchdog timer + * + * @data: device data for the PMIC instance we want to operate on + * @enable: new state of WDT. zero to disable, non zero to enable + * @old_state: previous state of WDT will be filled here + * + * Arm or disarm WDT on BD70528 PMIC. Expected to be called only by + * BD70528 RTC and BD70528 WDT drivers. The rtc_timer_lock must be taken + * by calling bd70528_wdt_lock before calling bd70528_wdt_set. + */ +int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, int *old_state) +{ + int ret, i; + unsigned int tmp; + struct pmic_data *bd70528 = container_of(data, struct pmic_data, + chip); + u8 wd_ctrl_arr[3] = { WD_CTRL_MAGIC1, WD_CTRL_MAGIC2, 0 }; + u8 *wd_ctrl = &wd_ctrl_arr[2]; + + ret = regmap_read(bd70528->chip.regmap, BD70528_REG_WDT_CTRL, &tmp); + if (ret) + return ret; + + *wd_ctrl = (u8)tmp; + + if (old_state) { + if (*wd_ctrl & BD70528_MASK_WDT_EN) + *old_state |= BD70528_WDT_STATE_BIT; + else + *old_state &= ~BD70528_WDT_STATE_BIT; + if ((!enable) == (!(*old_state & BD70528_WDT_STATE_BIT))) + return 0; + } + + if (enable) { + if (*wd_ctrl & BD70528_MASK_WDT_EN) + return 0; + *wd_ctrl |= BD70528_MASK_WDT_EN; + } else { + if (*wd_ctrl & BD70528_MASK_WDT_EN) + *wd_ctrl &= ~BD70528_MASK_WDT_EN; + else + return 0; + } + + for (i = 0; i < 3; i++) { + ret = regmap_write(bd70528->chip.regmap, BD70528_REG_WDT_CTRL, + wd_ctrl_arr[i]); + if (ret) + return ret; + } + + ret = regmap_read(bd70528->chip.regmap, BD70528_REG_WDT_CTRL, &tmp); + if ((tmp & BD70528_MASK_WDT_EN) != (*wd_ctrl & BD70528_MASK_WDT_EN)) { + dev_err(bd70528->chip.dev, + "Watchdog ctrl mismatch (hw) 0x%x (set) 0x%x\n", + tmp, *wd_ctrl); + ret = -EIO; + } + + return ret; +} +EXPORT_SYMBOL(bd70528_wdt_set); + +/** + * bd70528_wdt_lock - take WDT lock + * + * @bd70528: device data for the PMIC instance we want to operate on + * + * Lock WDT for arming/disarming in order to avoid race condition caused + * by WDT state changes initiated by WDT and RTC drivers. + */ +void bd70528_wdt_lock(struct rohm_regmap_dev *data) +{ + struct pmic_data *bd70528 = container_of(data, struct pmic_data, + chip); + + mutex_lock(&bd70528->rtc_timer_lock); +} +EXPORT_SYMBOL(bd70528_wdt_lock); + +/** + * bd70528_wdt_unlock - unlock WDT lock + * + * @bd70528: device data for the PMIC instance we want to operate on + * + * Unlock WDT lock which has previously been taken by call to + * bd70528_wdt_lock. + */ +void bd70528_wdt_unlock(struct rohm_regmap_dev *data) +{ + struct pmic_data *bd70528 = container_of(data, struct pmic_data, + chip); + + mutex_unlock(&bd70528->rtc_timer_lock); +} +EXPORT_SYMBOL(bd70528_wdt_unlock); + +static int bd70528_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct pmic_data *bd70528; + struct regmap_irq_chip_data *irq_data; + int ret, i; + + if (!i2c->irq) { + dev_err(&i2c->dev, "No IRQ configured\n"); + return -EINVAL; + } + + bd70528 = devm_kzalloc(&i2c->dev, sizeof(*bd70528), GFP_KERNEL); + if (!bd70528) + return -ENOMEM; + + mutex_init(&bd70528->rtc_timer_lock); + + dev_set_drvdata(&i2c->dev, &bd70528->chip); + + bd70528->chip.chip_type = ROHM_CHIP_TYPE_BD70528; + bd70528->chip.regmap = devm_regmap_init_i2c(i2c, &bd70528_regmap); + if (IS_ERR(bd70528->chip.regmap)) { + dev_err(&i2c->dev, "Failed to initialize Regmap\n"); + return PTR_ERR(bd70528->chip.regmap); + } + + /* + * Disallow type setting for all IRQs by default as most of them do not + * support setting type. + */ + for (i = 0; i < ARRAY_SIZE(bd70528_irqs); i++) + bd70528_irqs[i].type.types_supported = 0; + + /* Set IRQ typesetting information for GPIO pins 0 - 3 */ + for (i = 0; i < BD70528_NUM_OF_GPIOS; i++) { + struct regmap_irq_type *type; + + type = &bd70528_irqs[BD70528_INT_GPIO0 + i].type; + type->type_reg_offset = 2 * i; + type->type_rising_val = 0x20; + type->type_falling_val = 0x10; + type->type_level_high_val = 0x40; + type->type_level_low_val = 0x50; + type->types_supported = (IRQ_TYPE_EDGE_BOTH | + IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW); + } + + ret = devm_regmap_add_irq_chip(&i2c->dev, bd70528->chip.regmap, + i2c->irq, IRQF_ONESHOT, 0, + &bd70528_irq_chip, &irq_data); + if (ret) { + dev_err(&i2c->dev, "Failed to add IRQ chip\n"); + return ret; + } + dev_dbg(&i2c->dev, "Registered %d IRQs for chip\n", + bd70528_irq_chip.num_irqs); + + /* + * BD70528 IRQ controller is not touching the main mask register. + * So enable the GPIO block interrupts at main level. We can just leave + * them enabled as the IRQ controller should disable IRQs from + * sub-registers when IRQ is disabled or freed. + */ + ret = regmap_update_bits(bd70528->chip.regmap, + BD70528_REG_INT_MAIN_MASK, + BD70528_INT_GPIO_MASK, 0); + + ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + bd70528_mfd_cells, + ARRAY_SIZE(bd70528_mfd_cells), NULL, 0, + regmap_irq_get_domain(irq_data)); + if (ret) + dev_err(&i2c->dev, "Failed to create subdevices\n"); + + return ret; +} + +static const struct of_device_id bd70528_of_match[] = { + { .compatible = "rohm,bd70528", }, + { }, +}; +MODULE_DEVICE_TABLE(of, bd70528_of_match); + +static struct i2c_driver bd70528_drv = { + .driver = { + .name = "rohm-bd70528", + .of_match_table = bd70528_of_match, + }, + .probe = &bd70528_i2c_probe, +}; + +module_i2c_driver(bd70528_drv); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("ROHM BD70528 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/rohm-bd70528.h b/include/linux/mfd/rohm-bd70528.h new file mode 100644 index 000000000000..e9fe2d7a4052 --- /dev/null +++ b/include/linux/mfd/rohm-bd70528.h @@ -0,0 +1,383 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2018 ROHM Semiconductors */ + +#ifndef __LINUX_MFD_BD70528_H__ +#define __LINUX_MFD_BD70528_H__ + +#include +#include +#include +#include + +enum { + BD70528_BUCK1, + BD70528_BUCK2, + BD70528_BUCK3, + BD70528_LDO1, + BD70528_LDO2, + BD70528_LDO3, + BD70528_LED1, + BD70528_LED2, +}; + +#define BD70528_BUCK_VOLTS 17 +#define BD70528_BUCK_VOLTS 17 +#define BD70528_BUCK_VOLTS 17 +#define BD70528_LDO_VOLTS 0x20 + +#define BD70528_REG_BUCK1_EN 0x0F +#define BD70528_REG_BUCK1_VOLT 0x15 +#define BD70528_REG_BUCK2_EN 0x10 +#define BD70528_REG_BUCK2_VOLT 0x16 +#define BD70528_REG_BUCK3_EN 0x11 +#define BD70528_REG_BUCK3_VOLT 0x17 +#define BD70528_REG_LDO1_EN 0x1b +#define BD70528_REG_LDO1_VOLT 0x1e +#define BD70528_REG_LDO2_EN 0x1c +#define BD70528_REG_LDO2_VOLT 0x1f +#define BD70528_REG_LDO3_EN 0x1d +#define BD70528_REG_LDO3_VOLT 0x20 +#define BD70528_REG_LED_CTRL 0x2b +#define BD70528_REG_LED_VOLT 0x29 +#define BD70528_REG_LED_EN 0x2a + +/* main irq registers */ +#define BD70528_REG_INT_MAIN 0x7E +#define BD70528_REG_INT_MAIN_MASK 0x74 + +/* 'sub irq' registers */ +#define BD70528_REG_INT_SHDN 0x7F +#define BD70528_REG_INT_PWR_FLT 0x80 +#define BD70528_REG_INT_VR_FLT 0x81 +#define BD70528_REG_INT_MISC 0x82 +#define BD70528_REG_INT_BAT1 0x83 +#define BD70528_REG_INT_BAT2 0x84 +#define BD70528_REG_INT_RTC 0x85 +#define BD70528_REG_INT_GPIO 0x86 +#define BD70528_REG_INT_OP_FAIL 0x87 + +#define BD70528_REG_INT_SHDN_MASK 0x75 +#define BD70528_REG_INT_PWR_FLT_MASK 0x76 +#define BD70528_REG_INT_VR_FLT_MASK 0x77 +#define BD70528_REG_INT_MISC_MASK 0x78 +#define BD70528_REG_INT_BAT1_MASK 0x79 +#define BD70528_REG_INT_BAT2_MASK 0x7a +#define BD70528_REG_INT_RTC_MASK 0x7b +#define BD70528_REG_INT_GPIO_MASK 0x7c +#define BD70528_REG_INT_OP_FAIL_MASK 0x7d + +/* Reset related 'magic' registers */ +#define BD70528_REG_SHIPMODE 0x03 +#define BD70528_REG_HWRESET 0x04 +#define BD70528_REG_WARMRESET 0x05 +#define BD70528_REG_STANDBY 0x06 + +/* GPIO registers */ +#define BD70528_REG_GPIO_STATE 0x8F + +#define BD70528_REG_GPIO1_IN 0x4d +#define BD70528_REG_GPIO2_IN 0x4f +#define BD70528_REG_GPIO3_IN 0x51 +#define BD70528_REG_GPIO4_IN 0x53 +#define BD70528_REG_GPIO1_OUT 0x4e +#define BD70528_REG_GPIO2_OUT 0x50 +#define BD70528_REG_GPIO3_OUT 0x52 +#define BD70528_REG_GPIO4_OUT 0x54 + +/* clk control */ + +#define BD70528_REG_CLK_OUT 0x2c + +/* RTC */ + +#define BD70528_REG_RTC_COUNT_H 0x2d +#define BD70528_REG_RTC_COUNT_L 0x2e +#define BD70528_REG_RTC_SEC 0x2f +#define BD70528_REG_RTC_MINUTE 0x30 +#define BD70528_REG_RTC_HOUR 0x31 +#define BD70528_REG_RTC_WEEK 0x32 +#define BD70528_REG_RTC_DAY 0x33 +#define BD70528_REG_RTC_MONTH 0x34 +#define BD70528_REG_RTC_YEAR 0x35 + +#define BD70528_REG_RTC_ALM_SEC 0x36 +#define BD70528_REG_RTC_ALM_START BD70528_REG_RTC_ALM_SEC +#define BD70528_REG_RTC_ALM_MINUTE 0x37 +#define BD70528_REG_RTC_ALM_HOUR 0x38 +#define BD70528_REG_RTC_ALM_WEEK 0x39 +#define BD70528_REG_RTC_ALM_DAY 0x3a +#define BD70528_REG_RTC_ALM_MONTH 0x3b +#define BD70528_REG_RTC_ALM_YEAR 0x3c +#define BD70528_REG_RTC_ALM_MASK 0x3d +#define BD70528_REG_RTC_ALM_REPEAT 0x3e +#define BD70528_REG_RTC_START BD70528_REG_RTC_SEC + +#define BD70528_REG_RTC_WAKE_SEC 0x43 +#define BD70528_REG_RTC_WAKE_START BD70528_REG_RTC_WAKE_SEC +#define BD70528_REG_RTC_WAKE_MIN 0x44 +#define BD70528_REG_RTC_WAKE_HOUR 0x45 +#define BD70528_REG_RTC_WAKE_CTRL 0x46 + +#define BD70528_REG_ELAPSED_TIMER_EN 0x42 +#define BD70528_REG_WAKE_EN 0x46 + +/* WDT registers */ +#define BD70528_REG_WDT_CTRL 0x4A +#define BD70528_REG_WDT_HOUR 0x49 +#define BD70528_REG_WDT_MINUTE 0x48 +#define BD70528_REG_WDT_SEC 0x47 + +/* Charger / Battery */ +#define BD70528_REG_CHG_CURR_STAT 0x59 +#define BD70528_REG_CHG_BAT_STAT 0x57 +#define BD70528_REG_CHG_BAT_TEMP 0x58 +#define BD70528_REG_CHG_IN_STAT 0x56 +#define BD70528_REG_CHG_DCIN_ILIM 0x5d +#define BD70528_REG_CHG_CHG_CURR_WARM 0x61 +#define BD70528_REG_CHG_CHG_CURR_COLD 0x62 + +/* Masks for main IRQ register bits */ +enum { + BD70528_INT_SHDN, +#define BD70528_INT_SHDN_MASK BIT(BD70528_INT_SHDN) + BD70528_INT_PWR_FLT, +#define BD70528_INT_PWR_FLT_MASK BIT(BD70528_INT_PWR_FLT) + BD70528_INT_VR_FLT, +#define BD70528_INT_VR_FLT_MASK BIT(BD70528_INT_VR_FLT) + BD70528_INT_MISC, +#define BD70528_INT_MISC_MASK BIT(BD70528_INT_MISC) + BD70528_INT_BAT1, +#define BD70528_INT_BAT1_MASK BIT(BD70528_INT_BAT1) + BD70528_INT_RTC, +#define BD70528_INT_RTC_MASK BIT(BD70528_INT_RTC) + BD70528_INT_GPIO, +#define BD70528_INT_GPIO_MASK BIT(BD70528_INT_GPIO) + BD70528_INT_OP_FAIL, +#define BD70528_INT_OP_FAIL_MASK BIT(BD70528_INT_OP_FAIL) +}; + +/* IRQs */ +enum { + /* Shutdown register IRQs */ + BD70528_INT_LONGPUSH, + BD70528_INT_WDT, + BD70528_INT_HWRESET, + BD70528_INT_RSTB_FAULT, + BD70528_INT_VBAT_UVLO, + BD70528_INT_TSD, + BD70528_INT_RSTIN, + /* Power failure register IRQs */ + BD70528_INT_BUCK1_FAULT, + BD70528_INT_BUCK2_FAULT, + BD70528_INT_BUCK3_FAULT, + BD70528_INT_LDO1_FAULT, + BD70528_INT_LDO2_FAULT, + BD70528_INT_LDO3_FAULT, + BD70528_INT_LED1_FAULT, + BD70528_INT_LED2_FAULT, + /* VR FAULT register IRQs */ + BD70528_INT_BUCK1_OCP, + BD70528_INT_BUCK2_OCP, + BD70528_INT_BUCK3_OCP, + BD70528_INT_LED1_OCP, + BD70528_INT_LED2_OCP, + BD70528_INT_BUCK1_FULLON, + BD70528_INT_BUCK2_FULLON, + /* PMU register interrupts */ + BD70528_INT_SHORTPUSH, + BD70528_INT_AUTO_WAKEUP, + BD70528_INT_STATE_CHANGE, + /* Charger 1 register IRQs */ + BD70528_INT_BAT_OV_RES, + BD70528_INT_BAT_OV_DET, + BD70528_INT_DBAT_DET, + BD70528_INT_BATTSD_COLD_RES, + BD70528_INT_BATTSD_COLD_DET, + BD70528_INT_BATTSD_HOT_RES, + BD70528_INT_BATTSD_HOT_DET, + BD70528_INT_CHG_TSD, + /* Charger 2 register IRQs */ + BD70528_INT_BAT_RMV, + BD70528_INT_BAT_DET, + BD70528_INT_DCIN2_OV_RES, + BD70528_INT_DCIN2_OV_DET, + BD70528_INT_DCIN2_RMV, + BD70528_INT_DCIN2_DET, + BD70528_INT_DCIN1_RMV, + BD70528_INT_DCIN1_DET, + /* RTC register IRQs */ + BD70528_INT_RTC_ALARM, + BD70528_INT_ELPS_TIM, + /* GPIO register IRQs */ + BD70528_INT_GPIO0, + BD70528_INT_GPIO1, + BD70528_INT_GPIO2, + BD70528_INT_GPIO3, + /* Invalid operation register IRQs */ + BD70528_INT_BUCK1_DVS_OPFAIL, + BD70528_INT_BUCK2_DVS_OPFAIL, + BD70528_INT_BUCK3_DVS_OPFAIL, + BD70528_INT_LED1_VOLT_OPFAIL, + BD70528_INT_LED2_VOLT_OPFAIL, +}; + +/* Masks */ +#define BD70528_INT_LONGPUSH_MASK 0x1 +#define BD70528_INT_WDT_MASK 0x2 +#define BD70528_INT_HWRESET_MASK 0x4 +#define BD70528_INT_RSTB_FAULT_MASK 0x8 +#define BD70528_INT_VBAT_UVLO_MASK 0x10 +#define BD70528_INT_TSD_MASK 0x20 +#define BD70528_INT_RSTIN_MASK 0x40 + +#define BD70528_INT_BUCK1_FAULT_MASK 0x1 +#define BD70528_INT_BUCK2_FAULT_MASK 0x2 +#define BD70528_INT_BUCK3_FAULT_MASK 0x4 +#define BD70528_INT_LDO1_FAULT_MASK 0x8 +#define BD70528_INT_LDO2_FAULT_MASK 0x10 +#define BD70528_INT_LDO3_FAULT_MASK 0x20 +#define BD70528_INT_LED1_FAULT_MASK 0x40 +#define BD70528_INT_LED2_FAULT_MASK 0x80 + +#define BD70528_INT_BUCK1_OCP_MASK 0x1 +#define BD70528_INT_BUCK2_OCP_MASK 0x2 +#define BD70528_INT_BUCK3_OCP_MASK 0x4 +#define BD70528_INT_LED1_OCP_MASK 0x8 +#define BD70528_INT_LED2_OCP_MASK 0x10 +#define BD70528_INT_BUCK1_FULLON_MASK 0x20 +#define BD70528_INT_BUCK2_FULLON_MASK 0x40 + +#define BD70528_INT_SHORTPUSH_MASK 0x1 +#define BD70528_INT_AUTO_WAKEUP_MASK 0x2 +#define BD70528_INT_STATE_CHANGE_MASK 0x10 + +#define BD70528_INT_BAT_OV_RES_MASK 0x1 +#define BD70528_INT_BAT_OV_DET_MASK 0x2 +#define BD70528_INT_DBAT_DET_MASK 0x4 +#define BD70528_INT_BATTSD_COLD_RES_MASK 0x8 +#define BD70528_INT_BATTSD_COLD_DET_MASK 0x10 +#define BD70528_INT_BATTSD_HOT_RES_MASK 0x20 +#define BD70528_INT_BATTSD_HOT_DET_MASK 0x40 +#define BD70528_INT_CHG_TSD_MASK 0x80 + +#define BD70528_INT_BAT_RMV_MASK 0x1 +#define BD70528_INT_BAT_DET_MASK 0x2 +#define BD70528_INT_DCIN2_OV_RES_MASK 0x4 +#define BD70528_INT_DCIN2_OV_DET_MASK 0x8 +#define BD70528_INT_DCIN2_RMV_MASK 0x10 +#define BD70528_INT_DCIN2_DET_MASK 0x20 +#define BD70528_INT_DCIN1_RMV_MASK 0x40 +#define BD70528_INT_DCIN1_DET_MASK 0x80 + +#define BD70528_INT_RTC_ALARM_MASK 0x1 +#define BD70528_INT_ELPS_TIM_MASK 0x2 + +#define BD70528_INT_GPIO0_MASK 0x1 +#define BD70528_INT_GPIO1_MASK 0x2 +#define BD70528_INT_GPIO2_MASK 0x4 +#define BD70528_INT_GPIO3_MASK 0x8 + +#define BD70528_INT_BUCK1_DVS_OPFAIL_MASK 0x1 +#define BD70528_INT_BUCK2_DVS_OPFAIL_MASK 0x2 +#define BD70528_INT_BUCK3_DVS_OPFAIL_MASK 0x4 +#define BD70528_INT_LED1_VOLT_OPFAIL_MASK 0x10 +#define BD70528_INT_LED2_VOLT_OPFAIL_MASK 0x20 + +#define BD70528_DEBOUNCE_MASK 0x3 + +#define BD70528_DEBOUNCE_DISABLE 0 +#define BD70528_DEBOUNCE_15MS 1 +#define BD70528_DEBOUNCE_30MS 2 +#define BD70528_DEBOUNCE_50MS 3 + +#define BD70528_GPIO_DRIVE_MASK 0x2 +#define BD70528_GPIO_PUSH_PULL 0x0 +#define BD70528_GPIO_OPEN_DRAIN 0x2 + +#define BD70528_GPIO_OUT_EN_MASK 0x80 +#define BD70528_GPIO_OUT_ENABLE 0x80 +#define BD70528_GPIO_OUT_DISABLE 0x0 + +#define BD70528_GPIO_OUT_HI 0x1 +#define BD70528_GPIO_OUT_LO 0x0 +#define BD70528_GPIO_OUT_MASK 0x1 + +#define BD70528_GPIO_IN_STATE_BASE 1 + +#define BD70528_CLK_OUT_EN_MASK 0x1 + +/* RTC masks to mask out reserved bits */ + +#define BD70528_MASK_RTC_SEC 0x7f +#define BD70528_MASK_RTC_MINUTE 0x7f +#define BD70528_MASK_RTC_HOUR_24H 0x80 +#define BD70528_MASK_RTC_HOUR_PM 0x20 +#define BD70528_MASK_RTC_HOUR 0x1f +#define BD70528_MASK_RTC_DAY 0x3f +#define BD70528_MASK_RTC_WEEK 0x07 +#define BD70528_MASK_RTC_MONTH 0x1f +#define BD70528_MASK_RTC_YEAR 0xff +#define BD70528_MASK_RTC_COUNT_L 0x7f + +#define BD70528_MASK_ELAPSED_TIMER_EN 0x1 +/* Mask second, min and hour fields + * HW would support ALM irq for over 24h + * (by setting day, month and year too) + * but as we wish to keep this same as for + * wake-up we limit ALM to 24H and only + * unmask sec, min and hour + */ +#define BD70528_MASK_ALM_EN 0x7 +#define BD70528_MASK_WAKE_EN 0x1 + +/* WDT masks */ +#define BD70528_MASK_WDT_EN 0x1 +#define BD70528_MASK_WDT_HOUR 0x1 +#define BD70528_MASK_WDT_MINUTE 0x7f +#define BD70528_MASK_WDT_SEC 0x7f + +#define BD70528_WDT_STATE_BIT 0x1 +#define BD70528_ELAPSED_STATE_BIT 0x2 +#define BD70528_WAKE_STATE_BIT 0x4 + +/* Charger masks */ +#define BD70528_MASK_CHG_STAT 0x7f +#define BD70528_MASK_CHG_BAT_TIMER 0x20 +#define BD70528_MASK_CHG_BAT_OVERVOLT 0x10 +#define BD70528_MASK_CHG_BAT_DETECT 0x1 +#define BD70528_MASK_CHG_DCIN1_UVLO 0x1 +#define BD70528_MASK_CHG_DCIN_ILIM 0x3f +#define BD70528_MASK_CHG_CHG_CURR 0x1f +#define BD70528_MASK_CHG_TRICKLE_CURR 0x10 + +/* + * Note, external battery register is the lonely rider at + * address 0xc5. See how to stuff that in the regmap + */ +#define BD70528_MAX_REGISTER 0x94 + +/* Buck control masks */ +#define BD70528_MASK_RUN_EN 0x4 +#define BD70528_MASK_STBY_EN 0x2 +#define BD70528_MASK_IDLE_EN 0x1 +#define BD70528_MASK_LED1_EN 0x1 +#define BD70528_MASK_LED2_EN 0x10 + +#define BD70528_MASK_BUCK_VOLT 0xf +#define BD70528_MASK_LDO_VOLT 0x1f +#define BD70528_MASK_LED1_VOLT 0x1 +#define BD70528_MASK_LED2_VOLT 0x10 + +/* Misc irq masks */ +#define BD70528_INT_MASK_SHORT_PUSH 1 +#define BD70528_INT_MASK_AUTO_WAKE 2 +#define BD70528_INT_MASK_POWER_STATE 4 + +#define BD70528_MASK_BUCK_RAMP 0x10 +#define BD70528_SIFT_BUCK_RAMP 4 + +int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, int *old_state); +void bd70528_wdt_lock(struct rohm_regmap_dev *data); +void bd70528_wdt_unlock(struct rohm_regmap_dev *data); + +#endif /* __LINUX_MFD_BD70528_H__ */ From patchwork Wed Apr 3 12:42:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883681 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1ABC817E0 for ; Wed, 3 Apr 2019 12:43:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0917028952 for ; Wed, 3 Apr 2019 12:43:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F1C53289EE; Wed, 3 Apr 2019 12:43:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95F9428952 for ; Wed, 3 Apr 2019 12:43:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726384AbfDCMmz (ORCPT ); Wed, 3 Apr 2019 08:42:55 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:46789 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726064AbfDCMmz (ORCPT ); Wed, 3 Apr 2019 08:42:55 -0400 Received: by mail-lf1-f68.google.com with SMTP id r25so11581562lfn.13; Wed, 03 Apr 2019 05:42:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=xPUCMe1wedD3mJ/hN2Qprojga5iPAW9GSHN+HKSNLC0=; b=dvxzFKOoCfKzXFmB26vb/hQp487kgkQGN5DOqxgChPlAnPb0rewavLz8o00AHn2tFD /w2zYiCVqZysGxho+i/ahxeN8sSC+lFcOQlrd3smT4YDYWRoiNMg3LP0woHlAEkOaE7d BYP/r0gey5cRtxCcheV73k4eDJP4gzeOJu8WOALi+7TEq/v3hz2i3L91rXiqJoFgAteT 1L//Usw/b+6VePeIfuJvwe3+BA8pchhN1j/UGRO6rhcWVK8CZdiJtrQQDzjyQcNVqBYi ZydGuGkOkEP7QNUq0C55a0n0CyvSOTPYHykl0FKhGzgad0RDOEaEGzAaaoBq84Z/ZM77 4esw== X-Gm-Message-State: APjAAAUL9fmHueKncAb/pOO0DNQ1qc1V6IttgNMBC/qBH8+8OksKFqlI WabxJCgectUSL4K6AGnmATU= X-Google-Smtp-Source: APXvYqzzLhiDpSUXGoQcMwGEKVPY8a9JMsTB7xPeOcqqRhj9WWClkBHqQldKemvihjOLku/6pmas5w== X-Received: by 2002:a19:4b14:: with SMTP id y20mr38154452lfa.36.1554295372570; Wed, 03 Apr 2019 05:42:52 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id a29sm2989030lfi.19.2019.04.03.05.42.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:42:52 -0700 (PDT) Date: Wed, 3 Apr 2019 15:42:45 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 3/8] clk: bd718x7: Support ROHM BD70528 clk block Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ROHM BD70528 is an ultra low power PMIC with similar 32K clk as bd718x7. Only difference (from clk perspective) is register address. Add support for controlling BD70528 clk using bd718x7 driver. Signed-off-by: Matti Vaittinen Acked-by: Stephen Boyd --- Changelog v12: - No changes drivers/clk/Kconfig | 6 +++--- drivers/clk/clk-bd718x7.c | 20 ++++++++++++++++---- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index e705aab9e38b..86828939d095 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -285,10 +285,10 @@ config COMMON_CLK_STM32H7 config COMMON_CLK_BD718XX tristate "Clock driver for ROHM BD718x7 PMIC" - depends on MFD_ROHM_BD718XX + depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 help - This driver supports ROHM BD71837 and ROHM BD71847 - PMICs clock gates. + This driver supports ROHM BD71837, ROHM BD71847 and + ROHM BD70528 PMICs clock gates. config COMMON_CLK_FIXED_MMIO bool "Clock driver for Memory Mapped Fixed values" diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c index 461228ebf703..ae6e5baee330 100644 --- a/drivers/clk/clk-bd718x7.c +++ b/drivers/clk/clk-bd718x7.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -86,9 +87,20 @@ static int bd71837_clk_probe(struct platform_device *pdev) dev_err(&pdev->dev, "No parent clk found\n"); return -EINVAL; } - - c->reg = BD718XX_REG_OUT32K; - c->mask = BD718XX_OUT32K_EN; + switch (mfd->chip_type) { + case ROHM_CHIP_TYPE_BD71837: + case ROHM_CHIP_TYPE_BD71847: + c->reg = BD718XX_REG_OUT32K; + c->mask = BD718XX_OUT32K_EN; + break; + case ROHM_CHIP_TYPE_BD70528: + c->reg = BD70528_REG_CLK_OUT; + c->mask = BD70528_CLK_OUT_EN_MASK; + break; + default: + dev_err(&pdev->dev, "Unknown clk chip\n"); + return -EINVAL; + } c->mfd = mfd; c->pdev = pdev; c->hw.init = &init; @@ -119,5 +131,5 @@ static struct platform_driver bd71837_clk = { module_platform_driver(bd71837_clk); MODULE_AUTHOR("Matti Vaittinen "); -MODULE_DESCRIPTION("BD71837/BD71847 chip clk driver"); +MODULE_DESCRIPTION("BD71837/BD71847/BD70528 chip clk driver"); MODULE_LICENSE("GPL"); From patchwork Wed Apr 3 12:44:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CB2F3139A for ; Wed, 3 Apr 2019 12:45:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B15D3285D9 for ; Wed, 3 Apr 2019 12:45:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A49C428742; Wed, 3 Apr 2019 12:45:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C84D285D9 for ; Wed, 3 Apr 2019 12:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726708AbfDCMoy (ORCPT ); Wed, 3 Apr 2019 08:44:54 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:43413 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726064AbfDCMoy (ORCPT ); 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Wed, 03 Apr 2019 05:44:50 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id m28sm3252084lfc.54.2019.04.03.05.44.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:44:50 -0700 (PDT) Date: Wed, 3 Apr 2019 15:44:41 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 4/8] dt-bindings: mfd: Document first ROHM BD70528 bindings Message-ID: <0b9891d3a4050ae6c16a9e4049d2b558a6d91854.1554294791.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document bindings for regulators (3 bucks, 3 LDOs and 2 LED drivers) and 4 GPIO pins which can be configured for I/O or as interrupt sources withe configurable trigger levels. Signed-off-by: Matti Vaittinen Reviewed-by: Rob Herring Acked-by: Linus Walleij --- Changelog v12: - minor grammar/styling fixes suggested by Lee Jones .../bindings/mfd/rohm,bd70528-pmic.txt | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt new file mode 100644 index 000000000000..c3c02ce73cde --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt @@ -0,0 +1,102 @@ +* ROHM BD70528 Power Management Integrated Circuit bindings + +BD70528MWV is an ultra-low quiescent current general purpose, single-chip, +power management IC for battery-powered portable devices. The IC +integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2 +LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz +clock gate, high-accuracy VREF for use with an external ADC, flexible +dual-input power path, 10 bit SAR ADC for battery temperature monitor and +1S battery charger with scalable charge currents. + +Required properties: + - compatible : Should be "rohm,bd70528" + - reg : I2C slave address. + - interrupts : The interrupt line the device is connected to. + - interrupt-controller : To indicate BD70528 acts as an interrupt controller. + - #interrupt-cells : Should be 2. Usage is compliant to the 2 cells + variant of ../interrupt-controller/interrupts.txt + - gpio-controller : To indicate BD70528 acts as a GPIO controller. + - #gpio-cells : Should be 2. The first cell is the pin number and + the second cell is used to specify flags. See + ../gpio/gpio.txt for more information. + - #clock-cells : Should be 0. + - regulators: : List of child nodes that specify the regulators. + Please see ../regulator/rohm,bd70528-regulator.txt + +Optional properties: + - clock-output-names : Should contain name for output clock. + +Example: +/* External oscillator */ +osc: oscillator { + compatible = "fixed-clock"; + #clock-cells = <1>; + clock-frequency = <32768>; + clock-output-names = "osc"; +}; + +pmic: pmic@4b { + compatible = "rohm,bd70528"; + reg = <0x4b>; + interrupt-parent = <&gpio1>; + interrupts = <29 GPIO_ACTIVE_LOW>; + clocks = <&osc 0>; + #clock-cells = <0>; + clock-output-names = "bd70528-32k-out"; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + buck1: BUCK1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-ramp-delay = <125>; + }; + buck2: BUCK2 { + regulator-name = "buck2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-ramp-delay = <125>; + }; + buck3: BUCK3 { + regulator-name = "buck3"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-ramp-delay = <250>; + }; + ldo1: LDO1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + ldo2: LDO2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + ldo3: LDO3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3300000>; + }; + led_ldo1: LED_LDO1 { + regulator-name = "led_ldo1"; + regulator-min-microvolt = <200000>; + regulator-max-microvolt = <300000>; + }; + led_ldo2: LED_LDO2 { + regulator-name = "led_ldo2"; + regulator-min-microvolt = <200000>; + regulator-max-microvolt = <300000>; + }; + }; +}; From patchwork Wed Apr 3 12:46:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883693 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 60937139A for ; Wed, 3 Apr 2019 12:46:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 461CB28868 for ; Wed, 3 Apr 2019 12:46:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 39463288B6; Wed, 3 Apr 2019 12:46:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A73228894 for ; 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Wed, 03 Apr 2019 05:46:12 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id c7sm3517480lja.90.2019.04.03.05.46.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:46:12 -0700 (PDT) Date: Wed, 3 Apr 2019 15:46:04 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 5/8] gpio: Initial support for ROHM bd70528 GPIO block Message-ID: <3549877aac9dcddebe498b87bc9692bf857a86e5.1554294791.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ROHM BD70528 PMIC has 4 GPIO pins. Allow them to be controlled by GPIO framework. IRQs are handled by regmap-irq and GPIO driver is not aware of the irq usage. Signed-off-by: Matti Vaittinen Reviewed-by: Linus Walleij --- Changelog v12: - No functional changes - Styling fixes drivers/gpio/Kconfig | 11 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-bd70528.c | 232 ++++++++++++++++++++++++++++++++++++ 3 files changed, 244 insertions(+) create mode 100644 drivers/gpio/gpio-bd70528.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3f50526a771f..2789530a93ae 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -979,6 +979,17 @@ config GPIO_ARIZONA help Support for GPIOs on Wolfson Arizona class devices. +config GPIO_BD70528 + tristate "ROHM BD70528 GPIO support" + depends on MFD_ROHM_BD70528 + help + Support for GPIOs on ROHM BD70528 PMIC. There are four GPIOs + available on the ROHM PMIC in total. The GPIOs can also + generate interrupts. + + This driver can also be built as a module. If so, the module + will be called gpio-bd70528. + config GPIO_BD9571MWV tristate "ROHM BD9571 GPIO support" depends on MFD_BD9571MWV diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 54d55274b93a..e93e376bae0b 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o +obj-$(CONFIG_GPIO_BD70528) += gpio-bd70528.o obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o diff --git a/drivers/gpio/gpio-bd70528.c b/drivers/gpio/gpio-bd70528.c new file mode 100644 index 000000000000..fd85605d2dab --- /dev/null +++ b/drivers/gpio/gpio-bd70528.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 ROHM Semiconductors +// gpio-bd70528.c ROHM BD70528MWV gpio driver + +#include +#include +#include +#include +#include + +#define GPIO_IN_REG(offset) (BD70528_REG_GPIO1_IN + (offset) * 2) +#define GPIO_OUT_REG(offset) (BD70528_REG_GPIO1_OUT + (offset) * 2) + +struct bd70528_gpio { + struct rohm_regmap_dev chip; + struct gpio_chip gpio; +}; + +static int bd70528_set_debounce(struct bd70528_gpio *bdgpio, + unsigned int offset, unsigned int debounce) +{ + u8 val; + + switch (debounce) { + case 0: + val = BD70528_DEBOUNCE_DISABLE; + break; + case 1 ... 15: + val = BD70528_DEBOUNCE_15MS; + break; + case 16 ... 30: + val = BD70528_DEBOUNCE_30MS; + break; + case 31 ... 50: + val = BD70528_DEBOUNCE_50MS; + break; + default: + dev_err(bdgpio->chip.dev, + "Invalid debouce value %u\n", debounce); + return -EINVAL; + } + return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset), + BD70528_DEBOUNCE_MASK, val); +} + +static int bd70528_get_direction(struct gpio_chip *chip, unsigned int offset) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + int val, ret; + + /* Do we need to do something to IRQs here? */ + ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val); + if (ret) { + dev_err(bdgpio->chip.dev, "Could not read gpio direction\n"); + return ret; + } + + return !(val & BD70528_GPIO_OUT_EN_MASK); +} + +static int bd70528_gpio_set_config(struct gpio_chip *chip, unsigned int offset, + unsigned long config) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + switch (pinconf_to_config_param(config)) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + return regmap_update_bits(bdgpio->chip.regmap, + GPIO_OUT_REG(offset), + BD70528_GPIO_DRIVE_MASK, + BD70528_GPIO_OPEN_DRAIN); + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + return regmap_update_bits(bdgpio->chip.regmap, + GPIO_OUT_REG(offset), + BD70528_GPIO_DRIVE_MASK, + BD70528_GPIO_PUSH_PULL); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + return bd70528_set_debounce(bdgpio, offset, + pinconf_to_config_argument(config)); + break; + default: + break; + } + return -ENOTSUPP; +} + +static int bd70528_direction_input(struct gpio_chip *chip, unsigned int offset) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + /* Do we need to do something to IRQs here? */ + return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_EN_MASK, + BD70528_GPIO_OUT_DISABLE); +} + +static void bd70528_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + int ret; + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + u8 val = (value) ? BD70528_GPIO_OUT_HI : BD70528_GPIO_OUT_LO; + + ret = regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_MASK, val); + if (ret) + dev_err(bdgpio->chip.dev, "Could not set gpio to %d\n", value); +} + +static int bd70528_direction_output(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + bd70528_gpio_set(chip, offset, value); + return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset), + BD70528_GPIO_OUT_EN_MASK, + BD70528_GPIO_OUT_ENABLE); +} + +#define GPIO_IN_STATE_MASK(offset) (BD70528_GPIO_IN_STATE_BASE << (offset)) + +static int bd70528_gpio_get_o(struct bd70528_gpio *bdgpio, unsigned int offset) +{ + int ret; + unsigned int val; + + ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val); + if (!ret) + ret = !!(val & BD70528_GPIO_OUT_MASK); + else + dev_err(bdgpio->chip.dev, "GPIO (out) state read failed\n"); + + return ret; +} + +static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset) +{ + unsigned int val; + int ret; + + ret = regmap_read(bdgpio->chip.regmap, BD70528_REG_GPIO_STATE, &val); + + if (!ret) + ret = !(val & GPIO_IN_STATE_MASK(offset)); + else + dev_err(bdgpio->chip.dev, "GPIO (in) state read failed\n"); + + return ret; +} + +static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + int ret = -EINVAL; + struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); + + /* + * There is a race condition where someone might be changing the + * GPIO direction after we get it but before we read the value. But + * application design where GPIO direction may be changed just when + * we read GPIO value would be pointless as reader could not know + * whether the returned high/low state is caused by input or output. + * Or then there must be other ways to mitigate the issue. Thus + * locking would make no sense. + */ + ret = bd70528_get_direction(chip, offset); + if (ret == 0) + ret = bd70528_gpio_get_o(bdgpio, offset); + else if (ret == 1) + ret = bd70528_gpio_get_i(bdgpio, offset); + else + dev_err(bdgpio->chip.dev, "failed to read GPIO direction\n"); + + return ret; +} + +static int bd70528_probe(struct platform_device *pdev) +{ + struct bd70528_gpio *bdgpio; + struct rohm_regmap_dev *bd70528; + int ret; + + bd70528 = dev_get_drvdata(pdev->dev.parent); + if (!bd70528) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + + bdgpio = devm_kzalloc(&pdev->dev, sizeof(*bdgpio), + GFP_KERNEL); + if (!bdgpio) + return -ENOMEM; + bdgpio->chip.dev = &pdev->dev; + bdgpio->gpio.parent = pdev->dev.parent; + bdgpio->gpio.label = "bd70528-gpio"; + bdgpio->gpio.owner = THIS_MODULE; + bdgpio->gpio.get_direction = bd70528_get_direction; + bdgpio->gpio.direction_input = bd70528_direction_input; + bdgpio->gpio.direction_output = bd70528_direction_output; + bdgpio->gpio.set_config = bd70528_gpio_set_config; + bdgpio->gpio.can_sleep = true; + bdgpio->gpio.get = bd70528_gpio_get; + bdgpio->gpio.set = bd70528_gpio_set; + bdgpio->gpio.ngpio = 4; + bdgpio->gpio.base = -1; +#ifdef CONFIG_OF_GPIO + bdgpio->gpio.of_node = pdev->dev.parent->of_node; +#endif + bdgpio->chip.regmap = bd70528->regmap; + + ret = devm_gpiochip_add_data(&pdev->dev, &bdgpio->gpio, + bdgpio); + if (ret) + dev_err(&pdev->dev, "gpio_init: Failed to add bd70528-gpio\n"); + + return ret; +} + +static struct platform_driver bd70528_gpio = { + .driver = { + .name = "bd70528-gpio" + }, + .probe = bd70528_probe, +}; + +module_platform_driver(bd70528_gpio); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 voltage regulator driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Apr 3 12:48:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883703 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D8971390 for ; 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Wed, 03 Apr 2019 05:48:09 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id 15sm2974667lft.88.2019.04.03.05.48.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:48:08 -0700 (PDT) Date: Wed, 3 Apr 2019 15:48:01 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 6/8] rtc: bd70528: Initial support for ROHM bd70528 RTC Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Support RTC block in ROHM bd70528 power management IC. Support getting and setting the time and date as well as arming an alarm which can also be used to wake the PMIC from standby state. HW supports wake interrupt only for the next 24 hours (sec, minute and hour information only) so we limit also the alarm interrupt to this 24 hours for the sake of consistency. Signed-off-by: Matti Vaittinen Acked-by: Alexandre Belloni --- Changelog v12: - No functional changes - Few styling fixes drivers/rtc/Kconfig | 8 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-bd70528.c | 500 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 509 insertions(+) create mode 100644 drivers/rtc/rtc-bd70528.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index a71734c41693..7976c8a96be4 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -497,6 +497,14 @@ config RTC_DRV_M41T80_WDT help If you say Y here you will get support for the watchdog timer in the ST M41T60 and M41T80 RTC chips series. +config RTC_DRV_BD70528 + tristate "ROHM BD70528 PMIC RTC" + help + If you say Y here you will get support for the RTC + on ROHM BD70528 Power Management IC. + + This driver can also be built as a module. If so, the module + will be called rtc-bd70528. config RTC_DRV_BQ32K tristate "TI BQ32000" diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index fe3962496685..59a8e606c071 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_RTC_DRV_ASM9260) += rtc-asm9260.o obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o obj-$(CONFIG_RTC_DRV_AU1XXX) += rtc-au1xxx.o +obj-$(CONFIG_RTC_DRV_BD70528) += rtc-bd70528.o obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o obj-$(CONFIG_RTC_DRV_BRCMSTB) += rtc-brcmstb-waketimer.o diff --git a/drivers/rtc/rtc-bd70528.c b/drivers/rtc/rtc-bd70528.c new file mode 100644 index 000000000000..f9bdd555e1a2 --- /dev/null +++ b/drivers/rtc/rtc-bd70528.c @@ -0,0 +1,500 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2018 ROHM Semiconductors +// +// RTC driver for ROHM BD70528 PMIC + +#include +#include +#include +#include +#include +#include +#include + +/* + * We read regs RTC_SEC => RTC_YEAR + * this struct is ordered according to chip registers. + * Keep it u8 only to avoid padding issues. + */ +struct bd70528_rtc_day { + u8 sec; + u8 min; + u8 hour; +} __packed; + +struct bd70528_rtc_data { + struct bd70528_rtc_day time; + u8 week; + u8 day; + u8 month; + u8 year; +} __packed; + +struct bd70528_rtc_wake { + struct bd70528_rtc_day time; + u8 ctrl; +} __packed; + +struct bd70528_rtc_alm { + struct bd70528_rtc_data data; + u8 alm_mask; + u8 alm_repeat; +} __packed; + +struct bd70528_rtc { + struct rohm_regmap_dev *mfd; + struct device *dev; +}; + +static int bd70528_set_wake(struct rohm_regmap_dev *bd70528, + int enable, int *old_state) +{ + int ret; + unsigned int ctrl_reg; + + ret = regmap_read(bd70528->regmap, BD70528_REG_WAKE_EN, &ctrl_reg); + if (ret) + return ret; + + if (old_state) { + if (ctrl_reg & BD70528_MASK_WAKE_EN) + *old_state |= BD70528_WAKE_STATE_BIT; + else + *old_state &= ~BD70528_WAKE_STATE_BIT; + + if (!enable == !(*old_state & BD70528_WAKE_STATE_BIT)) + return 0; + } + + if (enable) + ctrl_reg |= BD70528_MASK_WAKE_EN; + else + ctrl_reg &= ~BD70528_MASK_WAKE_EN; + + return regmap_write(bd70528->regmap, BD70528_REG_WAKE_EN, + ctrl_reg); +} + +static int bd70528_set_elapsed_tmr(struct rohm_regmap_dev *bd70528, + int enable, int *old_state) +{ + int ret; + unsigned int ctrl_reg; + + /* + * TBD + * What is the purpose of elapsed timer ? + * Is the timeout registers counting down, or is the disable - re-enable + * going to restart the elapsed-time counting? If counting is restarted + * the timeout should be decreased by the amount of time that has + * elapsed since starting the timer. Maybe we should store the monotonic + * clock value when timer is started so that if RTC is set while timer + * is armed we could do the compensation. This is a hack if RTC/system + * clk are drifting. OTOH, RTC controlled via I2C is in any case + * inaccurate... + */ + ret = regmap_read(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, + &ctrl_reg); + if (ret) + return ret; + + if (old_state) { + if (ctrl_reg & BD70528_MASK_ELAPSED_TIMER_EN) + *old_state |= BD70528_ELAPSED_STATE_BIT; + else + *old_state &= ~BD70528_ELAPSED_STATE_BIT; + + if ((!enable) == (!(*old_state & BD70528_ELAPSED_STATE_BIT))) + return 0; + } + + if (enable) + ctrl_reg |= BD70528_MASK_ELAPSED_TIMER_EN; + else + ctrl_reg &= ~BD70528_MASK_ELAPSED_TIMER_EN; + + return regmap_write(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, + ctrl_reg); +} + +static int bd70528_set_rtc_based_timers(struct bd70528_rtc *r, int new_state, + int *old_state) +{ + int ret; + + ret = bd70528_wdt_set(r->mfd, new_state & BD70528_WDT_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable WDG for RTC setting (%d)\n", ret); + return ret; + } + ret = bd70528_set_elapsed_tmr(r->mfd, + new_state & BD70528_ELAPSED_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable 'elapsed timer' for RTC setting\n"); + return ret; + } + ret = bd70528_set_wake(r->mfd, new_state & BD70528_WAKE_STATE_BIT, + old_state); + if (ret) { + dev_err(r->dev, + "Failed to disable 'wake timer' for RTC setting\n"); + return ret; + } + + return ret; +} + +static int bd70528_re_enable_rtc_based_timers(struct bd70528_rtc *r, + int old_state) +{ + return bd70528_set_rtc_based_timers(r, old_state, NULL); +} + +static int bd70528_disable_rtc_based_timers(struct bd70528_rtc *r, + int *old_state) +{ + return bd70528_set_rtc_based_timers(r, 0, old_state); +} + +static inline void tmday2rtc(struct rtc_time *t, struct bd70528_rtc_day *d) +{ + d->sec &= ~BD70528_MASK_RTC_SEC; + d->min &= ~BD70528_MASK_RTC_MINUTE; + d->hour &= ~BD70528_MASK_RTC_HOUR; + d->sec |= bin2bcd(t->tm_sec); + d->min |= bin2bcd(t->tm_min); + d->hour |= bin2bcd(t->tm_hour); +} + +static inline void tm2rtc(struct rtc_time *t, struct bd70528_rtc_data *r) +{ + r->day &= ~BD70528_MASK_RTC_DAY; + r->week &= ~BD70528_MASK_RTC_WEEK; + r->month &= ~BD70528_MASK_RTC_MONTH; + /* + * PM and 24H bits are not used by Wake - thus we clear them + * here and not in tmday2rtc() which is also used by wake. + */ + r->time.hour &= ~(BD70528_MASK_RTC_HOUR_PM | BD70528_MASK_RTC_HOUR_24H); + + tmday2rtc(t, &r->time); + /* + * We do always set time in 24H mode. + */ + r->time.hour |= BD70528_MASK_RTC_HOUR_24H; + r->day |= bin2bcd(t->tm_mday); + r->week |= bin2bcd(t->tm_wday); + r->month |= bin2bcd(t->tm_mon + 1); + r->year = bin2bcd(t->tm_year - 100); +} + +static inline void rtc2tm(struct bd70528_rtc_data *r, struct rtc_time *t) +{ + t->tm_sec = bcd2bin(r->time.sec & BD70528_MASK_RTC_SEC); + t->tm_min = bcd2bin(r->time.min & BD70528_MASK_RTC_MINUTE); + t->tm_hour = bcd2bin(r->time.hour & BD70528_MASK_RTC_HOUR); + /* + * If RTC is in 12H mode, then bit BD70528_MASK_RTC_HOUR_PM + * is not BCD value but tells whether it is AM or PM + */ + if (!(r->time.hour & BD70528_MASK_RTC_HOUR_24H)) { + t->tm_hour %= 12; + if (r->time.hour & BD70528_MASK_RTC_HOUR_PM) + t->tm_hour += 12; + } + t->tm_mday = bcd2bin(r->day & BD70528_MASK_RTC_DAY); + t->tm_mon = bcd2bin(r->month & BD70528_MASK_RTC_MONTH) - 1; + t->tm_year = 100 + bcd2bin(r->year & BD70528_MASK_RTC_YEAR); + t->tm_wday = bcd2bin(r->week & BD70528_MASK_RTC_WEEK); +} + +static int bd70528_set_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + struct bd70528_rtc_wake wake; + struct bd70528_rtc_alm alm; + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_WAKE_START, + &wake, sizeof(wake)); + if (ret) { + dev_err(dev, "Failed to read wake regs\n"); + return ret; + } + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "Failed to read alarm regs\n"); + return ret; + } + + tm2rtc(&a->time, &alm.data); + tmday2rtc(&a->time, &wake.time); + + if (a->enabled) { + alm.alm_mask &= ~BD70528_MASK_ALM_EN; + wake.ctrl |= BD70528_MASK_WAKE_EN; + } else { + alm.alm_mask |= BD70528_MASK_ALM_EN; + wake.ctrl &= ~BD70528_MASK_WAKE_EN; + } + + ret = regmap_bulk_write(bd70528->regmap, + BD70528_REG_RTC_WAKE_START, &wake, + sizeof(wake)); + if (ret) { + dev_err(dev, "Failed to set wake time\n"); + return ret; + } + ret = regmap_bulk_write(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) + dev_err(dev, "Failed to set alarm time\n"); + + return ret; +} + +static int bd70528_read_alarm(struct device *dev, struct rtc_wkalrm *a) +{ + struct bd70528_rtc_alm alm; + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = regmap_bulk_read(bd70528->regmap, BD70528_REG_RTC_ALM_START, + &alm, sizeof(alm)); + if (ret) { + dev_err(dev, "Failed to read alarm regs\n"); + return ret; + } + + rtc2tm(&alm.data, &a->time); + a->time.tm_mday = -1; + a->time.tm_mon = -1; + a->time.tm_year = -1; + a->enabled = !(alm.alm_mask & BD70528_MASK_ALM_EN); + a->pending = 0; + + return 0; +} + +static int bd70528_set_time_locked(struct device *dev, struct rtc_time *t) +{ + int ret, tmpret, old_states; + struct bd70528_rtc_data rtc_data; + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + + ret = bd70528_disable_rtc_based_timers(r, &old_states); + if (ret) + return ret; + + tmpret = regmap_bulk_read(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (tmpret) { + dev_err(dev, "Failed to read RTC time registers\n"); + goto renable_out; + } + tm2rtc(t, &rtc_data); + + tmpret = regmap_bulk_write(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (tmpret) { + dev_err(dev, "Failed to set RTC time\n"); + goto renable_out; + } + +renable_out: + ret = bd70528_re_enable_rtc_based_timers(r, old_states); + if (tmpret) + ret = tmpret; + + return ret; +} + +static int bd70528_set_time(struct device *dev, struct rtc_time *t) +{ + int ret; + struct bd70528_rtc *r = dev_get_drvdata(dev); + + bd70528_wdt_lock(r->mfd); + ret = bd70528_set_time_locked(dev, t); + bd70528_wdt_unlock(r->mfd); + return ret; +} + +static int bd70528_get_time(struct device *dev, struct rtc_time *t) +{ + struct bd70528_rtc *r = dev_get_drvdata(dev); + struct rohm_regmap_dev *bd70528 = r->mfd; + struct bd70528_rtc_data rtc_data; + int ret; + + /* read the RTC date and time registers all at once */ + ret = regmap_bulk_read(bd70528->regmap, + BD70528_REG_RTC_START, &rtc_data, + sizeof(rtc_data)); + if (ret) { + dev_err(dev, "Failed to read RTC time (err %d)\n", ret); + return ret; + } + + rtc2tm(&rtc_data, t); + + return 0; +} + +static int bd70528_alm_enable(struct device *dev, unsigned int enabled) +{ + int ret; + unsigned int enableval = BD70528_MASK_ALM_EN; + struct bd70528_rtc *r = dev_get_drvdata(dev); + + if (enabled) + enableval = 0; + + bd70528_wdt_lock(r->mfd); + ret = bd70528_set_wake(r->mfd, enabled, NULL); + if (ret) { + dev_err(dev, "Failed to change wake state\n"); + goto out_unlock; + } + ret = regmap_update_bits(r->mfd->regmap, BD70528_REG_RTC_ALM_MASK, + BD70528_MASK_ALM_EN, enableval); + if (ret) + dev_err(dev, "Failed to change alarm state\n"); + +out_unlock: + bd70528_wdt_unlock(r->mfd); + return ret; +} + +static const struct rtc_class_ops bd70528_rtc_ops = { + .read_time = bd70528_get_time, + .set_time = bd70528_set_time, + .read_alarm = bd70528_read_alarm, + .set_alarm = bd70528_set_alarm, + .alarm_irq_enable = bd70528_alm_enable, +}; + +static irqreturn_t alm_hndlr(int irq, void *data) +{ + struct rtc_device *rtc = data; + + rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF | RTC_PF); + return IRQ_HANDLED; +} + +static int bd70528_probe(struct platform_device *pdev) +{ + struct bd70528_rtc *bd_rtc; + struct rohm_regmap_dev *mfd; + int ret; + struct rtc_device *rtc; + int irq; + unsigned int hr; + + mfd = dev_get_drvdata(pdev->dev.parent); + if (!mfd) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + bd_rtc = devm_kzalloc(&pdev->dev, sizeof(*bd_rtc), GFP_KERNEL); + if (!bd_rtc) + return -ENOMEM; + + bd_rtc->mfd = mfd; + bd_rtc->dev = &pdev->dev; + + irq = platform_get_irq_byname(pdev, "bd70528-rtc-alm"); + + if (irq < 0) { + dev_err(&pdev->dev, "Failed to get irq\n"); + return irq; + } + + platform_set_drvdata(pdev, bd_rtc); + + ret = regmap_read(mfd->regmap, BD70528_REG_RTC_HOUR, &hr); + + if (ret) { + dev_err(&pdev->dev, "Failed to reag RTC clock\n"); + return ret; + } + + if (!(hr & BD70528_MASK_RTC_HOUR_24H)) { + struct rtc_time t; + + ret = bd70528_get_time(&pdev->dev, &t); + + if (!ret) + ret = bd70528_set_time(&pdev->dev, &t); + + if (ret) { + dev_err(&pdev->dev, + "Setting 24H clock for RTC failed\n"); + return ret; + } + } + + device_set_wakeup_capable(&pdev->dev, true); + device_wakeup_enable(&pdev->dev); + + rtc = devm_rtc_allocate_device(&pdev->dev); + if (IS_ERR(rtc)) { + dev_err(&pdev->dev, "RTC device creation failed\n"); + return PTR_ERR(rtc); + } + + rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; + rtc->range_max = RTC_TIMESTAMP_END_2099; + rtc->ops = &bd70528_rtc_ops; + + /* Request alarm IRQ prior to registerig the RTC */ + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, &alm_hndlr, + IRQF_ONESHOT, "bd70528-rtc", rtc); + if (ret) + return ret; + + /* + * BD70528 irq controller is not touching the main mask register. + * So enable the RTC block interrupts at main level. We can just + * leave them enabled as irq-controller should disable irqs + * from sub-registers when IRQ is disabled or freed. + */ + ret = regmap_update_bits(mfd->regmap, + BD70528_REG_INT_MAIN_MASK, + BD70528_INT_RTC_MASK, 0); + if (ret) { + dev_err(&pdev->dev, "Failed to enable RTC interrupts\n"); + return ret; + } + + ret = rtc_register_device(rtc); + if (ret) + dev_err(&pdev->dev, "Registering RTC failed\n"); + + return ret; +} + +static struct platform_driver bd70528_rtc = { + .driver = { + .name = "bd70528-rtc" + }, + .probe = bd70528_probe, +}; + +module_platform_driver(bd70528_rtc); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 RTC driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Apr 3 12:48:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883707 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EC610139A for ; Wed, 3 Apr 2019 12:49:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C745028868 for ; Wed, 3 Apr 2019 12:49:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BAA39288DD; Wed, 3 Apr 2019 12:49:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 592A628868 for ; Wed, 3 Apr 2019 12:49:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726655AbfDCMtE (ORCPT ); Wed, 3 Apr 2019 08:49:04 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:37988 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726074AbfDCMtE (ORCPT ); Wed, 3 Apr 2019 08:49:04 -0400 Received: by mail-lf1-f68.google.com with SMTP id a6so11640212lfl.5; Wed, 03 Apr 2019 05:49:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=kuo8epCriyucR+6s8YV8PCoOUY0YkmzgZpjFfTT4Ero=; b=R9AQb2nERU90MCfQG9Gha4jlCMxcvNOmIsvatyp2hbkqTxnruyzZlmVGBfUC9YuM1y Qp/VT2JxtvFFs3MiroAxnsrjcvH7x9nqvXRQl4CygMENX9Zx+iqbaNW8Fcs4ZcNvw/dL nl6AbwOemfn7oH4hfU294EYxhbWXRyPlA3AQzUG8nyCgEo+Fuwj5VszVlIuCue0oxfV6 ucxco/lI3DaoL8wobYlP/wW1lbNYc4DIxJSkNEw01N0Rx1GKfpRdtMmhA+44xPJjMuD9 6Xignyr/gfIRUbmotSCZ8WshEx4RUEg/mpWj+FDSasOd4oDpnRBTp+HyrE4T5pUFhpCs mn1A== X-Gm-Message-State: APjAAAVKD5P7vy7oKHMcPxAyYSK5vIrlhDqFbnFCJm/BmdyEDMQZfysa o0SvDzk6gI+nANhp/ErcAAA= X-Google-Smtp-Source: APXvYqx8EZcuhuQFROLppyVveZBY7uZABscraaLd1NWke3/eO0QQd5/YXygmNoZOdWbVYTDNgGXV7w== X-Received: by 2002:a19:4a49:: with SMTP id x70mr6973180lfa.11.1554295739176; Wed, 03 Apr 2019 05:48:59 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id k21sm3209084ljk.21.2019.04.03.05.48.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 05:48:58 -0700 (PDT) Date: Wed, 3 Apr 2019 15:48:51 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 7/8] power: supply: Initial support for ROHM BD70528 PMIC charger block Message-ID: <8bfcf193f1981caf0916e2035a2776b06b3c96b9.1554294791.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ROHM BD70528 PMIC includes battery charger block. Support charger staus queries and doing few basic settings like input current limit and charging current. Signed-off-by: Matti Vaittinen --- Changelog v12: - Styling fixes only drivers/power/supply/Kconfig | 9 + drivers/power/supply/Makefile | 1 + drivers/power/supply/bd70528-charger.c | 742 +++++++++++++++++++++++++ 3 files changed, 752 insertions(+) create mode 100644 drivers/power/supply/bd70528-charger.c diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index e901b9879e7e..903c97a67bf0 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -660,4 +660,13 @@ config FUEL_GAUGE_SC27XX Say Y here to enable support for fuel gauge with SC27XX PMIC chips. +config CHARGER_BD70528 + tristate "ROHM bd70528 charger driver" + depends on MFD_ROHM_BD70528 + default n + help + Say Y here to enable support for getting battery status + information and altering charger configurations from charger + block of the ROHM BD70528 Power Management IC. + endif # POWER_SUPPLY diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index b731c2a9b695..c60387b04bfa 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -87,3 +87,4 @@ obj-$(CONFIG_AXP288_CHARGER) += axp288_charger.o obj-$(CONFIG_CHARGER_CROS_USBPD) += cros_usbpd-charger.o obj-$(CONFIG_CHARGER_SC2731) += sc2731_charger.o obj-$(CONFIG_FUEL_GAUGE_SC27XX) += sc27xx_fuel_gauge.o +obj-$(CONFIG_CHARGER_BD70528) += bd70528-charger.o diff --git a/drivers/power/supply/bd70528-charger.c b/drivers/power/supply/bd70528-charger.c new file mode 100644 index 000000000000..c466c7b665ff --- /dev/null +++ b/drivers/power/supply/bd70528-charger.c @@ -0,0 +1,742 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2018 ROHM Semiconductors +// +// power-supply driver for ROHM BD70528 PMIC + +/* + * BD70528 charger HW state machine. + * + * The thermal shutdown state is not drawn. From any other state but + * battery error and suspend it is possible to go to TSD/TMP states + * if temperature is out of bounds. + * + * CHG_RST = H + * or CHG_EN=L + * or (DCIN2_UVLO=L && DCIN1_UVLO=L) + * or (DCIN2_OVLO=H & DCIN1_UVKLO=L) + * + * +--------------+ +--------------+ + * | | | | + * | Any state +-------> | Suspend | + * | | | | + * +--------------+ +------+-------+ + * | + * CHG_EN = H && BAT_DET = H && | + * No errors (temp, bat_ov, UVLO, | + * OVLO...) | + * | + * BAT_OV or +---------v----------+ + * (DBAT && TTRI) | | + * +-----------------+ Trickle Charge | <---------------+ + * | | | | + * | +-------+------------+ | + * | | | + * | | ^ | + * | V_BAT > VTRI_TH | | VBAT < VTRI_TH - 50mV | + * | | | | + * | v | | + * | | | + * | BAT_OV or +----------+----+ | + * | (DBAT && TFST) | | | + * | +----------------+ Fast Charge | | + * | | | | | + * v v +----+----------+ | + * | | + *+----------------+ ILIM_DET=L | ^ ILIM_DET | + *| | & CV_DET=H | | or CV_DET=L | + *| Battery Error | & VBAT > | | or VBAT < VRECHG_TH | + *| | VRECHG_TH | | or IBAT > IFST/x | + *+----------------+ & IBAT < | | | + * IFST/x v | | + * ^ | | + * | +---------+-+ | + * | | | | + * +-------------------+ Top OFF | | + * BAT_OV = H or | | | + * (DBAT && TFST) +-----+-----+ | + * | | + * Stay top-off for 15s | | + * v | + * | + * +--------+ | + * | | | + * | Done +-------------------------+ + * | | + * +--------+ VBAT < VRECHG_TH + */ + +#include +#include +#include +#include +#include +#include + +#define CHG_STAT_SUSPEND 0x0 +#define CHG_STAT_TRICKLE 0x1 +#define CHG_STAT_FAST 0x3 +#define CHG_STAT_TOPOFF 0xe +#define CHG_STAT_DONE 0xf +#define CHG_STAT_OTP_TRICKLE 0x10 +#define CHG_STAT_OTP_FAST 0x11 +#define CHG_STAT_OTP_DONE 0x12 +#define CHG_STAT_TSD_TRICKLE 0x20 +#define CHG_STAT_TSD_FAST 0x21 +#define CHG_STAT_TSD_TOPOFF 0x22 +#define CHG_STAT_BAT_ERR 0x7f + +static const char *bd70528_charger_model = "BD70528"; +static const char *bd70528_charger_manufacturer = "ROHM Semiconductors"; + +#define BD_ERR_IRQ_HND(_name_, _wrn_) \ +static irqreturn_t bd0528_##_name_##_interrupt(int irq, void *arg) \ +{ \ + struct power_supply *psy = (struct power_supply *)arg; \ + \ + power_supply_changed(psy); \ + dev_err(&psy->dev, (_wrn_)); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_INFO_IRQ_HND(_name_, _wrn_) \ +static irqreturn_t bd0528_##_name_##_interrupt(int irq, void *arg) \ +{ \ + struct power_supply *psy = (struct power_supply *)arg; \ + \ + power_supply_changed(psy); \ + dev_dbg(&psy->dev, (_wrn_)); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_IRQ_HND(_name_) bd0528_##_name_##_interrupt + +struct bd70528_psy { + struct rohm_regmap_dev chip; + struct power_supply *psy; +}; + +BD_ERR_IRQ_HND(BAT_OV_DET, "Battery overvoltage detected\n"); +BD_ERR_IRQ_HND(DBAT_DET, "Dead battery detected\n"); +BD_ERR_IRQ_HND(COLD_DET, "Battery cold\n"); +BD_ERR_IRQ_HND(HOT_DET, "Battery hot\n"); +BD_ERR_IRQ_HND(CHG_TSD, "Charger thermal shutdown\n"); +BD_ERR_IRQ_HND(DCIN2_OV_DET, "DCIN2 overvoltage detected\n"); + +BD_INFO_IRQ_HND(BAT_OV_RES, "Battery voltage back to normal\n"); +BD_INFO_IRQ_HND(COLD_RES, "Battery temperature back to normal\n"); +BD_INFO_IRQ_HND(HOT_RES, "Battery temperature back to normal\n"); +BD_INFO_IRQ_HND(BAT_RMV, "Battery removed\n"); +BD_INFO_IRQ_HND(BAT_DET, "Battery detected\n"); +BD_INFO_IRQ_HND(DCIN2_OV_RES, "DCIN2 voltage back to normal\n"); +BD_INFO_IRQ_HND(DCIN2_RMV, "DCIN2 removed\n"); +BD_INFO_IRQ_HND(DCIN2_DET, "DCIN2 detected\n"); +BD_INFO_IRQ_HND(DCIN1_RMV, "DCIN1 removed\n"); +BD_INFO_IRQ_HND(DCIN1_DET, "DCIN1 detected\n"); + +struct irq_name_pair { + const char *n; + irqreturn_t (*h)(int irq, void *arg); +}; + +static int bd70528_get_irqs(struct platform_device *pdev, + struct bd70528_psy *bdpsy) +{ + int irq, i, ret; + unsigned int mask; + struct irq_name_pair bd70528_chg_irqs[] = { + { .n = "bd70528-bat-ov-res", .h = BD_IRQ_HND(BAT_OV_RES) }, + { .n = "bd70528-bat-ov-det", .h = BD_IRQ_HND(BAT_OV_DET) }, + { .n = "bd70528-bat-dead", .h = BD_IRQ_HND(DBAT_DET) }, + { .n = "bd70528-bat-warmed", .h = BD_IRQ_HND(COLD_RES) }, + { .n = "bd70528-bat-cold", .h = BD_IRQ_HND(COLD_DET) }, + { .n = "bd70528-bat-cooled", .h = BD_IRQ_HND(HOT_RES) }, + { .n = "bd70528-bat-hot", .h = BD_IRQ_HND(HOT_DET) }, + { .n = "bd70528-chg-tshd", .h = BD_IRQ_HND(CHG_TSD) }, + { .n = "bd70528-bat-removed", .h = BD_IRQ_HND(BAT_RMV) }, + { .n = "bd70528-bat-detected", .h = BD_IRQ_HND(BAT_DET) }, + { .n = "bd70528-dcin2-ov-res", .h = BD_IRQ_HND(DCIN2_OV_RES) }, + { .n = "bd70528-dcin2-ov-det", .h = BD_IRQ_HND(DCIN2_OV_DET) }, + { .n = "bd70528-dcin2-removed", .h = BD_IRQ_HND(DCIN2_RMV) }, + { .n = "bd70528-dcin2-detected", .h = BD_IRQ_HND(DCIN2_DET) }, + { .n = "bd70528-dcin1-removed", .h = BD_IRQ_HND(DCIN1_RMV) }, + { .n = "bd70528-dcin1-detected", .h = BD_IRQ_HND(DCIN1_DET) }, + }; + + for (i = 0; i < ARRAY_SIZE(bd70528_chg_irqs); i++) { + irq = platform_get_irq_byname(pdev, bd70528_chg_irqs[i].n); + if (irq < 0) { + dev_err(&pdev->dev, "Bad IRQ information for %s (%d)\n", + bd70528_chg_irqs[i].n, irq); + return irq; + } + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + bd70528_chg_irqs[i].h, + IRQF_ONESHOT, + bd70528_chg_irqs[i].n, + bdpsy->psy); + + if (ret) + return ret; + } + /* + * BD70528 irq controller is not touching the main mask register. + * So enable the charger block interrupts at main level. We can just + * leave them enabled as irq-controller should disable irqs + * from sub-registers when IRQ is disabled or freed. + */ + mask = BD70528_REG_INT_BAT1_MASK | BD70528_REG_INT_BAT2_MASK; + ret = regmap_update_bits(bdpsy->chip.regmap, + BD70528_REG_INT_MAIN_MASK, mask, 0); + if (ret) + dev_err(&pdev->dev, "Failed to enable charger IRQs\n"); + + return ret; +} + +static int bd70528_get_charger_status(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_CURR_STAT, &v); + if (ret) { + dev_err(bdpsy->chip.dev, "Charger state read failure %d\n", + ret); + return ret; + } + + switch (v & BD70528_MASK_CHG_STAT) { + case CHG_STAT_SUSPEND: + /* Maybe we should check the CHG_TTRI_EN? */ + case CHG_STAT_OTP_TRICKLE: + case CHG_STAT_OTP_FAST: + case CHG_STAT_OTP_DONE: + case CHG_STAT_TSD_TRICKLE: + case CHG_STAT_TSD_FAST: + case CHG_STAT_TSD_TOPOFF: + case CHG_STAT_BAT_ERR: + *val = POWER_SUPPLY_STATUS_NOT_CHARGING; + break; + case CHG_STAT_DONE: + *val = POWER_SUPPLY_STATUS_FULL; + break; + case CHG_STAT_TRICKLE: + case CHG_STAT_FAST: + case CHG_STAT_TOPOFF: + *val = POWER_SUPPLY_STATUS_CHARGING; + break; + default: + *val = POWER_SUPPLY_STATUS_UNKNOWN; + break; + } + + return 0; +} + +static int bd70528_get_charge_type(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_CURR_STAT, &v); + if (ret) { + dev_err(bdpsy->chip.dev, "Charger state read failure %d\n", + ret); + return ret; + } + + switch (v & BD70528_MASK_CHG_STAT) { + case CHG_STAT_TRICKLE: + *val = POWER_SUPPLY_CHARGE_TYPE_TRICKLE; + break; + case CHG_STAT_FAST: + case CHG_STAT_TOPOFF: + *val = POWER_SUPPLY_CHARGE_TYPE_FAST; + break; + case CHG_STAT_DONE: + case CHG_STAT_SUSPEND: + /* Maybe we should check the CHG_TTRI_EN? */ + case CHG_STAT_OTP_TRICKLE: + case CHG_STAT_OTP_FAST: + case CHG_STAT_OTP_DONE: + case CHG_STAT_TSD_TRICKLE: + case CHG_STAT_TSD_FAST: + case CHG_STAT_TSD_TOPOFF: + case CHG_STAT_BAT_ERR: + *val = POWER_SUPPLY_CHARGE_TYPE_NONE; + break; + default: + *val = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN; + break; + } + + return 0; +} + +static int bd70528_get_battery_health(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_BAT_STAT, &v); + if (ret) { + dev_err(bdpsy->chip.dev, "Battery state read failure %d\n", + ret); + return ret; + } + /* No battery? */ + if (!(v & BD70528_MASK_CHG_BAT_DETECT)) + *val = POWER_SUPPLY_HEALTH_DEAD; + else if (v & BD70528_MASK_CHG_BAT_OVERVOLT) + *val = POWER_SUPPLY_HEALTH_OVERVOLTAGE; + else if (v & BD70528_MASK_CHG_BAT_TIMER) + *val = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE; + else + *val = POWER_SUPPLY_HEALTH_GOOD; + + return 0; +} + +static int bd70528_get_online(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_IN_STAT, &v); + if (ret) { + dev_err(bdpsy->chip.dev, "DC1 IN state read failure %d\n", + ret); + return ret; + } + + *val = (v & BD70528_MASK_CHG_DCIN1_UVLO) ? 1 : 0; + + return 0; +} + +static int bd70528_get_present(struct bd70528_psy *bdpsy, int *val) +{ + int ret; + unsigned int v; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_BAT_STAT, &v); + if (ret) { + dev_err(bdpsy->chip.dev, "Battery state read failure %d\n", + ret); + return ret; + } + + *val = (v & BD70528_MASK_CHG_BAT_DETECT) ? 1 : 0; + + return 0; +} + +struct linear_range { + int min; + int step; + int vals; + int low_sel; +}; + +struct linear_range current_limit_ranges[] = { + { + .min = 5, + .step = 1, + .vals = 36, + .low_sel = 0, + }, + { + .min = 40, + .step = 5, + .vals = 5, + .low_sel = 0x23, + }, + { + .min = 60, + .step = 20, + .vals = 8, + .low_sel = 0x27, + }, + { + .min = 200, + .step = 50, + .vals = 7, + .low_sel = 0x2e, + } +}; + +/* + * BD70528 would support setting and getting own charge current/ + * voltage for low temperatures. The driver currently only reads + * the charge current at room temperature. We do set both though. + */ +struct linear_range warm_charge_curr[] = { + { + .min = 10, + .step = 10, + .vals = 20, + .low_sel = 0, + }, + { + .min = 200, + .step = 25, + .vals = 13, + .low_sel = 0x13, + }, +}; + +/* + * Cold charge current selectors are identical to warm charge current + * selectors. The difference is that only smaller currents are available + * at cold charge range. + */ +#define MAX_COLD_CHG_CURR_SEL 0x15 +#define MAX_WARM_CHG_CURR_SEL 0x1f +#define MIN_CHG_CURR_SEL 0x0 + +static int find_value_for_selector_low(struct linear_range *r, int selectors, + unsigned int sel, unsigned int *val) +{ + int i; + + for (i = 0; i < selectors; i++) { + if (r[i].low_sel <= sel && r[i].low_sel + r[i].vals >= sel) { + *val = r[i].min + (sel - r[i].low_sel) * r[i].step; + return 0; + } + } + return -EINVAL; +} + +/* + * For BD70528 voltage/current limits we happily accept any value which + * belongs the range. We could check if value matching the selector is + * desired by computing the range min + (sel - sel_low) * range step - but + * I guess it is enough if we use voltage/current which is closest (below) + * the requested? + */ +static int find_selector_for_value_low(struct linear_range *r, int selectors, + unsigned int val, unsigned int *sel, + bool *found) +{ + int i; + int ret = -EINVAL; + + *found = false; + for (i = 0; i < selectors; i++) { + if (r[i].min <= val) { + if (r[i].min + r[i].step * r[i].vals >= val) { + *found = true; + *sel = r[i].low_sel + (val - r[i].min) / + r[i].step; + ret = 0; + break; + } + /* + * If the range max is smaller than requested + * we can set the max supported value from range + */ + *sel = r[i].low_sel + r[i].vals; + ret = 0; + } + } + return ret; +} + +static int get_charge_current(struct bd70528_psy *bdpsy, int *ma) +{ + unsigned int sel; + int ret; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_CHG_CURR_WARM, + &sel); + if (ret) { + dev_err(bdpsy->chip.dev, + "Charge current reading failed (%d)\n", ret); + return ret; + } + + sel &= BD70528_MASK_CHG_CHG_CURR; + + ret = find_value_for_selector_low(&warm_charge_curr[0], + ARRAY_SIZE(warm_charge_curr), sel, + ma); + if (ret) { + dev_err(bdpsy->chip.dev, + "Unknown charge current value 0x%x\n", + sel); + } + + return ret; +} + +static int get_current_limit(struct bd70528_psy *bdpsy, int *ma) +{ + unsigned int sel; + int ret; + + ret = regmap_read(bdpsy->chip.regmap, BD70528_REG_CHG_DCIN_ILIM, + &sel); + + if (ret) { + dev_err(bdpsy->chip.dev, + "Input current limit reading failed (%d)\n", ret); + return ret; + } + + sel &= BD70528_MASK_CHG_DCIN_ILIM; + + ret = find_value_for_selector_low(¤t_limit_ranges[0], + ARRAY_SIZE(current_limit_ranges), sel, + ma); + + if (ret) { + /* Unspecified values mean 500 mA */ + *ma = 500; + } + return 0; +} + +static enum power_supply_property bd70528_charger_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, +}; + +static int bd70528_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct bd70528_psy *bdpsy = power_supply_get_drvdata(psy); + int ret = 0; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + return bd70528_get_charger_status(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_CHARGE_TYPE: + return bd70528_get_charge_type(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_HEALTH: + return bd70528_get_battery_health(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_PRESENT: + return bd70528_get_present(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + ret = get_current_limit(bdpsy, &val->intval); + val->intval *= 1000; + return ret; + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + ret = get_charge_current(bdpsy, &val->intval); + val->intval *= 1000; + return ret; + case POWER_SUPPLY_PROP_ONLINE: + return bd70528_get_online(bdpsy, &val->intval); + case POWER_SUPPLY_PROP_MODEL_NAME: + val->strval = bd70528_charger_model; + return 0; + case POWER_SUPPLY_PROP_MANUFACTURER: + val->strval = bd70528_charger_manufacturer; + return 0; + default: + break; + } + + return -EINVAL; +} + +static int bd70528_prop_is_writable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + return 1; + default: + break; + } + return 0; +} + +static int set_charge_current(struct bd70528_psy *bdpsy, int ma) +{ + unsigned int reg; + int ret = 0, tmpret; + bool found; + + if (ma > 500) { + dev_warn(bdpsy->chip.dev, + "Requested charge current %u exceed maximum (500mA)\n", + ma); + reg = MAX_WARM_CHG_CURR_SEL; + goto set; + } + if (ma < 10) { + dev_err(bdpsy->chip.dev, + "Requested charge current %u smaller than min (10mA)\n", + ma); + reg = MIN_CHG_CURR_SEL; + ret = -EINVAL; + goto set; + } + + ret = find_selector_for_value_low(&warm_charge_curr[0], + ARRAY_SIZE(warm_charge_curr), ma, + ®, &found); + if (ret) { + reg = MIN_CHG_CURR_SEL; + goto set; + } + if (!found) { + /* There was a gap in supported values and we hit it */ + dev_warn(bdpsy->chip.dev, + "Unsupported charge current %u mA\n", ma); + } +set: + + tmpret = regmap_update_bits(bdpsy->chip.regmap, + BD70528_REG_CHG_CHG_CURR_WARM, + BD70528_MASK_CHG_CHG_CURR, reg); + if (tmpret) + dev_err(bdpsy->chip.dev, + "Charge current write failure (%d)\n", tmpret); + + if (reg > MAX_COLD_CHG_CURR_SEL) + reg = MAX_COLD_CHG_CURR_SEL; + + if (!tmpret) + tmpret = regmap_update_bits(bdpsy->chip.regmap, + BD70528_REG_CHG_CHG_CURR_COLD, + BD70528_MASK_CHG_CHG_CURR, reg); + + if (!ret) + ret = tmpret; + + return ret; +} + +#define MAX_CURR_LIMIT_SEL 0x34 +#define MIN_CURR_LIMIT_SEL 0x0 + +static int set_current_limit(struct bd70528_psy *bdpsy, int ma) +{ + unsigned int reg; + int ret = 0, tmpret; + bool found; + + if (ma > 500) { + dev_warn(bdpsy->chip.dev, + "Requested current limit %u exceed maximum (500mA)\n", + ma); + reg = MAX_CURR_LIMIT_SEL; + goto set; + } + if (ma < 5) { + dev_err(bdpsy->chip.dev, + "Requested current limit %u smaller than min (5mA)\n", + ma); + reg = MIN_CURR_LIMIT_SEL; + ret = -EINVAL; + goto set; + } + + ret = find_selector_for_value_low(¤t_limit_ranges[0], + ARRAY_SIZE(current_limit_ranges), ma, + ®, &found); + if (ret) { + reg = MIN_CURR_LIMIT_SEL; + goto set; + } + if (!found) { + /* There was a gap in supported values and we hit it ?*/ + dev_warn(bdpsy->chip.dev, "Unsupported current limit %umA\n", + ma); + } + +set: + tmpret = regmap_update_bits(bdpsy->chip.regmap, + BD70528_REG_CHG_DCIN_ILIM, + BD70528_MASK_CHG_DCIN_ILIM, reg); + + if (!ret) + ret = tmpret; + + return ret; +} + +static int bd70528_charger_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *val) +{ + struct bd70528_psy *bdpsy = power_supply_get_drvdata(psy); + + switch (psp) { + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: + return set_current_limit(bdpsy, val->intval / 1000); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: + return set_charge_current(bdpsy, val->intval / 1000); + default: + break; + } + return -EINVAL; +} + +static const struct power_supply_desc bd70528_charger_desc = { + .name = "bd70528-charger", + .type = POWER_SUPPLY_TYPE_BATTERY, + .properties = bd70528_charger_props, + .num_properties = ARRAY_SIZE(bd70528_charger_props), + .get_property = bd70528_charger_get_property, + .set_property = bd70528_charger_set_property, + .property_is_writeable = bd70528_prop_is_writable, +}; + +static int bd70528_power_probe(struct platform_device *pdev) +{ + struct rohm_regmap_dev *mfd; + struct bd70528_psy *bdpsy; + struct power_supply_config cfg = {}; + + mfd = dev_get_drvdata(pdev->dev.parent); + if (!mfd) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + bdpsy = devm_kzalloc(&pdev->dev, sizeof(*bdpsy), GFP_KERNEL); + if (!bdpsy) + return -ENOMEM; + bdpsy->chip = *mfd; + bdpsy->chip.dev = &pdev->dev; + + platform_set_drvdata(pdev, bdpsy); + cfg.drv_data = bdpsy; + cfg.of_node = pdev->dev.parent->of_node; + + bdpsy->psy = devm_power_supply_register(&pdev->dev, + &bd70528_charger_desc, &cfg); + if (IS_ERR(bdpsy->psy)) { + dev_err(&pdev->dev, "failed: power supply register\n"); + return PTR_ERR(bdpsy->psy); + } + + return bd70528_get_irqs(pdev, bdpsy); +} + +static struct platform_driver bd70528_power = { + .driver = { + .name = "bd70528-power" + }, + .probe = bd70528_power_probe, +}; + +module_platform_driver(bd70528_power); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 power-supply driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Apr 3 12:49:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vaittinen, Matti" X-Patchwork-Id: 10883715 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D78DA18E8 for ; Wed, 3 Apr 2019 12:50:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C204B28908 for ; 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Wed, 03 Apr 2019 05:49:56 -0700 (PDT) Date: Wed, 3 Apr 2019 15:49:46 +0300 From: Matti Vaittinen To: Matti Vaittinen , mazziesaccount@gmail.com Cc: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Sebastian Reichel , Liam Girdwood , Mark Brown , Alessandro Zummo , Alexandre Belloni , Wim Van Sebroeck , Guenter Roeck , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org, heikki.haikola@fi.rohmeurope.com, mikko.mutanen@fi.rohmeurope.com Subject: [PATCH v12 8/8] watchdog: bd70528: Initial support for ROHM BD70528 watchdog block Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Initial support for watchdog block included in ROHM BD70528 power management IC. Configurations for low power states are still to be checked. Signed-off-by: Matti Vaittinen Acked-by: Guenter Roeck --- Changelog v12 - No functional changes - Small styling fixes drivers/watchdog/Kconfig | 12 +++ drivers/watchdog/Makefile | 1 + drivers/watchdog/bd70528_wdt.c | 188 +++++++++++++++++++++++++++++++++ 3 files changed, 201 insertions(+) create mode 100644 drivers/watchdog/bd70528_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 242eea859637..a00bf649d7f0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -90,6 +90,18 @@ config SOFT_WATCHDOG_PRETIMEOUT watchdog. Be aware that governors might affect the watchdog because it is purely software, e.g. the panic governor will stall it! +config BD70528_WATCHDOG + tristate "ROHM BD70528 PMIC Watchdog" + depends on MFD_ROHM_BD70528 + select WATCHDOG_CORE + help + Support for the watchdog in the ROHM BD70528 PMIC. Watchdog trigger + cause system reset. + + Say Y here to include support for the ROHM BD70528 watchdog. + Alternatively say M to compile the driver as a module, + which will be called bd70528_wdt. + config DA9052_WATCHDOG tristate "Dialog DA9052 Watchdog" depends on PMIC_DA9052 || COMPILE_TEST diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index ba930e464657..3985922c440a 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -205,6 +205,7 @@ obj-$(CONFIG_WATCHDOG_SUN4V) += sun4v_wdt.o obj-$(CONFIG_XEN_WDT) += xen_wdt.o # Architecture Independent +obj-$(CONFIG_BD70528_WATCHDOG) += bd70528_wdt.o obj-$(CONFIG_DA9052_WATCHDOG) += da9052_wdt.o obj-$(CONFIG_DA9055_WATCHDOG) += da9055_wdt.o obj-$(CONFIG_DA9062_WATCHDOG) += da9062_wdt.o diff --git a/drivers/watchdog/bd70528_wdt.c b/drivers/watchdog/bd70528_wdt.c new file mode 100644 index 000000000000..88c60f8f5367 --- /dev/null +++ b/drivers/watchdog/bd70528_wdt.c @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 ROHM Semiconductors +// ROHM BD70528MWV watchdog driver + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Max time we can set is 1 hour, 59 minutes and 59 seconds + * and Minimum time is 1 second + */ +#define WDT_MAX_MS ((2 * 60 * 60 - 1) * 1000) +#define WDT_MIN_MS 1000 +#define DEFAULT_TIMEOUT 60 + +struct wdtbd70528 { + struct device *dev; + struct regmap *regmap; + struct rohm_regmap_dev *mfd; + struct watchdog_device wdt; +}; + +static int bd70528_wdt_set_locked(struct wdtbd70528 *w, int enable) +{ + return bd70528_wdt_set(w->mfd, enable, NULL); +} + +static int bd70528_wdt_change(struct wdtbd70528 *w, int enable) +{ + int ret; + + bd70528_wdt_lock(w->mfd); + ret = bd70528_wdt_set_locked(w, enable); + bd70528_wdt_unlock(w->mfd); + + return ret; +} + +static int bd70528_wdt_start(struct watchdog_device *wdt) +{ + struct wdtbd70528 *w = watchdog_get_drvdata(wdt); + + dev_dbg(w->dev, "WDT ping...\n"); + return bd70528_wdt_change(w, 1); +} + +static int bd70528_wdt_stop(struct watchdog_device *wdt) +{ + struct wdtbd70528 *w = watchdog_get_drvdata(wdt); + + dev_dbg(w->dev, "WDT stopping...\n"); + return bd70528_wdt_change(w, 0); +} + +static int bd70528_wdt_set_timeout(struct watchdog_device *wdt, + unsigned int timeout) +{ + unsigned int hours; + unsigned int minutes; + unsigned int seconds; + int ret; + struct wdtbd70528 *w = watchdog_get_drvdata(wdt); + + seconds = timeout; + hours = timeout / (60 * 60); + /* Maximum timeout is 1h 59m 59s => hours is 1 or 0 */ + if (hours) + seconds -= (60 * 60); + minutes = seconds / 60; + seconds = seconds % 60; + + bd70528_wdt_lock(w->mfd); + + ret = bd70528_wdt_set_locked(w, 0); + if (ret) + goto out_unlock; + + ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_HOUR, + BD70528_MASK_WDT_HOUR, hours); + if (ret) { + dev_err(w->dev, "Failed to set WDT hours\n"); + goto out_en_unlock; + } + ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_MINUTE, + BD70528_MASK_WDT_MINUTE, bin2bcd(minutes)); + if (ret) { + dev_err(w->dev, "Failed to set WDT minutes\n"); + goto out_en_unlock; + } + ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_SEC, + BD70528_MASK_WDT_SEC, bin2bcd(seconds)); + if (ret) + dev_err(w->dev, "Failed to set WDT seconds\n"); + else + dev_dbg(w->dev, "WDT tmo set to %u\n", timeout); + +out_en_unlock: + ret = bd70528_wdt_set_locked(w, 1); +out_unlock: + bd70528_wdt_unlock(w->mfd); + + return ret; +} + +static const struct watchdog_info bd70528_wdt_info = { + .identity = "bd70528-wdt", + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, +}; + +static const struct watchdog_ops bd70528_wdt_ops = { + .start = bd70528_wdt_start, + .stop = bd70528_wdt_stop, + .set_timeout = bd70528_wdt_set_timeout, +}; + +static int bd70528_wdt_probe(struct platform_device *pdev) +{ + struct rohm_regmap_dev *bd70528; + struct wdtbd70528 *w; + int ret; + unsigned int reg; + + bd70528 = dev_get_drvdata(pdev->dev.parent); + if (!bd70528) { + dev_err(&pdev->dev, "No MFD driver data\n"); + return -EINVAL; + } + w = devm_kzalloc(&pdev->dev, sizeof(*w), GFP_KERNEL); + if (!w) + return -ENOMEM; + + w->regmap = bd70528->regmap; + w->mfd = bd70528; + w->dev = &pdev->dev; + + w->wdt.info = &bd70528_wdt_info; + w->wdt.ops = &bd70528_wdt_ops; + w->wdt.min_hw_heartbeat_ms = WDT_MIN_MS; + w->wdt.max_hw_heartbeat_ms = WDT_MAX_MS; + w->wdt.parent = pdev->dev.parent; + w->wdt.timeout = DEFAULT_TIMEOUT; + watchdog_set_drvdata(&w->wdt, w); + watchdog_init_timeout(&w->wdt, 0, pdev->dev.parent); + + ret = bd70528_wdt_set_timeout(&w->wdt, w->wdt.timeout); + if (ret) { + dev_err(&pdev->dev, "Failed to set the watchdog timeout\n"); + return ret; + } + + bd70528_wdt_lock(w->mfd); + ret = regmap_read(w->regmap, BD70528_REG_WDT_CTRL, ®); + bd70528_wdt_unlock(w->mfd); + + if (ret) { + dev_err(&pdev->dev, "Failed to get the watchdog state\n"); + return ret; + } + if (reg & BD70528_MASK_WDT_EN) { + dev_dbg(&pdev->dev, "watchdog was running during probe\n"); + set_bit(WDOG_HW_RUNNING, &w->wdt.status); + } + + ret = devm_watchdog_register_device(&pdev->dev, &w->wdt); + if (ret < 0) + dev_err(&pdev->dev, "watchdog registration failed: %d\n", ret); + + return ret; +} + +static struct platform_driver bd70528_wdt = { + .driver = { + .name = "bd70528-wdt" + }, + .probe = bd70528_wdt_probe, +}; + +module_platform_driver(bd70528_wdt); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD70528 watchdog driver"); +MODULE_LICENSE("GPL");