From patchwork Fri Apr 5 20:35:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 10887811 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7FD951708 for ; Fri, 5 Apr 2019 20:36:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6194928B22 for ; Fri, 5 Apr 2019 20:36:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 52BC128B35; Fri, 5 Apr 2019 20:36:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C135D28B22 for ; Fri, 5 Apr 2019 20:36:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726204AbfDEUgE (ORCPT ); Fri, 5 Apr 2019 16:36:04 -0400 Received: from mail-pf1-f201.google.com ([209.85.210.201]:46726 "EHLO mail-pf1-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725946AbfDEUgE (ORCPT ); Fri, 5 Apr 2019 16:36:04 -0400 Received: by mail-pf1-f201.google.com with SMTP id y2so5174051pfn.13 for ; Fri, 05 Apr 2019 13:36:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=XNW4u5bmJGcJjELsgVKjJnoyHra8Ep003Ch8Qj77kkQ=; b=KhU1P2Akw8TLJpn/IVdc2Xd5Y/iVA2XyPCT04DlOmML8KUj7bKKoXIcvF/CUcxqXNK 9EswAaBrgxdkxIoo4QMpAmIwQOhkyMx8OydxH6HwZs/Kx0QH8jY3pADtaYSqm8q0CvAO zEBDxGpgyJycd1sOO6+IkbnyzBwLk3OkbPWcwxGJuHUPwO1IWlcQpHmci0UdoHn8qYYU w+vD5mqXj1Mrf8CENZRtJt+jebDTBh2ONHNJtVGDlCf6Xjn2EzNBXaHiyC9ZS99A3SZy KmTNnHlnZ+u7arn80b1b79bQGRKY4e3PpldgjdBcq4sPPmpMhDatoiefW3IWlBz256TU v/XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=XNW4u5bmJGcJjELsgVKjJnoyHra8Ep003Ch8Qj77kkQ=; b=oZ3k60bdPUUI7y7ivRMDLzfhrUGtfpMKE5dMs/3RoLZ7BmWqXubyTnVoQw9fg8knu2 CW8rwsEZ0fWJTiVKoBEsinuS1y1v4/zKH7LgzF0O6mv+tmV/kLXMx2D1JqtP/XZQZPta VlqCzHDBhMZLo51ee/NhCk/3vgRBo3newPKhHOaeqqaj2wF3X876Ia/3pX4f7mqsyKrx y7zjOy3CJgBDd2LnPxnGyXe4j4kyI+JEzHJnGbOyD99nSFIDsjLF15NXP0cleODaI2AN GuJ5YdMql3JkGyZ6Pdw4bcaSZ7zvqkSgLwOagaDbSgTrsXKnnECi01AV5Gp9K3PJk/bd Q4+A== X-Gm-Message-State: APjAAAUdIw7yzDGR2YBtMdKh6E71ChBTxzIKJz5A7XpxfhsmK3nbCTjn izR/cRbFD2jdJT5sbJA+lE2b49hPVjEu X-Google-Smtp-Source: APXvYqwI0/U+s2wKSFwBjG72o1UEnu+qflLGyPLfokemJwpUjM4oy53hLm9iwvV/OBFjFId/Xx6X1M1+KnYW X-Received: by 2002:a62:ab09:: with SMTP id p9mr482978pff.6.1554496562772; Fri, 05 Apr 2019 13:36:02 -0700 (PDT) Date: Fri, 5 Apr 2019 13:35:56 -0700 In-Reply-To: <20190313222124.229371-1-rajatja@google.com> Message-Id: <20190405203558.19160-1-rajatja@google.com> Mime-Version: 1.0 References: <20190313222124.229371-1-rajatja@google.com> X-Mailer: git-send-email 2.21.0.392.gf8f6787159e-goog Subject: [PATCH v3 1/3] platform/x86: intel_pmc_core: Convert to a platform_driver From: Rajat Jain To: Rajneesh Bhardwaj , Vishwanath Somayaji , Darren Hart , Andy Shevchenko , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Wysocki@google.com, Rafael J , Srinivas Pandruvada Cc: Rajat Jain , furquan@google.com, evgreen@google.com, rajatxjain@gmail.com Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the intel_pmc_core driver to a platform driver, and attach using the ACPI enumeration method (via the ACPI device "INT33A1"). Signed-off-by: Rajat Jain --- v3: Don't instantiate the platform_device. Use ACPI enumeration. v2: Rephrase the commit log. No code changes. drivers/platform/x86/intel_pmc_core.c | 92 ++++++++++++++++++--------- 1 file changed, 63 insertions(+), 29 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index f2c621b55f49..331889a57f73 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -806,18 +807,6 @@ static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) } #endif /* CONFIG_DEBUG_FS */ -static const struct x86_cpu_id intel_pmc_core_ids[] = { - INTEL_CPU_FAM6(SKYLAKE_MOBILE, spt_reg_map), - INTEL_CPU_FAM6(SKYLAKE_DESKTOP, spt_reg_map), - INTEL_CPU_FAM6(KABYLAKE_MOBILE, spt_reg_map), - INTEL_CPU_FAM6(KABYLAKE_DESKTOP, spt_reg_map), - INTEL_CPU_FAM6(CANNONLAKE_MOBILE, cnp_reg_map), - INTEL_CPU_FAM6(ICELAKE_MOBILE, icl_reg_map), - {} -}; - -MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_ids); - static const struct pci_device_id pmc_pci_ids[] = { { PCI_VDEVICE(INTEL, SPT_PMC_PCI_DEVICE_ID), 0}, { 0, }, @@ -854,26 +843,50 @@ static const struct dmi_system_id pmc_core_dmi_table[] = { {} }; -static int __init pmc_core_probe(void) +static int pmc_core_probe(struct platform_device *pdev) { + static bool device_initialized; struct pmc_dev *pmcdev = &pmc; - const struct x86_cpu_id *cpu_id; u64 slp_s0_addr; int err; - cpu_id = x86_match_cpu(intel_pmc_core_ids); - if (!cpu_id) + if (device_initialized) return -ENODEV; - pmcdev->map = (struct pmc_reg_map *)cpu_id->driver_data; + switch (boot_cpu_data.x86_model) { + case INTEL_FAM6_SKYLAKE_MOBILE: + case INTEL_FAM6_SKYLAKE_DESKTOP: + case INTEL_FAM6_KABYLAKE_MOBILE: + case INTEL_FAM6_KABYLAKE_DESKTOP: - /* - * Coffeelake has CPU ID of Kabylake and Cannonlake PCH. So here - * Sunrisepoint PCH regmap can't be used. Use Cannonlake PCH regmap - * in this case. - */ - if (pmcdev->map == &spt_reg_map && !pci_dev_present(pmc_pci_ids)) + pmcdev->map = &spt_reg_map; + + /* + * Special case: Coffeelake has CPU ID of Kabylake, but has + * Cannonlake PCH. So need to use cnp_reg_map instead of + * spt_reg_map for this special case. The PMC core PCI device + * on Coffeelake is hidden, so use that as the deciding factor. + */ + if (!pci_dev_present(pmc_pci_ids)) + pmcdev->map = &cnp_reg_map; + + break; + + case INTEL_FAM6_CANNONLAKE_MOBILE: pmcdev->map = &cnp_reg_map; + break; + + case INTEL_FAM6_ICELAKE_MOBILE: + pmcdev->map = &icl_reg_map; + break; + default: + /* + * Which map should we use by default? If not specified + * explicitly, assume Icelake by default for now. + */ + pmcdev->map = &icl_reg_map; + break; + } if (lpit_read_residency_count_address(&slp_s0_addr)) pmcdev->base_addr = PMC_BASE_ADDR_DEFAULT; @@ -890,26 +903,47 @@ static int __init pmc_core_probe(void) err = pmc_core_dbgfs_register(pmcdev); if (err < 0) { - pr_warn(" debugfs register failed.\n"); + dev_warn(&pdev->dev, "debugfs register failed.\n"); iounmap(pmcdev->regbase); return err; } dmi_check_system(pmc_core_dmi_table); - pr_info(" initialized\n"); + platform_set_drvdata(pdev, pmcdev); + + dev_info(&pdev->dev, " initialized\n"); + device_initialized = true; + return 0; } -module_init(pmc_core_probe) -static void __exit pmc_core_remove(void) +static int pmc_core_remove(struct platform_device *pdev) { - struct pmc_dev *pmcdev = &pmc; + struct pmc_dev *pmcdev = platform_get_drvdata(pdev); + platform_set_drvdata(pdev, NULL); pmc_core_dbgfs_unregister(pmcdev); mutex_destroy(&pmcdev->lock); iounmap(pmcdev->regbase); + return 0; } -module_exit(pmc_core_remove) + +static const struct acpi_device_id pmc_core_acpi_ids[] = { + {"INT33A1", 0}, /* _HID for Intel Power Engine, _CID PNP0D80*/ + { } +}; +MODULE_DEVICE_TABLE(acpi, pmc_core_acpi_ids); + +static struct platform_driver pmc_core_driver = { + .driver = { + .name = "pmc_core", + .acpi_match_table = ACPI_PTR(pmc_core_acpi_ids), + }, + .probe = pmc_core_probe, + .remove = pmc_core_remove, +}; + +module_platform_driver(pmc_core_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Intel PMC Core Driver"); From patchwork Fri Apr 5 20:35:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 10887813 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCC7B15AC for ; Fri, 5 Apr 2019 20:36:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A50FD28B22 for ; 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Fri, 05 Apr 2019 13:36:09 -0700 (PDT) Date: Fri, 5 Apr 2019 13:35:57 -0700 In-Reply-To: <20190405203558.19160-1-rajatja@google.com> Message-Id: <20190405203558.19160-2-rajatja@google.com> Mime-Version: 1.0 References: <20190313222124.229371-1-rajatja@google.com> <20190405203558.19160-1-rajatja@google.com> X-Mailer: git-send-email 2.21.0.392.gf8f6787159e-goog Subject: [PATCH v3 2/3] platform/x86: intel_pmc_core: Allow to dump debug registers on S0ix failure From: Rajat Jain To: Rajneesh Bhardwaj , Vishwanath Somayaji , Darren Hart , Andy Shevchenko , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Wysocki@google.com, Rafael J , Srinivas Pandruvada Cc: Rajat Jain , furquan@google.com, evgreen@google.com, rajatxjain@gmail.com Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a module parameter which when enabled, will check on resume, if the last S0ix attempt was successful. If not, the driver would warn and provide helpful debug information (which gets latched during the failed suspend attempt) to debug the S0ix failure. This information is very useful to debug S0ix failures. Specially since the latched debug information will be lost (over-written) if the system attempts to go into runtime (or imminent) S0ix again after that failed suspend attempt. Signed-off-by: Rajat Jain --- v3: No changes v2: Use pm_suspend_via_firmware() to enable the check only for S0ix drivers/platform/x86/intel_pmc_core.c | 86 +++++++++++++++++++++++++++ drivers/platform/x86/intel_pmc_core.h | 7 +++ 2 files changed, 93 insertions(+) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 331889a57f73..d9561a1c620d 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -928,6 +929,90 @@ static int pmc_core_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP + +static bool warn_on_s0ix_failures; +module_param(warn_on_s0ix_failures, bool, 0644); +MODULE_PARM_DESC(warn_on_s0ix_failures, "Check and warn for S0ix failures"); + +static int pmc_core_suspend(struct device *dev) +{ + struct pmc_dev *pmcdev = dev_get_drvdata(dev); + + /* Save PC10 and S0ix residency for checking later */ + if (warn_on_s0ix_failures && !pm_suspend_via_firmware() && + !rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pmcdev->pc10_counter) && + !pmc_core_dev_state_get(pmcdev, &pmcdev->s0ix_counter)) + pmcdev->check_counters = true; + else + pmcdev->check_counters = false; + + return 0; +} + +static inline bool pc10_failed(struct pmc_dev *pmcdev) +{ + u64 pc10_counter; + + if (!rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pc10_counter) && + pc10_counter == pmcdev->pc10_counter) + return true; + else + return false; +} + +static inline bool s0ix_failed(struct pmc_dev *pmcdev) +{ + u64 s0ix_counter; + + if (!pmc_core_dev_state_get(pmcdev, &s0ix_counter) && + s0ix_counter == pmcdev->s0ix_counter) + return true; + else + return false; +} + +static int pmc_core_resume(struct device *dev) +{ + struct pmc_dev *pmcdev = dev_get_drvdata(dev); + + if (!pmcdev->check_counters) + return 0; + + if (pc10_failed(pmcdev)) { + dev_info(dev, "PC10 entry had failed (PC10 cnt=0x%llx)\n", + pmcdev->pc10_counter); + } else if (s0ix_failed(pmcdev)) { + + const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; + const struct pmc_bit_map *map; + int offset = pmcdev->map->slps0_dbg_offset; + u32 data; + + dev_warn(dev, "S0ix entry had failed (S0ix cnt=%llu)\n", + pmcdev->s0ix_counter); + while (*maps) { + map = *maps; + data = pmc_core_reg_read(pmcdev, offset); + offset += 4; + while (map->name) { + dev_warn(dev, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + ++map; + } + ++maps; + } + } + return 0; +} + +#endif + +static const struct dev_pm_ops pmc_core_pm_ops = { + SET_LATE_SYSTEM_SLEEP_PM_OPS(pmc_core_suspend, pmc_core_resume) +}; + static const struct acpi_device_id pmc_core_acpi_ids[] = { {"INT33A1", 0}, /* _HID for Intel Power Engine, _CID PNP0D80*/ { } @@ -938,6 +1023,7 @@ static struct platform_driver pmc_core_driver = { .driver = { .name = "pmc_core", .acpi_match_table = ACPI_PTR(pmc_core_acpi_ids), + .pm = &pmc_core_pm_ops, }, .probe = pmc_core_probe, .remove = pmc_core_remove, diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index 88d9c0653a5f..fdee5772e532 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -241,6 +241,9 @@ struct pmc_reg_map { * @pmc_xram_read_bit: flag to indicate whether PMC XRAM shadow registers * used to read MPHY PG and PLL status are available * @mutex_lock: mutex to complete one transcation + * @check_counters: On resume, check if counters are getting incremented + * @pc10_counter: PC10 residency counter + * @s0ix_counter: S0ix residency (step adjusted) * * pmc_dev contains info about power management controller device. */ @@ -253,6 +256,10 @@ struct pmc_dev { #endif /* CONFIG_DEBUG_FS */ int pmc_xram_read_bit; struct mutex lock; /* generic mutex lock for PMC Core */ + + bool check_counters; /* Check for counter increments on resume */ + u64 pc10_counter; + u64 s0ix_counter; }; #endif /* PMC_CORE_H */ From patchwork Fri Apr 5 20:35:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 10887815 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 27F041708 for ; Fri, 5 Apr 2019 20:36:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 124A328B35 for ; Fri, 5 Apr 2019 20:36:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 00DBC28B22; Fri, 5 Apr 2019 20:36:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7414C28B22 for ; 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This was discussed here: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1966991.html Signed-off-by: Rajat Jain --- v3: (first version of *this* patch -to go with rest of v3 patchset) v2: (does not exist) v1: (does not exist) drivers/platform/x86/Makefile | 2 +- .../platform/x86/intel_pmc_core_plat_init.c | 64 +++++++++++++++++++ 2 files changed, 65 insertions(+), 1 deletion(-) create mode 100644 drivers/platform/x86/intel_pmc_core_plat_init.c diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index 86cb76677bc8..83d0bb9a14bb 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -89,7 +89,7 @@ obj-$(CONFIG_INTEL_BXTWC_PMIC_TMU) += intel_bxtwc_tmu.o obj-$(CONFIG_INTEL_TELEMETRY) += intel_telemetry_core.o \ intel_telemetry_pltdrv.o \ intel_telemetry_debugfs.o -obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o +obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o intel_pmc_core_plat_init.o obj-$(CONFIG_PMC_ATOM) += pmc_atom.o obj-$(CONFIG_MLX_PLATFORM) += mlx-platform.o obj-$(CONFIG_INTEL_TURBO_MAX_3) += intel_turbo_max_3.o diff --git a/drivers/platform/x86/intel_pmc_core_plat_init.c b/drivers/platform/x86/intel_pmc_core_plat_init.c new file mode 100644 index 000000000000..45be89e7586c --- /dev/null +++ b/drivers/platform/x86/intel_pmc_core_plat_init.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* + * Intel PMC Core platform init + * Copyright (c) 2019, Google Inc. + * Author - Rajat Jain + * + * This code instantiates platform devices for intel_pmc_core driver, only + * on supported platforms that may not have the ACPI devices in the ACPI tables. + * No new platforms should be added here, because we expect that new platforms + * should all have the ACPI device, which is the preferred way of enumeration. + */ + +#include +#include + +#include +#include + +static struct platform_device pmc_core_device = { + .name = "pmc_core", +}; + +static int dummy; +/* + * INTEL_CPU_FAM6 macro won't take NULL for driver_data (uses &driver_data), + * thus provide a dummy driver_data. + */ +static const struct x86_cpu_id intel_pmc_core_ids[] = { + INTEL_CPU_FAM6(SKYLAKE_MOBILE, dummy), + INTEL_CPU_FAM6(SKYLAKE_DESKTOP, dummy), + INTEL_CPU_FAM6(KABYLAKE_MOBILE, dummy), + INTEL_CPU_FAM6(KABYLAKE_DESKTOP, dummy), + INTEL_CPU_FAM6(CANNONLAKE_MOBILE, dummy), + INTEL_CPU_FAM6(ICELAKE_MOBILE, dummy), + {} +}; +MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_ids); + +static int __init pmc_core_platform_init(void) +{ + int ret; + + /* Skip creating the platform device if ACPI already has a device */ + if (acpi_dev_present("INT33A1", NULL, -1) || + !x86_match_cpu(intel_pmc_core_ids)) + return -ENODEV; + + ret = platform_device_register(&pmc_core_device); + if (ret) + return ret; + + return 0; +} + +static void __exit pmc_core_platform_exit(void) +{ + if (!acpi_dev_present("INT33A1", NULL, -1) && + x86_match_cpu(intel_pmc_core_ids)) + platform_device_unregister(&pmc_core_device); +} + +module_init(pmc_core_platform_init); +module_exit(pmc_core_platform_exit);