From patchwork Thu Aug 23 03:29:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthik B S X-Patchwork-Id: 10573409 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7C11920 for ; Thu, 23 Aug 2018 03:40:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE5282BA7D for ; Thu, 23 Aug 2018 03:40:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C26792BA97; Thu, 23 Aug 2018 03:40:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7FC6E2BA7D for ; Thu, 23 Aug 2018 03:40:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 791586E499; Thu, 23 Aug 2018 03:40:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 153CC6E499 for ; Thu, 23 Aug 2018 03:40:38 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Aug 2018 20:40:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,276,1531810800"; d="scan'208";a="257289160" Received: from genxfsim-12.iind.intel.com ([10.223.25.19]) by fmsmga006.fm.intel.com with ESMTP; 22 Aug 2018 20:40:36 -0700 From: Karthik B S To: intel-gfx@lists.freedesktop.org Date: Thu, 23 Aug 2018 08:59:44 +0530 Message-Id: <1534994984-6080-1-git-send-email-karthik.b.s@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Check added to skip the watermark workarounds intended for Gen10 and below platforms in Gen11. Signed-off-by: Karthik B S --- drivers/gpu/drm/i915/intel_pm.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d99e5fa..1928fe0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4677,28 +4677,35 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, res_lines = div_round_up_fixed16(selected_result, wp->plane_blocks_per_line); - /* Display WA #1125: skl,bxt,kbl,glk */ - if (level == 0 && wp->rc_surface) - res_blocks += fixed16_to_u32_round_up(wp->y_tile_minimum); - - /* Display WA #1126: skl,bxt,kbl,glk */ - if (level >= 1 && level <= 7) { - if (wp->y_tiled) { + if (INTEL_GEN(dev_priv) < 11) { + /* Display WA #1125: skl,bxt,kbl,glk */ + if (level == 0 && wp->rc_surface) res_blocks += fixed16_to_u32_round_up( wp->y_tile_minimum); - res_lines += wp->y_min_scanlines; - } else { - res_blocks++; + + /* Display WA #1126: skl,bxt,kbl,glk */ + if (level >= 1 && level <= 7) { + if (wp->y_tiled) { + res_blocks += fixed16_to_u32_round_up( + wp->y_tile_minimum); + res_lines += wp->y_min_scanlines; + } else { + res_blocks++; + } } + } - /* - * Make sure result blocks for higher latency levels are atleast - * as high as level below the current level. - * Assumption in DDB algorithm optimization for special cases. - * Also covers Display WA #1125 for RC. - */ + /* + * Make sure result blocks for higher latency levels are atleast + * as high as level below the current level. + * Assumption in DDB algorithm optimization for special cases. + * Also covers Display WA #1125 for RC. + */ + if (level >= 1 && level <= 7) { if (result_prev->plane_res_b > res_blocks) res_blocks = result_prev->plane_res_b; + if (result_prev->plane_res_l > res_lines) + res_lines = result_prev->plane_res_l; } if (INTEL_GEN(dev_priv) >= 11) {