From patchwork Wed Apr 17 01:30:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 10904321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7EA081850 for ; Wed, 17 Apr 2019 01:31:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A25528A20 for ; Wed, 17 Apr 2019 01:31:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E55B28A24; Wed, 17 Apr 2019 01:31:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0EC0E28A20 for ; Wed, 17 Apr 2019 01:31:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728531AbfDQBbF (ORCPT ); Tue, 16 Apr 2019 21:31:05 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:34964 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728486AbfDQBbF (ORCPT ); Tue, 16 Apr 2019 21:31:05 -0400 Received: by mail-pl1-f196.google.com with SMTP id w24so11209556plp.2 for ; Tue, 16 Apr 2019 18:31:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xkAKVbztOl2ooBv5T7TvWJZBE6Kq2MbOdqD7gIh3+KM=; b=Dj2Aws22WKlTonSuaawzoXqil5ROk0uEsZaq3uEIwcLDgZjs3u2kxZDXODjMgsUYFy 33OdBT/zakK/7xjb/ECe+51zmTqJOqnD8DZW7mWtmSlasFFXpnWcOC0Wi5Iac17SEy7/ eIig3VfZ80VMIWuz/oSy+wkDdEk1tjWyr9M7mqLDLmSR3NNAQW3uPhMwQyLiimK/XQjW aWracebO1KrbfeVM9Yka8KDZ23CinJuxCGLua4Hp3SNOTenx1E4ZSe5avmZXDjIERlzy NBdZ2LQX4r4h38KKmvgHRTd2EhoT4ifjCIxz84VYKwvAmtO511Xf+Kw+WusdoYMk4fD9 No0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xkAKVbztOl2ooBv5T7TvWJZBE6Kq2MbOdqD7gIh3+KM=; b=nelqRtNMnYmGGvwVAFOLwSE+3IqCcNqYb8/fSVv1z9+Xh9fsS8VKq+cv0lLdh92/sY CNzPWBiD+Diy9N0xdFCqBlLGfBJFyp1YlXU/yMUXk70zJPiF8twTjkyAlE3VQJuje1WI 8SQEEQmdup5gzunDpg02VJAhG+YhlvFr8fw4mWBVMk00vIgl46u3c4fxOf219AznP+6y s9VZQylgavFbaw7tf8icrSw31Ql6bYyN3oc3uhHCC5UJsxS4eABfhg/yrsmM38Vocnj3 bOPdSL4N2RJUExrfEP72Exi70XzHv+6lPGzBTVGxwgOoDj4sC0aU853FD+sbr+ZJpYvD jNmw== X-Gm-Message-State: APjAAAXfQN+Y8s8QW9+hbf/LLbR3G3J6/puc1EoeHqng8dGNLFtIGgja ds7WV76i1HCgV0DlesPa1FM= X-Google-Smtp-Source: APXvYqy/dikwvIGaUO23gJsHU1O+AeXo5cYujoO+CYEscppR+SFtpHAV2d+PH70P14pvrGpZt4bS1A== X-Received: by 2002:a17:902:20c9:: with SMTP id v9mr64832773plg.239.1555464664351; Tue, 16 Apr 2019 18:31:04 -0700 (PDT) Received: from localhost ([2601:1c0:4501:a35a:719a:233b:28ab:5ad5]) by smtp.gmail.com with ESMTPSA id a12sm62200428pgq.21.2019.04.16.18.31.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Apr 2019 18:31:03 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Rob Clark Subject: [PATCH 1/3] drm/msm/gpu: add per-process pagetables param Date: Tue, 16 Apr 2019 18:30:24 -0700 Message-Id: <20190417013031.555-2-robdclark@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190417013031.555-1-robdclark@gmail.com> References: <20190417013031.555-1-robdclark@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Clark For now it always returns '0' (false), but once the iommu work is in place to enable per-process pagetables we can update the value returned. Userspace needs to know this to make an informed decision about exposing KHR_robustness. Signed-off-by: Rob Clark Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +++ include/uapi/drm/msm_drm.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 2cfee1a4fe0b..fbdf6f1c247e 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -62,6 +62,9 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) case MSM_PARAM_NR_RINGS: *value = gpu->nr_rings; return 0; + case MSM_PARAM_PP_PGTABLE: + *value = 0; + return 0; default: DBG("%s: invalid param: %u", gpu->name, param); return -EINVAL; diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 91a16b333c69..a9fdcf1689ce 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -74,6 +74,7 @@ struct drm_msm_timespec { #define MSM_PARAM_TIMESTAMP 0x05 #define MSM_PARAM_GMEM_BASE 0x06 #define MSM_PARAM_NR_RINGS 0x07 +#define MSM_PARAM_PP_PGTABLE 0x08 /* => 1 for per-process pagetables, else 0 */ struct drm_msm_param { __u32 pipe; /* in, MSM_PIPE_x */ From patchwork Wed Apr 17 01:30:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 10904325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81CE2922 for ; Wed, 17 Apr 2019 01:31:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DE0528A20 for ; Wed, 17 Apr 2019 01:31:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6268028A24; Wed, 17 Apr 2019 01:31:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B5C8728A20 for ; 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Tue, 16 Apr 2019 18:31:13 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Rob Clark Subject: [PATCH 2/3] drm/msm: add param to retrieve # of GPU faults (global) Date: Tue, 16 Apr 2019 18:30:25 -0700 Message-Id: <20190417013031.555-3-robdclark@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190417013031.555-1-robdclark@gmail.com> References: <20190417013031.555-1-robdclark@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Clark For KHR_robustness, userspace wants to know two things, the count of GPU faults globally, and the count of faults attributed to a given context. This patch providees the former, and the next patch provides the latter. Signed-off-by: Rob Clark Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +++ drivers/gpu/drm/msm/msm_gpu.c | 3 +++ drivers/gpu/drm/msm/msm_gpu.h | 3 +++ include/uapi/drm/msm_drm.h | 1 + 4 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index fbdf6f1c247e..8436caa4547f 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -65,6 +65,9 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) case MSM_PARAM_PP_PGTABLE: *value = 0; return 0; + case MSM_PARAM_FAULTS: + *value = gpu->global_faults; + return 0; default: DBG("%s: invalid param: %u", gpu->name, param); return -EINVAL; diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 10babd18e286..194847a220b6 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -443,6 +443,9 @@ static void recover_worker(struct work_struct *work) if (submit) { struct task_struct *task; + /* Increment the fault count */ + gpu->global_faults++; + task = get_pid_task(submit->pid, PIDTYPE_PID); if (task) { comm = kstrdup(task->comm, GFP_KERNEL); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index ca17086f72c9..3e9078ec3023 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -103,6 +103,9 @@ struct msm_gpu { /* does gpu need hw_init? */ bool needs_hw_init; + /* number of GPU hangs (for all contexts) */ + int global_faults; + /* worker for handling active-list retiring: */ struct work_struct retire_work; diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index a9fdcf1689ce..178d7b407f3a 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -75,6 +75,7 @@ struct drm_msm_timespec { #define MSM_PARAM_GMEM_BASE 0x06 #define MSM_PARAM_NR_RINGS 0x07 #define MSM_PARAM_PP_PGTABLE 0x08 /* => 1 for per-process pagetables, else 0 */ +#define MSM_PARAM_FAULTS 0x09 struct drm_msm_param { __u32 pipe; /* in, MSM_PIPE_x */ From patchwork Wed Apr 17 01:30:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 10904329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B887F17E0 for ; Wed, 17 Apr 2019 01:31:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A491F28A20 for ; Wed, 17 Apr 2019 01:31:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9917928A24; Wed, 17 Apr 2019 01:31:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0505C28A20 for ; Wed, 17 Apr 2019 01:31:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728720AbfDQBbX (ORCPT ); Tue, 16 Apr 2019 21:31:23 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:40800 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728486AbfDQBbX (ORCPT ); Tue, 16 Apr 2019 21:31:23 -0400 Received: by mail-pf1-f193.google.com with SMTP id c207so11279764pfc.7 for ; Tue, 16 Apr 2019 18:31:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Id2/13yLlx+eS+aAX5lw+qGhYmZ8VMNbK3bBIfgxkrw=; b=Hy6eZ1jBkOM6yJ2ZLjsp4XlB//8STG7ddoEgIfP4gVGC1Zm9BTQg6A4eeB5ISb1OAV EmYPXDdKPbHu70FMvCmdBzg8Pd7OcRopt6CzHDNpOsMCoDYVhbCKPa8elQhVqXcK+/DU HHyRwaNdnWl1ACFvLyQ1kF3R94yVFEr5EJQqiNzPm2wHL1yCMcuCZrEkKH2i6VlI08ER 5bqH7dWmjHgRpgvhJqcoazJ+vbpjNvnwd83j8ZY+6eHm/Bkn0DFX7S8hwESsgpyMUIM6 xuwntezbloIXUjqS8IRynJ9weQ00xUt4a1upB3/+1u3AJ/+3Dh7NMba1ca4vzLvjVZfJ UoTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Id2/13yLlx+eS+aAX5lw+qGhYmZ8VMNbK3bBIfgxkrw=; b=fb0qDKGPjZICKUKBM8U/mIPWHaXC5//r2ewUFjpczrN83zQJePrwsJF8jobhIBeExi RH00hgTo6LgdGqz7lmCMaiwrx36Rnhumsjhmvao36+yVplqrNQj4wSvk69S27UF8qTge pltG7u2xYHknFUpaqMsdJbQYdwXDyuR5H4eJuMHgx+/AvqCrEpdW71Hjz5jlN5zTwdez 9CaYAA+ZpgghPB8YEsUqNVgjusrN8ycU6v0tszTTh/16AJjXpKpoA2DTqlKkN859rGTz VLEoEMiSFbL/Uegahe8OLH34lkcBXjsinZWKV304rVNavLKz6ZZG9g8hhNZFOWnzmEVe CwXw== X-Gm-Message-State: APjAAAVL1qBszYxSviwo4UZWyAr5PJiAD1GRmgzL9hM5SnC5Ks2JCNBJ yk05a3Tg2Yb2SXMgsAIyWBSEnVCbOMY= X-Google-Smtp-Source: APXvYqyN+5sqWpLm81qh8YVfAb5hzNwAp0OyW2kWcTqJGD5tH1kAwqejNMB6JvXKqDIjE0xQ+AXS1Q== X-Received: by 2002:a63:fc5a:: with SMTP id r26mr76294458pgk.97.1555464682281; Tue, 16 Apr 2019 18:31:22 -0700 (PDT) Received: from localhost ([2601:1c0:4501:a35a:719a:233b:28ab:5ad5]) by smtp.gmail.com with ESMTPSA id n3sm91515453pfa.99.2019.04.16.18.31.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Apr 2019 18:31:21 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Jordan Crouse , Rob Clark Subject: [PATCH 3/3] drm/msm/gpu: Add submit queue queries Date: Tue, 16 Apr 2019 18:30:26 -0700 Message-Id: <20190417013031.555-4-robdclark@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190417013031.555-1-robdclark@gmail.com> References: <20190417013031.555-1-robdclark@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jordan Crouse Add the capability to query information from a submit queue. The first available parameter is for querying the number of GPU faults (hangs) that can be attributed to the queue. This is useful for implementing context robustness. A user context can regularly query the number of faults to see if it is responsible for any and if so it can invalidate itself. This is also helpful for testing by confirming to the user driver if a particular command stream caused a fault (or not as the case may be). Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_drv.c | 9 +++++- drivers/gpu/drm/msm/msm_drv.h | 2 ++ drivers/gpu/drm/msm/msm_gpu.c | 3 +- drivers/gpu/drm/msm/msm_submitqueue.c | 41 +++++++++++++++++++++++++++ include/uapi/drm/msm_drm.h | 12 ++++++++ 5 files changed, 65 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 906b2bb79f6a..b8671bdc12ab 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -39,9 +39,10 @@ * MSM_GEM_INFO ioctl. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get * GEM object's debug name + * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl */ #define MSM_VERSION_MAJOR 1 -#define MSM_VERSION_MINOR 4 +#define MSM_VERSION_MINOR 5 #define MSM_VERSION_PATCHLEVEL 0 static const struct drm_mode_config_funcs mode_config_funcs = { @@ -964,6 +965,11 @@ static int msm_ioctl_submitqueue_new(struct drm_device *dev, void *data, args->flags, &args->id); } +static int msm_ioctl_submitqueue_query(struct drm_device *dev, void *data, + struct drm_file *file) +{ + return msm_submitqueue_query(dev, file->driver_priv, data); +} static int msm_ioctl_submitqueue_close(struct drm_device *dev, void *data, struct drm_file *file) @@ -984,6 +990,7 @@ static const struct drm_ioctl_desc msm_ioctls[] = { DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, msm_ioctl_submitqueue_new, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, msm_ioctl_submitqueue_query, DRM_AUTH|DRM_RENDER_ALLOW), }; static const struct vm_operations_struct vm_ops = { diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index cb642fefbd2f..afb91712acd6 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -420,6 +420,8 @@ struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx, u32 id); int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx, u32 prio, u32 flags, u32 *id); +int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx, + struct drm_msm_submitqueue_query *args); int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id); void msm_submitqueue_close(struct msm_file_private *ctx); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 194847a220b6..2b76657badd5 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -443,8 +443,9 @@ static void recover_worker(struct work_struct *work) if (submit) { struct task_struct *task; - /* Increment the fault count */ + /* Increment the fault counts */ gpu->global_faults++; + submit->queue->faults++; task = get_pid_task(submit->pid, PIDTYPE_PID); if (task) { diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c b/drivers/gpu/drm/msm/msm_submitqueue.c index 5115f75b5b7f..f160ec40a39b 100644 --- a/drivers/gpu/drm/msm/msm_submitqueue.c +++ b/drivers/gpu/drm/msm/msm_submitqueue.c @@ -120,6 +120,47 @@ int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx) return msm_submitqueue_create(drm, ctx, default_prio, 0, NULL); } +static int msm_submitqueue_query_faults(struct msm_gpu_submitqueue *queue, + struct drm_msm_submitqueue_query *args) +{ + size_t size = min_t(size_t, args->len, sizeof(queue->faults)); + int ret; + + /* If a zero length was passed in, return the data size we expect */ + if (!args->len) { + args->len = sizeof(queue->faults); + return 0; + } + + /* Set the length to the actual size of the data */ + args->len = size; + + ret = copy_to_user(u64_to_user_ptr(args->data), &queue->faults, size); + + return ret ? -EFAULT : 0; +} + +int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx, + struct drm_msm_submitqueue_query *args) +{ + struct msm_gpu_submitqueue *queue; + int ret = -EINVAL; + + if (args->pad) + return -EINVAL; + + queue = msm_submitqueue_get(ctx, args->id); + if (!queue) + return -ENOENT; + + if (args->param == MSM_SUBMITQUEUE_PARAM_FAULTS) + ret = msm_submitqueue_query_faults(queue, args); + + msm_submitqueue_put(queue); + + return ret; +} + int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id) { struct msm_gpu_submitqueue *entry; diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 178d7b407f3a..0b85ed6a3710 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -288,6 +288,16 @@ struct drm_msm_submitqueue { __u32 id; /* out, identifier */ }; +#define MSM_SUBMITQUEUE_PARAM_FAULTS 0 + +struct drm_msm_submitqueue_query { + __u64 data; + __u32 id; + __u32 param; + __u32 len; + __u32 pad; +}; + #define DRM_MSM_GET_PARAM 0x00 /* placeholder: #define DRM_MSM_SET_PARAM 0x01 @@ -304,6 +314,7 @@ struct drm_msm_submitqueue { */ #define DRM_MSM_SUBMITQUEUE_NEW 0x0A #define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B +#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) @@ -315,6 +326,7 @@ struct drm_msm_submitqueue { #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) #define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue) #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32) +#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query) #if defined(__cplusplus) }