From patchwork Tue Apr 23 11:00:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?SmFrdWIgSmVybcOhxZk=?= X-Patchwork-Id: 10912805 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DADE1515 for ; Tue, 23 Apr 2019 11:04:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F3A8B2863E for ; Tue, 23 Apr 2019 11:04:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E7D0328795; Tue, 23 Apr 2019 11:04:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 466422863E for ; Tue, 23 Apr 2019 11:04:23 +0000 (UTC) Received: from localhost ([127.0.0.1]:51751 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hItDq-0001KB-KL for patchwork-qemu-devel@patchwork.kernel.org; Tue, 23 Apr 2019 07:04:22 -0400 Received: from eggs.gnu.org ([209.51.188.92]:58149) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hItBZ-0008D7-QG for qemu-devel@nongnu.org; Tue, 23 Apr 2019 07:02:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hItBW-0001R8-E9 for qemu-devel@nongnu.org; Tue, 23 Apr 2019 07:02:01 -0400 Received: from [93.153.64.87] (port=41234 helo=gorgo) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hItBV-0001Id-WC for qemu-devel@nongnu.org; Tue, 23 Apr 2019 07:01:58 -0400 Received: from gorgo (localhost.localdomain [127.0.0.1]) by gorgo (8.15.2/8.15.2) with ESMTPS id x3NB1cXK1260256 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 23 Apr 2019 13:01:38 +0200 Received: (from jermar@localhost) by gorgo (8.15.2/8.15.2/Submit) id x3NB1cIT1260189; Tue, 23 Apr 2019 13:01:38 +0200 From: =?utf-8?b?SmFrdWIgSmVybcOhxZk=?= To: qemu-devel@nongnu.org Date: Tue, 23 Apr 2019 13:00:34 +0200 Message-Id: <20190423110034.1260142-1-jakub.jermar@kernkonzept.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by gorgo id x3NB1cXK1260256 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 93.153.64.87 Subject: [Qemu-devel] [PATCH v2] mips: Decide to map PAGE_EXEC in map_address X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?b?SmFrdWIgSmVybcOhxZk=?= , Aleksandar Rikalo , Aleksandar Markovic , Aurelien Jarno Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This commit addresses QEMU Bug #1825311: mips_cpu_handle_mmu_fault renders all accessed pages executable It allows finer-grained control over whether the accessed page should be executable by moving the decision to the underlying map_address function, which has more information for this. As a result, pages that have the XI bit set in the TLB and are accessed for read/write, don't suddenly end up being executable. Signed-off-by: Jakub Jermář Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé --- target/mips/helper.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/target/mips/helper.c b/target/mips/helper.c index c44cdca3b5..132d073fbe 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -43,7 +43,7 @@ int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot, target_ulong address, int rw, int access_type) { *physical = address; - *prot = PAGE_READ | PAGE_WRITE; + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; return TLBRET_MATCH; } @@ -61,7 +61,7 @@ int fixed_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot, else *physical = address; - *prot = PAGE_READ | PAGE_WRITE; + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; return TLBRET_MATCH; } @@ -101,6 +101,9 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot, *prot = PAGE_READ; if (n ? tlb->D1 : tlb->D0) *prot |= PAGE_WRITE; + if (!(n ? tlb->XI1 : tlb->XI0)) { + *prot |= PAGE_EXEC; + } return TLBRET_MATCH; } return TLBRET_DIRTY; @@ -182,7 +185,7 @@ static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical, } else { /* The segment is unmapped */ *physical = physical_base | (real_address & segmask); - *prot = PAGE_READ | PAGE_WRITE; + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; return TLBRET_MATCH; } } @@ -913,8 +916,8 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, } if (ret == TLBRET_MATCH) { tlb_set_page(cs, address & TARGET_PAGE_MASK, - physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, - mmu_idx, TARGET_PAGE_SIZE); + physical & TARGET_PAGE_MASK, prot, mmu_idx, + TARGET_PAGE_SIZE); ret = 0; } else if (ret < 0) #endif @@ -936,8 +939,8 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, address, rw, access_type, mmu_idx); if (ret == TLBRET_MATCH) { tlb_set_page(cs, address & TARGET_PAGE_MASK, - physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, - mmu_idx, TARGET_PAGE_SIZE); + physical & TARGET_PAGE_MASK, prot, mmu_idx, + TARGET_PAGE_SIZE); ret = 0; return ret; }