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Sun, 28 Apr 2019 08:19:44 +0000 Received: from VI1PR04MB5040.eurprd04.prod.outlook.com ([fe80::4d83:33f7:38e7:70ec]) by VI1PR04MB5040.eurprd04.prod.outlook.com ([fe80::4d83:33f7:38e7:70ec%4]) with mapi id 15.20.1835.016; Sun, 28 Apr 2019 08:19:44 +0000 From: BOUGH CHEN To: "ulf.hansson@linaro.org" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "adrian.hunter@intel.com" CC: dl-linux-imx , "linux-mmc@vger.kernel.org" Subject: [PATCH 1/3] dt-bindings: mmc: fsl-imx-esdhc: add imx7ulp compatible string Thread-Topic: [PATCH 1/3] dt-bindings: mmc: fsl-imx-esdhc: add imx7ulp compatible string Thread-Index: AQHU/Zsi9HaxPthgtUmGrGw0Is/2ng== Date: Sun, 28 Apr 2019 08:19:44 +0000 Message-ID: <20190428082727.3419-1-haibo.chen@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.17.1 x-clientproxiedby: HK0PR01CA0052.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::16) To VI1PR04MB5040.eurprd04.prod.outlook.com (2603:10a6:803:59::33) authentication-results: spf=none (sender IP is ) smtp.mailfrom=haibo.chen@nxp.com; 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Signed-off-by: Haibo Chen Reviewed-by: Dong Aisheng --- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt index 540c65ed9cba..f707b8bee304 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt @@ -17,6 +17,7 @@ Required properties: "fsl,imx6sx-usdhc" "fsl,imx6ull-usdhc" "fsl,imx7d-usdhc" + "fsl,imx7ulp-usdhc" "fsl,imx8qxp-usdhc" Optional properties: From patchwork Sun Apr 28 08:19:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 10920827 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2AC6B912 for ; Sun, 28 Apr 2019 08:19:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C17C2860A for ; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: RrI3A4ODaosqwudJ+pyGGbaEy4Vym7OyBg70gWxkC6U1/b5uRLPGWhvRQWh1JetCO72H6S4qZej/Rg9L2qKJ40Xh3nNtQtcevtYzlg+domWmV5xPTsVSdLaTcAj+R3PIk80Z9i1lXGiqNh0M5i0FHwUhhhA0r+Y1CKvvyXMssgRWwdtcGBxfw+7zrItCrR26iaG9Ffyy8ZnvmB5oluU8XeoDOlFrNcSRPhGZKJqmzEgIoWBI0bZv2k3t2UW5qXUrU1lplUPAIp1OX/quTcTLRcQacHiR2UlOZsz8nb8RYg+M4Js2Qe1vfGAsCCQs002owYfB0yGtKF4Mkl1vgIG9yW2lE4euK6qhn8yDZLOAtVWkfdH3J2rc9T4WY7AKN7gd+XMaNaTBxr/uCJnUfglZWwPhi2hn15ROV+mOpZagALA= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b4cabbca-addf-4352-8ff8-08d6cbb24701 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Apr 2019 08:19:48.2260 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4990 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some SoCs such as i.MX7ULP, there is no busfreq driver, but cpuidle has some levels which may disable system/bus clocks, so need to add pm_qos to prevent cpuidle from entering low level idles and make sure system/bus clocks are enabled when usdhc is active. Signed-off-by: Anson Huang Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci-esdhc-imx.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 8dbbc1f62b70..6a02e8b50dc7 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -156,6 +157,8 @@ #define ESDHC_FLAG_HS400_ES BIT(11) /* The IP has Host Controller Interface for Command Queuing */ #define ESDHC_FLAG_CQHCI BIT(12) +/* need request pmqos during low power */ +#define ESDHC_FLAG_PMQOS BIT(13) struct esdhc_soc_data { u32 flags; @@ -204,6 +207,12 @@ static const struct esdhc_soc_data usdhc_imx7d_data = { | ESDHC_FLAG_HS400, }; +static struct esdhc_soc_data usdhc_imx7ulp_data = { + .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_PMQOS, +}; + static struct esdhc_soc_data usdhc_imx8qxp_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 @@ -229,6 +238,7 @@ struct pltfm_imx_data { WAIT_FOR_INT, /* sent CMD12, waiting for response INT */ } multiblock_status; u32 is_ddr; + struct pm_qos_request pm_qos_req; }; static const struct platform_device_id imx_esdhc_devtype[] = { @@ -257,6 +267,7 @@ static const struct of_device_id imx_esdhc_dt_ids[] = { { .compatible = "fsl,imx6q-usdhc", .data = &usdhc_imx6q_data, }, { .compatible = "fsl,imx6ull-usdhc", .data = &usdhc_imx6ull_data, }, { .compatible = "fsl,imx7d-usdhc", .data = &usdhc_imx7d_data, }, + { .compatible = "fsl,imx7ulp-usdhc", .data = &usdhc_imx7ulp_data, }, { .compatible = "fsl,imx8qxp-usdhc", .data = &usdhc_imx8qxp_data, }, { /* sentinel */ } }; @@ -1436,6 +1447,10 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) imx_data->socdata = of_id ? of_id->data : (struct esdhc_soc_data *) pdev->id_entry->driver_data; + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + pm_qos_add_request(&imx_data->pm_qos_req, + PM_QOS_CPU_DMA_LATENCY, 0); + imx_data->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); if (IS_ERR(imx_data->clk_ipg)) { err = PTR_ERR(imx_data->clk_ipg); @@ -1557,6 +1572,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) disable_per_clk: clk_disable_unprepare(imx_data->clk_per); free_sdhci: + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + pm_qos_remove_request(&imx_data->pm_qos_req); sdhci_pltfm_free(pdev); return err; } @@ -1578,6 +1595,9 @@ static int sdhci_esdhc_imx_remove(struct platform_device *pdev) clk_disable_unprepare(imx_data->clk_ipg); clk_disable_unprepare(imx_data->clk_ahb); + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + pm_qos_remove_request(&imx_data->pm_qos_req); + sdhci_pltfm_free(pdev); return 0; @@ -1649,6 +1669,9 @@ static int sdhci_esdhc_runtime_suspend(struct device *dev) } clk_disable_unprepare(imx_data->clk_ahb); + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + pm_qos_remove_request(&imx_data->pm_qos_req); + return ret; } @@ -1659,6 +1682,10 @@ static int sdhci_esdhc_runtime_resume(struct device *dev) struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); int err; + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + pm_qos_add_request(&imx_data->pm_qos_req, + PM_QOS_CPU_DMA_LATENCY, 0); + err = clk_prepare_enable(imx_data->clk_ahb); if (err) return err; From patchwork Sun Apr 28 08:19:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 10920829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA40E912 for ; Sun, 28 Apr 2019 08:20:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B69E928A00 for ; Sun, 28 Apr 2019 08:20:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A4FA328AB9; Sun, 28 Apr 2019 08:20:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2BC5428A00 for ; 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According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET before any setting of STROBE_DLL_CTRL register. USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL) for slave sel value. If this register bits value is 0, it needs 256 ref_clk cycles to update slave sel value. IC suggest to set bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave sel value. This will short the lock time of slave. i.MX7ULP B0 will need more time to lock the REF and SLV, so change to add 5us delay. Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 6a02e8b50dc7..f56d073c87e0 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -74,6 +74,7 @@ #define ESDHC_STROBE_DLL_CTRL_ENABLE (1 << 0) #define ESDHC_STROBE_DLL_CTRL_RESET (1 << 1) #define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3 +#define ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT (4 << 20) #define ESDHC_STROBE_DLL_STATUS 0x74 #define ESDHC_STROBE_DLL_STS_REF_LOCK (1 << 1) @@ -210,7 +211,7 @@ static const struct esdhc_soc_data usdhc_imx7d_data = { static struct esdhc_soc_data usdhc_imx7ulp_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 - | ESDHC_FLAG_PMQOS, + | ESDHC_FLAG_PMQOS | ESDHC_FLAG_HS400, }; static struct esdhc_soc_data usdhc_imx8qxp_data = { @@ -994,15 +995,19 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host) /* force a reset on strobe dll */ writel(ESDHC_STROBE_DLL_CTRL_RESET, host->ioaddr + ESDHC_STROBE_DLL_CTRL); + /* clear the reset bit on strobe dll before any setting */ + writel(0, host->ioaddr + ESDHC_STROBE_DLL_CTRL); + /* * enable strobe dll ctrl and adjust the delay target * for the uSDHC loopback read clock */ v = ESDHC_STROBE_DLL_CTRL_ENABLE | + ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT | (7 << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL); - /* wait 1us to make sure strobe dll status register stable */ - udelay(1); + /* wait 5us to make sure strobe dll status register stable */ + udelay(5); v = readl(host->ioaddr + ESDHC_STROBE_DLL_STATUS); if (!(v & ESDHC_STROBE_DLL_STS_REF_LOCK)) dev_warn(mmc_dev(host->mmc),