From patchwork Mon Apr 29 13:12:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10921803 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B764714D5 for ; Mon, 29 Apr 2019 13:12:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A806A285A8 for ; Mon, 29 Apr 2019 13:12:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9918A286B3; Mon, 29 Apr 2019 13:12:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D8BC285A8 for ; Mon, 29 Apr 2019 13:12:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726321AbfD2NMP (ORCPT ); Mon, 29 Apr 2019 09:12:15 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:35308 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728006AbfD2NMP (ORCPT ); Mon, 29 Apr 2019 09:12:15 -0400 Received: by mail-wr1-f66.google.com with SMTP id f7so7470888wrs.2 for ; Mon, 29 Apr 2019 06:12:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zgLkZH7fvnn9ow85IxLoErjzNeQPt/Y/6sGtcm5H+QY=; b=JUEtyqTfzgq+eI8JsoNhV2vJVtHVdvLJneMkfVrhS7zClvtLa1COifGGYGf1vqxZsY oL/ChqJVd/RBTwXD5iru8C/LUzLz6jjirc+ok6uL3d+L3bwJYu6ptGzutMt9T9KnKne6 JjCEp7UjWOIjrNKdA6HCoA0ACG6hThLrFTo5rEPUiLMjowlnHb1g2ms6t4iLrT3Pj582 pItzXWpE2Pg2Qu19ZOF3VQAlYYMPATGQHxZ1N1kSRBpsu5eCmxmGSrK9q2Y7Be12UFYs THtw+p6BHyz2Yfrunab4WyoE55JWezpVm8bxfQ8q291n2vU76uMm/3m/XqzF5Bs2NAMt oZig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zgLkZH7fvnn9ow85IxLoErjzNeQPt/Y/6sGtcm5H+QY=; b=carT6nfnUeoxHOoeozoX/f7zJfkWKlerMu9egW6RK8XKu5uA/Hm2DODoUduBwNsAzY f+n4QWUyTGSrl9zRFx1LL38u2AXob+1Ep3h/k2zvYyvQiyPMK95ms6ip+l8KEZ8ENUu4 mHqA9vQE2KNwJcVKlOodmfv4yxp93M7HwJqjGT4Xv6Mwgr5AoMmBoOK+XxYNyZhFx2VD z1tM6E3aUlqWLlxW1RT6ThcfG/lVE7znJjW14EeaoKHWWG7H3X/99Xw6bHZSi1gwk4re KRSXAfRZNb4nCSoYoVvi3wgD1gpk9nzzja3rQ0e/ZyyTlpofVeqIQnHPO+d5G+bDc4Ab LCxw== X-Gm-Message-State: APjAAAWWCcI17mc+v1jzHZ6LgAa7UZNeTcrG3mzCPP23Lk93UA8V3iei s08yLbZP6OAzBBRu9tcZo8puaQ== X-Google-Smtp-Source: APXvYqwJ8ZujIPozdE+1Ob5C21h/cnNZvQf3dhNn73e7SzG9yWn26X0dddFhBP5DGB/Kau+p1YxQpA== X-Received: by 2002:a5d:464f:: with SMTP id j15mr19107653wrs.265.1556543533485; Mon, 29 Apr 2019 06:12:13 -0700 (PDT) Received: from sudo.home ([2a01:cb1d:112:6f00:f9fc:88:6502:8fa7]) by smtp.gmail.com with ESMTPSA id s16sm5410282wrg.71.2019.04.29.06.12.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Apr 2019 06:12:12 -0700 (PDT) From: Ard Biesheuvel To: linux-gpio@vger.kernel.org Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Masahisa Kojima , Linus Walleij , Marc Zyngier , Graeme Gregory , Lorenzo Pieralisi , Mika Westerberg , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v2 1/4] acpi/irq: implement getter for GSI irqdomain Date: Mon, 29 Apr 2019 15:12:05 +0200 Message-Id: <20190429131208.3620-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190429131208.3620-1-ard.biesheuvel@linaro.org> References: <20190429131208.3620-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ACPI permits arbitrary producer->consumer interrupt links to be described in AML, which means a topology such as the following is perfectly legal: Device (EXIU) { Name (_HID, "SCX0008") Name (_UID, Zero) Name (_CRS, ResourceTemplate () { ... }) } Device (GPIO) { Name (_HID, "SCX0007") Name (_UID, Zero) Name (_CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE) Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, 0, "\\_SB.EXIU") { 7, } }) ... } The EXIU in this example is the external interrupt unit as can be found on Socionext SynQuacer based platforms, which converts a block of 32 SPIs from arbitrary polarity/trigger into level-high, with a separate set of config/mask/unmask/clear controls. The existing DT based driver in drivers/irqchip/irq-sni-exiu.c models this as a hierarchical domain stacked on top of the GIC's irqdomain. Since the GIC is modeled as a DT node as well, obtaining a reference to this irqdomain is easily done by going through the parent link. On ACPI systems, however, the GIC is not modeled as an object in the namespace, and so device objects cannot refer to it directly. So in order to obtain the irqdomain reference when driving the EXIU in ACPI mode, we need a helper that returns the default domain for unqualified interrupts. This is essentially what the ACPI GSI domain provides, so add a helper that returns a reference to this domain. Signed-off-by: Ard Biesheuvel --- drivers/acpi/irq.c | 14 ++++++++++---- include/linux/acpi.h | 1 + 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/irq.c b/drivers/acpi/irq.c index c3b2222e2129..d47bbd54d4aa 100644 --- a/drivers/acpi/irq.c +++ b/drivers/acpi/irq.c @@ -17,6 +17,14 @@ enum acpi_irq_model_id acpi_irq_model; static struct fwnode_handle *acpi_gsi_domain_id; +/** + * acpi_get_gsi_irqdomain - Retrieve the irqdomain that owns the GSI space. + */ +struct irq_domain *acpi_get_gsi_irqdomain(void) +{ + return irq_find_matching_fwnode(acpi_gsi_domain_id, DOMAIN_BUS_ANY); +} + /** * acpi_gsi_to_irq() - Retrieve the linux irq number for a given GSI * @gsi: GSI IRQ number to map @@ -29,8 +37,7 @@ static struct fwnode_handle *acpi_gsi_domain_id; */ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { - struct irq_domain *d = irq_find_matching_fwnode(acpi_gsi_domain_id, - DOMAIN_BUS_ANY); + struct irq_domain *d = acpi_get_gsi_irqdomain(); *irq = irq_find_mapping(d, gsi); /* @@ -76,8 +83,7 @@ EXPORT_SYMBOL_GPL(acpi_register_gsi); */ void acpi_unregister_gsi(u32 gsi) { - struct irq_domain *d = irq_find_matching_fwnode(acpi_gsi_domain_id, - DOMAIN_BUS_ANY); + struct irq_domain *d = acpi_get_gsi_irqdomain(); int irq = irq_find_mapping(d, gsi); irq_dispose_mapping(irq); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index d5dcebd7aad3..1016027dd626 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -316,6 +316,7 @@ static inline bool acpi_sci_irq_valid(void) extern int sbf_port; extern unsigned long acpi_realmode_flags; +struct irq_domain *acpi_get_gsi_irqdomain(void); int acpi_register_gsi (struct device *dev, u32 gsi, int triggering, int polarity); int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); int acpi_isa_irq_to_gsi (unsigned isa_irq, u32 *gsi); From patchwork Mon Apr 29 13:12:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10921805 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D6CCD14D5 for ; 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Mon, 29 Apr 2019 06:12:16 -0700 (PDT) Received: from sudo.home ([2a01:cb1d:112:6f00:f9fc:88:6502:8fa7]) by smtp.gmail.com with ESMTPSA id s16sm5410282wrg.71.2019.04.29.06.12.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Apr 2019 06:12:15 -0700 (PDT) From: Ard Biesheuvel To: linux-gpio@vger.kernel.org Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Masahisa Kojima , Linus Walleij , Marc Zyngier , Graeme Gregory , Lorenzo Pieralisi , Mika Westerberg , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v2 2/4] irqchip/exiu: preparatory refactor for ACPI support Date: Mon, 29 Apr 2019 15:12:06 +0200 Message-Id: <20190429131208.3620-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190429131208.3620-1-ard.biesheuvel@linaro.org> References: <20190429131208.3620-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In preparation of adding support for EXIU controller devices described via ACPI, split the DT init function in a DT specific and a generic part, where the latter will be reused for ACPI support later. Signed-off-by: Ard Biesheuvel --- drivers/irqchip/irq-sni-exiu.c | 77 ++++++++++++-------- 1 file changed, 48 insertions(+), 29 deletions(-) diff --git a/drivers/irqchip/irq-sni-exiu.c b/drivers/irqchip/irq-sni-exiu.c index 1927b2f36ff6..52ce662334d4 100644 --- a/drivers/irqchip/irq-sni-exiu.c +++ b/drivers/irqchip/irq-sni-exiu.c @@ -1,7 +1,7 @@ /* * Driver for Socionext External Interrupt Unit (EXIU) * - * Copyright (c) 2017 Linaro, Ltd. + * Copyright (c) 2017-2019 Linaro, Ltd. * * Based on irq-tegra.c: * Copyright (C) 2011 Google, Inc. @@ -167,35 +167,25 @@ static const struct irq_domain_ops exiu_domain_ops = { .free = irq_domain_free_irqs_common, }; -static int __init exiu_init(struct device_node *node, - struct device_node *parent) +static struct irq_domain *exiu_init(struct irq_domain *parent_domain, + struct fwnode_handle *fwnode, + struct resource *res) { - struct irq_domain *parent_domain, *domain; + struct irq_domain *domain; struct exiu_irq_data *data; int err; - if (!parent) { - pr_err("%pOF: no parent, giving up\n", node); - return -ENODEV; - } - - parent_domain = irq_find_host(parent); - if (!parent_domain) { - pr_err("%pOF: unable to obtain parent domain\n", node); - return -ENXIO; - } - data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) - return -ENOMEM; + return ERR_PTR(-ENOMEM); - if (of_property_read_u32(node, "socionext,spi-base", &data->spi_base)) { - pr_err("%pOF: failed to parse 'spi-base' property\n", node); + if (fwnode_property_read_u32_array(fwnode, "socionext,spi-base", + &data->spi_base, 1)) { err = -ENODEV; goto out_free; } - data->base = of_iomap(node, 0); + data->base = ioremap(res->start, resource_size(res)); if (!data->base) { err = -ENODEV; goto out_free; @@ -205,23 +195,52 @@ static int __init exiu_init(struct device_node *node, writel_relaxed(0xFFFFFFFF, data->base + EIREQCLR); writel_relaxed(0xFFFFFFFF, data->base + EIMASK); - domain = irq_domain_add_hierarchy(parent_domain, 0, NUM_IRQS, node, - &exiu_domain_ops, data); + domain = irq_domain_create_hierarchy(parent_domain, 0, NUM_IRQS, + fwnode, &exiu_domain_ops, data); if (!domain) { - pr_err("%pOF: failed to allocate domain\n", node); err = -ENOMEM; goto out_unmap; } + return domain; +out_unmap: + iounmap(data->base); +out_free: + kfree(data); + return ERR_PTR(err); +} + +static int __init exiu_dt_init(struct device_node *node, + struct device_node *parent) +{ + struct irq_domain *parent_domain, *domain; + struct resource res; + + if (!parent) { + pr_err("%pOF: no parent, giving up\n", node); + return -ENODEV; + } + + parent_domain = irq_find_host(parent); + if (!parent_domain) { + pr_err("%pOF: unable to obtain parent domain\n", node); + return -ENXIO; + } + + if (of_address_to_resource(node, 0, &res)) { + pr_err("%pOF: failed to parse memory resource\n", node); + return -ENXIO; + } + + domain = exiu_init(parent_domain, of_node_to_fwnode(node), &res); + if (IS_ERR(domain)) { + pr_err("%pOF: failed to create IRQ domain (%ld)\n", node, + PTR_ERR(domain)); + return PTR_ERR(domain); + } pr_info("%pOF: %d interrupts forwarded to %pOF\n", node, NUM_IRQS, parent); return 0; - -out_unmap: - iounmap(data->base); -out_free: - kfree(data); - return err; } -IRQCHIP_DECLARE(exiu, "socionext,synquacer-exiu", exiu_init); +IRQCHIP_DECLARE(exiu, "socionext,synquacer-exiu", exiu_dt_init); From patchwork Mon Apr 29 13:12:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10921807 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B05821390 for ; Mon, 29 Apr 2019 13:12:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A0904285A8 for ; Mon, 29 Apr 2019 13:12:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9520E286CF; Mon, 29 Apr 2019 13:12:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B0CA9285A8 for ; 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Mon, 29 Apr 2019 06:12:16 -0700 (PDT) From: Ard Biesheuvel To: linux-gpio@vger.kernel.org Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Masahisa Kojima , Linus Walleij , Marc Zyngier , Graeme Gregory , Lorenzo Pieralisi , Mika Westerberg , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v2 3/4] irqchip/exiu: implement ACPI support Date: Mon, 29 Apr 2019 15:12:07 +0200 Message-Id: <20190429131208.3620-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190429131208.3620-1-ard.biesheuvel@linaro.org> References: <20190429131208.3620-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose the existing EXIU hierarchical irqchip domain code to permit the interrupt controller to be used as the irqchip component of a GPIO controller on ACPI systems, or as the target of ordinary interrupt resources. Signed-off-by: Ard Biesheuvel --- drivers/irqchip/irq-sni-exiu.c | 72 +++++++++++++++++--- 1 file changed, 64 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-sni-exiu.c b/drivers/irqchip/irq-sni-exiu.c index 52ce662334d4..68394f804af1 100644 --- a/drivers/irqchip/irq-sni-exiu.c +++ b/drivers/irqchip/irq-sni-exiu.c @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -134,9 +135,13 @@ static int exiu_domain_translate(struct irq_domain *domain, *hwirq = fwspec->param[1] - info->spi_base; *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; - return 0; + } else { + if (fwspec->param_count != 2) + return -EINVAL; + *hwirq = fwspec->param[0]; + *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; } - return -EINVAL; + return 0; } static int exiu_domain_alloc(struct irq_domain *dom, unsigned int virq, @@ -147,16 +152,21 @@ static int exiu_domain_alloc(struct irq_domain *dom, unsigned int virq, struct exiu_irq_data *info = dom->host_data; irq_hw_number_t hwirq; - if (fwspec->param_count != 3) - return -EINVAL; /* Not GIC compliant */ - if (fwspec->param[0] != GIC_SPI) - return -EINVAL; /* No PPI should point to this domain */ + parent_fwspec = *fwspec; + if (is_of_node(dom->parent->fwnode)) { + if (fwspec->param_count != 3) + return -EINVAL; /* Not GIC compliant */ + if (fwspec->param[0] != GIC_SPI) + return -EINVAL; /* No PPI should point to this domain */ + hwirq = fwspec->param[1] - info->spi_base; + } else { + hwirq = fwspec->param[0]; + parent_fwspec.param[0] = hwirq + info->spi_base + 32; + } WARN_ON(nr_irqs != 1); - hwirq = fwspec->param[1] - info->spi_base; irq_domain_set_hwirq_and_chip(dom, virq, hwirq, &exiu_irq_chip, info); - parent_fwspec = *fwspec; parent_fwspec.fwnode = dom->parent->fwnode; return irq_domain_alloc_irqs_parent(dom, virq, nr_irqs, &parent_fwspec); } @@ -244,3 +254,49 @@ static int __init exiu_dt_init(struct device_node *node, return 0; } IRQCHIP_DECLARE(exiu, "socionext,synquacer-exiu", exiu_dt_init); + +#ifdef CONFIG_ACPI +static int exiu_acpi_probe(struct platform_device *pdev) +{ + struct irq_domain *parent_domain, *domain; + struct resource *res; + + parent_domain = acpi_get_gsi_irqdomain(); + if (!parent_domain) { + dev_err(&pdev->dev, "unable to obtain parent domain\n"); + return -ENODEV; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "failed to parse memory resource\n"); + return -ENXIO; + } + + domain = exiu_init(parent_domain, dev_fwnode(&pdev->dev), res); + if (IS_ERR(domain)) { + dev_err(&pdev->dev, "failed to create IRQ domain (%ld)\n", + PTR_ERR(domain)); + return PTR_ERR(domain); + } + + dev_info(&pdev->dev, "%d interrupts forwarded\n", NUM_IRQS); + + return 0; +} + +static const struct acpi_device_id exiu_acpi_ids[] = { + { "SCX0008" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, exiu_acpi_ids); + +static struct platform_driver exiu_driver = { + .driver = { + .name = "exiu", + .acpi_match_table = exiu_acpi_ids, + }, + .probe = exiu_acpi_probe, +}; +builtin_platform_driver(exiu_driver); +#endif From patchwork Mon Apr 29 13:12:08 2019 Content-Type: text/plain; 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Mon, 29 Apr 2019 06:12:18 -0700 (PDT) From: Ard Biesheuvel To: linux-gpio@vger.kernel.org Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Masahisa Kojima , Linus Walleij , Marc Zyngier , Graeme Gregory , Lorenzo Pieralisi , Mika Westerberg , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v2 4/4] gpio: mb86s7x: enable ACPI support Date: Mon, 29 Apr 2019 15:12:08 +0200 Message-Id: <20190429131208.3620-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190429131208.3620-1-ard.biesheuvel@linaro.org> References: <20190429131208.3620-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make the mb86s7x GPIO block discoverable via ACPI. In addition, add support for ACPI GPIO interrupts routed via platform interrupts, by wiring the two together via the to_irq() gpiochip callback. Signed-off-by: Ard Biesheuvel Reviewed-by: Mika Westerberg --- drivers/gpio/gpio-mb86s7x.c | 57 ++++++++++++++++---- 1 file changed, 48 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c index 3134c0d2bfe4..61ad95c3e3d2 100644 --- a/drivers/gpio/gpio-mb86s7x.c +++ b/drivers/gpio/gpio-mb86s7x.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -27,6 +28,8 @@ #include #include +#include "gpiolib.h" + /* * Only first 8bits of a register correspond to each pin, * so there are 4 registers for 32 pins. @@ -143,6 +146,20 @@ static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) spin_unlock_irqrestore(&gchip->lock, flags); } +static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) +{ + int irq, index; + + for (index = 0;; index++) { + irq = platform_get_irq(to_platform_device(gc->parent), index); + if (irq <= 0) + break; + if (irq_get_irq_data(irq)->hwirq == offset) + return irq; + } + return -EINVAL; +} + static int mb86s70_gpio_probe(struct platform_device *pdev) { struct mb86s70_gpio_chip *gchip; @@ -160,13 +177,15 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) if (IS_ERR(gchip->base)) return PTR_ERR(gchip->base); - gchip->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(gchip->clk)) - return PTR_ERR(gchip->clk); + if (!ACPI_COMPANION(&pdev->dev)) { + gchip->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(gchip->clk)) + return PTR_ERR(gchip->clk); - ret = clk_prepare_enable(gchip->clk); - if (ret) - return ret; + ret = clk_prepare_enable(gchip->clk); + if (ret) + return ret; + } spin_lock_init(&gchip->lock); @@ -182,21 +201,32 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) gchip->gc.parent = &pdev->dev; gchip->gc.base = -1; + if (ACPI_COMPANION(&pdev->dev)) + gchip->gc.to_irq = mb86s70_gpio_to_irq; + ret = gpiochip_add_data(&gchip->gc, gchip); if (ret) { dev_err(&pdev->dev, "couldn't register gpio driver\n"); - clk_disable_unprepare(gchip->clk); + if (gchip->clk) + clk_disable_unprepare(gchip->clk); + return ret; } - return ret; + if (ACPI_COMPANION(&pdev->dev)) + acpi_gpiochip_request_interrupts(&gchip->gc); + + return 0; } static int mb86s70_gpio_remove(struct platform_device *pdev) { struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev); + if (ACPI_COMPANION(&pdev->dev)) + acpi_gpiochip_free_interrupts(&gchip->gc); gpiochip_remove(&gchip->gc); - clk_disable_unprepare(gchip->clk); + if (gchip->clk) + clk_disable_unprepare(gchip->clk); return 0; } @@ -207,10 +237,19 @@ static const struct of_device_id mb86s70_gpio_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids); +#ifdef CONFIG_ACPI +static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = { + { "SCX0007" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids); +#endif + static struct platform_driver mb86s70_gpio_driver = { .driver = { .name = "mb86s70-gpio", .of_match_table = mb86s70_gpio_dt_ids, + .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids), }, .probe = mb86s70_gpio_probe, .remove = mb86s70_gpio_remove,