From patchwork Mon Apr 29 19:57:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 10922441 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D81014D5 for ; Mon, 29 Apr 2019 19:58:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D12528716 for ; Mon, 29 Apr 2019 19:58:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 309F3288E4; Mon, 29 Apr 2019 19:58:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B9F1E288BA for ; Mon, 29 Apr 2019 19:58:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yr2J2YLmd5VRd54dKtG892QxzSE3qkQy1vUmXqgdwcQ=; b=fao2LaP/mxZzi+ pRAAhCPXsVcjx2Oz8KiGzOhuUnXuhLdJriybbQe8nqisKuU9oiLfOMTUbxfb+YDsyFcyrbQqgU6K4 U5FbdEpnt0kI8zsMeq/sYx0bb68aer/BQ/IPIY16jZNerdwwglE1z1SvIHfIRg7yuMIoDKPsvo+IG LTVu4N+VnPjsM2qfVFrMgtuFma3m79lnSKGuD/Awktj1Kk3Mq4tvQ2wZk/UYdt4MMdR3Jkq0vwU3o zrfZWNQSE8CTZufc6Fo3LQ8ro/4vMZIB3rMYG+ENMFlLEn8qsQNtVnvw8p+YqZEoRHv3drAne/EUQ MzDo17jP0ydmu6Uc68QQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hLCPn-0003gj-3q; Mon, 29 Apr 2019 19:58:15 +0000 Received: from esa2.hgst.iphmx.com ([68.232.143.124]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hLCPk-0003fL-H7 for linux-riscv@lists.infradead.org; Mon, 29 Apr 2019 19:58:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1556567911; x=1588103911; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GQpKXJ6rfJbjxybm+qOYB3z1XmPhKagdgdILF7N0WwA=; b=iD3LR0MpV51a0bOMhDUIN8naLB54WOFwNPbvXIQwIaPJg903aLsU/UxH mK2Qa4cEwJkLEJDD+p6hUrX1n6a5X7o7D9ykqTrMDiYj4r6Qww9NruvdJ ECIQHXyku3tdC1Fn1VAOaspf5JXgycNAwMgXuh6aNgQjqgBjInb7/wvuc 5jz3eHeJE5spWMwVKEj+LltEfVICc3s5erkWIgAk3altuEknKpsc8hjLO xGp1J4DlKTmLT8wsoScBUNp61DBrtBUu4Jm9NjtEF5K5Am03HHVesng/Q c2+1/rh12HXxFW0V+ON/St8klQPSgpkkOzomcWJ2jJ0S2WPGdZG9VXrVb w==; X-IronPort-AV: E=Sophos;i="5.60,410,1549900800"; d="scan'208";a="206289672" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 30 Apr 2019 03:58:29 +0800 IronPort-SDR: t+DV2Bl4iIl8wCgGAiYOccWVzMksLkw2DuT1ThbDp97DFgo4apvoiv7h0tzWY9ueypSKI3z8r7 qTEKSX0oDZ1OWrO+ejzMxqcScwprxhofBIWPuZNnVYMobMLb0zXk8DxGPLaQoGiufoEF6eYrTO LiOmbCasDSeZB4DR27SmhzIR286VIbePzK3Jvn94B3805E3DraCr2yMYRTUkyn9YKxMl1+5QWk ICEQVbjG8+HIKbshjzV1AZRBZTUpNDM4ZzQ/K0ssTd5+Bq/7jOKq44wJEDjq4Pf2i6LGeOVp48 toHnOolvyMOqVKU2/9tCKkWw Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP; 29 Apr 2019 12:36:42 -0700 IronPort-SDR: wz9YGcayYviARxURW0XYZuUzYVCZFmYVx0XdGd5JZHZiNh02M12LMvPMG8IMYcAtZPZcy1EeDb h3W9jYm/1FQlZZHxDvV7Prowbsd3Hyz1a/RTdWFHN0r5GMxoiiiDXhfxhLeiwqugDGnA05Ljq4 moiPxBN2X9YhDPIWKJYtQve9/hgsixthYTDEgtOkb23Yld3IOO/JdsyvvCGFG92A8VPkK75xXs A9KKcfbWLwIjssH3PDU+LBp77MSbbrSFkbhUoC8pi5FigiTn+C/eTzzxNX9qF9uVZ00cmOxTce epM= Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 29 Apr 2019 12:58:11 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] x86: Move DEBUG_TLBFLUSH option. Date: Mon, 29 Apr 2019 12:57:57 -0700 Message-Id: <20190429195759.18330-2-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190429195759.18330-1-atish.patra@wdc.com> References: <20190429195759.18330-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190429_125812_599654_D6F903F5 X-CRM114-Status: GOOD ( 14.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christoph Hellwig , Albert Ou , Thomas Gleixner , Kees Cook , Changbin Du , Anup Patel , Palmer Dabbelt , "maintainer:X86 ARCHITECTURE 32-BIT AND 64-BIT" , linux-mm@kvack.org, Atish Patra , Ingo Molnar , Borislav Petkov , Vlastimil Babka , Gary Guo , "H. Peter Anvin" , Andrew Morton , linux-riscv@lists.infradead.org, Luc Van Oostenryck Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP CONFIG_DEBUG_TLBFLUSH was added in 'commit 3df3212f9722 ("x86/tlb: add tlb_flushall_shift knob into debugfs")' to support tlb_flushall_shift knob. The knob was removed in 'commit e9f4e0a9fe27 ("x86/mm: Rip out complicated, out-of-date, buggy TLB flushing")'. However, the debug option was never removed from Kconfig. It was reused in commit '9824cf9753ec ("mm: vmstats: tlb flush counters")' but the commit text was never updated accordingly. Update the Kconfig option description as per its current usage. Take this opprtunity to make this kconfig option a common option as it touches the common vmstat code. Introduce another arch specific config HAVE_ARCH_DEBUG_TLBFLUSH that can be selected to enable this config. Signed-off-by: Atish Patra --- arch/x86/Kconfig | 1 + arch/x86/Kconfig.debug | 19 ------------------- mm/Kconfig.debug | 13 +++++++++++++ 3 files changed, 14 insertions(+), 19 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 62fc3fda1a05..4c59f59e9491 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -132,6 +132,7 @@ config X86 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 select HAVE_ARCH_VMAP_STACK if X86_64 select HAVE_ARCH_WITHIN_STACK_FRAMES + select HAVE_ARCH_DEBUG_TLBFLUSH if DEBUG_KERNEL select HAVE_CMPXCHG_DOUBLE select HAVE_CMPXCHG_LOCAL select HAVE_CONTEXT_TRACKING if X86_64 diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index 15d0fbe27872..0c8f9931e901 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug @@ -124,25 +124,6 @@ config DOUBLEFAULT option saves about 4k and might cause you much additional grey hair. -config DEBUG_TLBFLUSH - bool "Set upper limit of TLB entries to flush one-by-one" - depends on DEBUG_KERNEL - ---help--- - - X86-only for now. - - This option allows the user to tune the amount of TLB entries the - kernel flushes one-by-one instead of doing a full TLB flush. In - certain situations, the former is cheaper. This is controlled by the - tlb_flushall_shift knob under /sys/kernel/debug/x86. If you set it - to -1, the code flushes the whole TLB unconditionally. Otherwise, - for positive values of it, the kernel will use single TLB entry - invalidating instructions according to the following formula: - - flush_entries <= active_tlb_entries / 2^tlb_flushall_shift - - If in doubt, say "N". - config IOMMU_DEBUG bool "Enable IOMMU debugging" depends on GART_IOMMU && DEBUG_KERNEL diff --git a/mm/Kconfig.debug b/mm/Kconfig.debug index e3df921208c0..760c3fda8b57 100644 --- a/mm/Kconfig.debug +++ b/mm/Kconfig.debug @@ -111,3 +111,16 @@ config DEBUG_RODATA_TEST depends on STRICT_KERNEL_RWX ---help--- This option enables a testcase for the setting rodata read-only. + +config HAVE_ARCH_DEBUG_TLBFLUSH + bool + depends on DEBUG_KERNEL + +config DEBUG_TLBFLUSH + bool "Save tlb flush statstics to vmstat" + depends on HAVE_ARCH_DEBUG_TLBFLUSH + help + + Add tlbflush statstics to vmstat. It is really helpful understand tlbflush + performance and behavior. It should be enabled only for debugging purpose + by individual architectures explicitly by selecting HAVE_ARCH_DEBUG_TLBFLUSH. From patchwork Mon Apr 29 19:57:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 10922443 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 13D9B1395 for ; Mon, 29 Apr 2019 19:58:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0340F28716 for ; Mon, 29 Apr 2019 19:58:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB70E288E4; Mon, 29 Apr 2019 19:58:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9F38128716 for ; Mon, 29 Apr 2019 19:58:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IdIvlFzP+0IyvriZ0etoOJo7l2zL9apqb0hD4uGSj8U=; b=OXe+FH/PFcQhcS nIbofRSANn+XgqkyYQyh7g7ekMFSJ+KngXWUO8oReuUw0kTf5qQbd4MEOeIrXHG0B8VWWWY6xT1bN qhCBz8ggqgm3sg7muqh+UIf6IxGM/pUqgMsCP70cK3/oai1ILnRM5ZByqcZY1TobMQwlAd5sgrkb4 wHjeCYe5om1dtid72qVumHRMUjP6gnyGuUr23OSayGOlm1g9N1wb+kJnQw6O1IgY8YvC7hoMTzQfa LLfgkDUOUjEMrGBHuMNIP5c+SYrYQWkO1g4gr9tg5KISWczZSW7UglaVTAWoo9ytQmubM4TAeNXRx woOzvYKdHKZ/10ZPo05A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hLCPp-0003kS-UH; Mon, 29 Apr 2019 19:58:17 +0000 Received: from esa2.hgst.iphmx.com ([68.232.143.124]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hLCPl-0003f7-4v for linux-riscv@lists.infradead.org; Mon, 29 Apr 2019 19:58:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1556567911; x=1588103911; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=674EX0iIftC/tP47ciQ2WAq8p0Blf4MJzfJ6YEpD/54=; b=OIzZ0jTADC+c7jZh7Beuva0K7MaJCnctKoV+4Zo64dKUEU0c75s/FsQY 2biJrIODccWW5coJKzRe1b/qhb2qXSE2WpPiEoxDanx2SnwdG5wHtrdtl fZBfLN5/Qha0akA9JGh5wItcT/7VHw6egIwatUZBoU6urOQoZ5YQ7BDIy u/ipwkWVl75Y+uNbKV9ndptn/ym77XsuBl3mRc7ipyKLO0ASOclsr378D oct5xqU/Ct5uIMomST8KjYjSXO/jaO26LgGzBQ/wPFayUN2bTZlhfB3eW UCFVpbwLjf9D8RRdhADvA22MH6iqTFVMLv5xDYQpAL0ksXxt2xD7Gq6S8 g==; X-IronPort-AV: E=Sophos;i="5.60,410,1549900800"; d="scan'208";a="206289673" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 30 Apr 2019 03:58:30 +0800 IronPort-SDR: rqlqaz/ORml4liPworRb1RjeBnbbop2HmWBMkCLTVRLUX2hPAHWPZGoTfA2jlJxOlTW+fwXrQ2 fVsek5wUdOsMC1j0WCii0/R3O/IsNG85FvfBLPxqKYjC86v7FWocDEAifeLyDEkFhf1lSM+vOW cVQ0rmp+8maRoWSPAyT20xyWF8hl59GgVSH6okw66s12QKv4j9gBdDaN7tXvg352MZESFsRBOU COH8bvyZYSBaLQuPBYSHqiJzrf4+EE5YliKy4RGRV7JiwBtRudF27OgRx7pfiISvgGp+Xuu3uE HU4fDAtle2lNNyyJRGPzH4gb Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP; 29 Apr 2019 12:36:43 -0700 IronPort-SDR: Bt0jcdD1gm6d1cRvYD8xLZ7OUU/7ALDxMP8bBhd/gEWwUm0ZOsyuoXKhnV/Htgbmrf1RFmzG5a KdmEWUvthppVLvTA/Wn2Wuh9DNVRFYVw78A+JrkdrPf+GhM2TyGnTWr7XZAa/3XETeB0z6VmGW Nr8nyyN1U1289sezewNwGRjArVhMrC560i55lAnYqYS4xUqANmVFYO1xUWVEonuy8UVyPN4UZY SpvkvHtvLuG2nrfaNqKYpDrYj+YxmwOv76nBf9H3mxnpjf3yRS75QhSJzUH0vhLsZUtfAEVqHj T54= Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 29 Apr 2019 12:58:11 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] RISC-V: Enable TLBFLUSH counters for debug kernel. Date: Mon, 29 Apr 2019 12:57:58 -0700 Message-Id: <20190429195759.18330-3-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190429195759.18330-1-atish.patra@wdc.com> References: <20190429195759.18330-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190429_125813_224380_34C7FA5C X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christoph Hellwig , Albert Ou , Thomas Gleixner , Kees Cook , Changbin Du , Anup Patel , Palmer Dabbelt , "maintainer:X86 ARCHITECTURE 32-BIT AND 64-BIT" , linux-mm@kvack.org, Atish Patra , Ingo Molnar , Borislav Petkov , Vlastimil Babka , Gary Guo , "H. Peter Anvin" , Andrew Morton , linux-riscv@lists.infradead.org, Luc Van Oostenryck Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The TLB flush counters under vmstat seems to be very helpful while debugging TLB flush performance in RISC-V. Add the Kconfig option only for debug kernels. Signed-off-by: Atish Patra --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index eb56c82d8aa1..c1ee876d1e7f 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -49,6 +49,7 @@ config RISCV select GENERIC_IRQ_MULTI_HANDLER select ARCH_HAS_PTE_SPECIAL select HAVE_EBPF_JIT if 64BIT + select HAVE_ARCH_DEBUG_TLBFLUSH if DEBUG_KERNEL config MMU def_bool y From patchwork Mon Apr 29 19:57:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 10922445 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A20014C0 for ; Mon, 29 Apr 2019 19:58:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EC19C28716 for ; Mon, 29 Apr 2019 19:58:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DF800288E4; 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29 Apr 2019 12:36:43 -0700 IronPort-SDR: UFWPaNgFKiyS+kM5SJyaKOUbUteycQhA9GHu35ZdcqxcIAwpMq8jMx6cNKm2y61EvnKQIFA4g6 adyt71wuZeOe/j/KIJZpFB2cH7aaoEu+AewDQCjkARDNK6tKK3Ss/l+or3zUgnpe45r8pEQkIk Y4X8GvyOZtE6EMtIew7DWbZqn+xPD9yVsW1Tg3JnbklQSamvfjNHbVdnBrVnlis/LKUG2/sMoI J22J0Ee7szjf8iEwrssNPsTdXyQfMfR6jgh0cXur2FRS7yIgCImTKqhsa+TrLQ0cRGszY6tVQd xPQ= Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 29 Apr 2019 12:58:12 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] RISC-V: Update tlb flush counters Date: Mon, 29 Apr 2019 12:57:59 -0700 Message-Id: <20190429195759.18330-4-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190429195759.18330-1-atish.patra@wdc.com> References: <20190429195759.18330-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190429_125813_446304_4F5F5D5F X-CRM114-Status: GOOD ( 12.67 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christoph Hellwig , Albert Ou , Thomas Gleixner , Kees Cook , Changbin Du , Anup Patel , Palmer Dabbelt , "maintainer:X86 ARCHITECTURE 32-BIT AND 64-BIT" , linux-mm@kvack.org, Atish Patra , Ingo Molnar , Borislav Petkov , Vlastimil Babka , Gary Guo , "H. Peter Anvin" , Andrew Morton , linux-riscv@lists.infradead.org, Luc Van Oostenryck Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The TLB flush counters under vmstat seems to be very helpful while debugging TLB flush performance in RISC-V. Update the counters in every TLB flush methods respectively. Signed-off-by: Atish Patra --- arch/riscv/include/asm/tlbflush.h | 5 +++++ arch/riscv/mm/tlbflush.c | 12 ++++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h index 29a780ca232a..19779a083f52 100644 --- a/arch/riscv/include/asm/tlbflush.h +++ b/arch/riscv/include/asm/tlbflush.h @@ -9,6 +9,7 @@ #define _ASM_RISCV_TLBFLUSH_H #include +#include /* * Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction @@ -16,11 +17,13 @@ */ static inline void local_flush_tlb_all(void) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); __asm__ __volatile__ ("sfence.vma" : : : "memory"); } static inline void local_flush_tlb_mm(struct mm_struct *mm) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); /* Flush ASID 0 so that global mappings are not affected */ __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (0) : "memory"); } @@ -28,6 +31,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm) static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE); __asm__ __volatile__ ("sfence.vma %0, %1" : : "r" (addr), "r" (0) : "memory"); @@ -35,6 +39,7 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, static inline void local_flush_tlb_kernel_page(unsigned long addr) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE); __asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory"); } diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index ceee76f14a0a..8072d7da32bb 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -4,6 +4,8 @@ */ #include +#include +#include #include #define SFENCE_VMA_FLUSH_ALL ((unsigned long) -1) @@ -110,6 +112,7 @@ static void ipi_remote_sfence_vma(void *info) unsigned long size = data->size; unsigned long i; + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED); if (size == SFENCE_VMA_FLUSH_ALL) { local_flush_tlb_all(); } @@ -129,6 +132,8 @@ static void ipi_remote_sfence_vma_asid(void *info) unsigned long size = data->size; unsigned long i; + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED); + /* Flush entire MM context */ if (size == SFENCE_VMA_FLUSH_ALL) { __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (asid) @@ -158,6 +163,13 @@ static void remote_sfence_vma(unsigned long start, unsigned long size) static void remote_sfence_vma_asid(cpumask_t *mask, unsigned long start, unsigned long size, unsigned long asid) { + int cpuid = smp_processor_id(); + + if (cpumask_equal(mask, cpumask_of(cpuid))) + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); + else + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH); + if (tlbi_ipi) { struct tlbi info = { .start = start,