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Thu, 2 May 2019 16:10:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 644008970E; Thu, 2 May 2019 16:10:13 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-eopbgr140084.outbound.protection.outlook.com [40.107.14.84]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2FCFF89700 for ; Thu, 2 May 2019 16:10:11 +0000 (UTC) Received: from VI1PR0801MB1935.eurprd08.prod.outlook.com (10.173.73.149) by VI1PR0801MB2080.eurprd08.prod.outlook.com (10.173.75.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Thu, 2 May 2019 16:10:09 +0000 Received: from VI1PR0801MB1935.eurprd08.prod.outlook.com ([fe80::ec0c:910f:7b71:aff4]) by VI1PR0801MB1935.eurprd08.prod.outlook.com ([fe80::ec0c:910f:7b71:aff4%7]) with mapi id 15.20.1856.008; Thu, 2 May 2019 16:10:09 +0000 From: Ben Davis To: "dri-devel@lists.freedesktop.org" Subject: [PATCH v4 1/2] drm: Add writeback_dest_x,y,w,h properties Thread-Topic: [PATCH v4 1/2] drm: Add writeback_dest_x,y,w,h properties Thread-Index: AQHVAQGDKQyFqqQxLkerU+Fz0XpoAg== Date: Thu, 2 May 2019 16:10:09 +0000 Message-ID: <1556813386-18823-2-git-send-email-ben.davis@arm.com> References: <1556813386-18823-1-git-send-email-ben.davis@arm.com> In-Reply-To: <1556813386-18823-1-git-send-email-ben.davis@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [217.140.106.53] x-clientproxiedby: LO2P123CA0018.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:a6::30) To VI1PR0801MB1935.eurprd08.prod.outlook.com (2603:10a6:800:89::21) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.7.4 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 9a4ca712-00a3-41a1-964f-08d6cf18a5d1 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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These are reset to 0 on duplicating state to provide robustness against accidental scaling. Signed-off-by: Ben Davis Reviewed-by: Liviu Dudau --- drivers/gpu/drm/drm_atomic_state_helper.c | 6 +++ drivers/gpu/drm/drm_atomic_uapi.c | 17 ++++++++ drivers/gpu/drm/drm_writeback.c | 66 +++++++++++++++++++++++++++++++ include/drm/drm_connector.h | 23 +++++++++++ include/drm/drm_mode_config.h | 20 ++++++++++ 5 files changed, 132 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 25a95b9..5973ca3 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -382,6 +382,12 @@ __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, /* Don't copy over a writeback job, they are used only once */ state->writeback_job = NULL; + + /* Auto clear writeback coordinates, should only be used once */ + state->writeback_dest_x = 0; + state->writeback_dest_y = 0; + state->writeback_dest_w = 0; + state->writeback_dest_h = 0; } EXPORT_SYMBOL(__drm_atomic_helper_connector_duplicate_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index d520a04..7d3fb7f 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -765,6 +765,14 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, return -EINVAL; } state->content_protection = val; + } else if (property == config->prop_writeback_dest_x) { + state->writeback_dest_x = val; + } else if (property == config->prop_writeback_dest_y) { + state->writeback_dest_y = val; + } else if (property == config->prop_writeback_dest_w) { + state->writeback_dest_w = val; + } else if (property == config->prop_writeback_dest_h) { + state->writeback_dest_h = val; } else if (property == config->writeback_fb_id_property) { struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val); int ret = drm_atomic_set_writeback_fb_for_connector(state, fb); @@ -837,6 +845,15 @@ drm_atomic_connector_get_property(struct drm_connector *connector, *val = state->scaling_mode; } else if (property == connector->content_protection_property) { *val = state->content_protection; + } else if (property == config->prop_writeback_dest_x) { + /* Auto clear wb co-ordinates to prevent accidental scaling */ + *val = 0; + } else if (property == config->prop_writeback_dest_y) { + *val = 0; + } else if (property == config->prop_writeback_dest_w) { + *val = 0; + } else if (property == config->prop_writeback_dest_h) { + *val = 0; } else if (property == config->writeback_fb_id_property) { /* Writeback framebuffer is one-shot, write and forget */ *val = 0; diff --git a/drivers/gpu/drm/drm_writeback.c b/drivers/gpu/drm/drm_writeback.c index c20e6fe..7c53abd 100644 --- a/drivers/gpu/drm/drm_writeback.c +++ b/drivers/gpu/drm/drm_writeback.c @@ -74,6 +74,30 @@ * applications making use of writeback connectors *always* retrieve an * out-fence for the commit and use it appropriately. * From userspace, this property will always read as zero. + * + * "WRITEBACK_DEST_X": + * The x-coordinate to write back onto the output writeback framebuffer. + * 0 acts as default. If non-zero the composition will be translated + * horizontally in the buffer by the amount specified. This is the case + * even if not scaling on writeback. + * + * "WRITEBACK_DEST_Y": + * The y-coordinate to write back onto the output writeback framebuffer. + * 0 acts as default. If non-zero the composition will be translated + * vertically in the buffer by the amount specified. This is the case even + * if not scaling on writeback. + * + * "WRITEBACK_DEST_W": + * The width of the composition to write back. 0 acts as default. If + * non-zero the composition will be scaled to match the given width. + * If scaling both WRITEBACK_DEST_W and WRITEBACK_DEST_H should be + * set as non-zero. + * + * "WRITEBACK_DEST_H": + * The height of the composition to write back. 0 acts as default. If + * non-zero the composition will be scaled to match the given height. + * If scaling both WRITEBACK_DEST_W and WRITEBACK_DEST_H should be + * set as non-zero. */ #define fence_to_wb_connector(x) container_of(x->lock, \ @@ -141,6 +165,38 @@ static int create_writeback_properties(struct drm_device *dev) dev->mode_config.writeback_out_fence_ptr_property = prop; } + if (!dev->mode_config.prop_writeback_dest_x) { + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, + "WRITEBACK_DEST_X", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.prop_writeback_dest_x = prop; + } + + if (!dev->mode_config.prop_writeback_dest_y) { + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, + "WRITEBACK_DEST_Y", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.prop_writeback_dest_y = prop; + } + + if (!dev->mode_config.prop_writeback_dest_w) { + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, + "WRITEBACK_DEST_W", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.prop_writeback_dest_w = prop; + } + + if (!dev->mode_config.prop_writeback_dest_h) { + prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, + "WRITEBACK_DEST_H", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.prop_writeback_dest_h = prop; + } + return 0; } @@ -225,6 +281,16 @@ int drm_writeback_connector_init(struct drm_device *dev, drm_object_attach_property(&connector->base, config->writeback_pixel_formats_property, blob->base.id); + + drm_object_attach_property(&connector->base, + config->prop_writeback_dest_x, 0); + drm_object_attach_property(&connector->base, + config->prop_writeback_dest_y, 0); + drm_object_attach_property(&connector->base, + config->prop_writeback_dest_w, 0); + drm_object_attach_property(&connector->base, + config->prop_writeback_dest_h, 0); + wb_connector->pixel_formats_blob_ptr = blob; return 0; diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 8fe22ab..4c7701e 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -515,6 +515,25 @@ struct drm_connector_state { */ struct drm_writeback_job *writeback_job; + /** @writeback_dest_x: x coord to write plane to on wb buffer + * The written back composition will be translated by this + * amount horizontally on the output buffer. + */ + /** @writeback_dest_y: y coord to write plane to on wb buffer + * The written back composition will be translated by this + * amount vertically on the output buffer. + */ + /** @writeback_dest_w: width of plane to write to wb buffer + * The written back composition will be scaled to match this + * height dimension on the output buffer. Ignored if 0. + */ + /** @writeback_dest_h: height of plane to write to wb buffer + * The written back composition will be scaled to match this + * width dimension on the output buffer. Ignored if 0. + */ + uint32_t writeback_dest_x, writeback_dest_y, + writeback_dest_w, writeback_dest_h; + /** * @max_requested_bpc: Connector property to limit the maximum bit * depth of the pixels. @@ -704,6 +723,10 @@ struct drm_connector_funcs { * cleaned up by calling the @atomic_destroy_state hook in this * structure. * + * State relating to writeback including writeback_job and + * writeback_dest_x,y,w,h is not intended to be reused and so will not + * be duplicated and will instead be reset to NULL/0 respectively. + * * This callback is mandatory for atomic drivers. * * Atomic drivers which don't subclass &struct drm_connector_state should use diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 7f60e8e..40ce4a8 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -622,6 +622,26 @@ struct drm_mode_config { */ struct drm_property *prop_crtc_h; /** + * @prop_writeback_dest_x: Writeback connector property for the crtc + * output destination position in the writeback buffer. + */ + struct drm_property *prop_writeback_dest_x; + /** + * @prop_writeback_dest_y: Writeback connector property for the crtc + * output destination position in the writeback buffer. + */ + struct drm_property *prop_writeback_dest_y; + /** + * @prop_writeback_dest_w: Writeback connector property for the crtc + * output destination position in the writeback buffer. + */ + struct drm_property *prop_writeback_dest_w; + /** + * @prop_writeback_dest_h: Writeback connector property for the crtc + * output destination position in the writeback buffer. + */ + struct drm_property *prop_writeback_dest_h; + /** * @prop_fb_id: Default atomic plane property to specify the * &drm_framebuffer. */ From patchwork Thu May 2 16:10:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Davis X-Patchwork-Id: 10927287 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 59C4F1395 for ; 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Thu, 2 May 2019 16:10:14 +0000 (UTC) Received: from VI1PR0801MB1935.eurprd08.prod.outlook.com (10.173.73.149) by VI1PR0801MB2080.eurprd08.prod.outlook.com (10.173.75.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Thu, 2 May 2019 16:10:10 +0000 Received: from VI1PR0801MB1935.eurprd08.prod.outlook.com ([fe80::ec0c:910f:7b71:aff4]) by VI1PR0801MB1935.eurprd08.prod.outlook.com ([fe80::ec0c:910f:7b71:aff4%7]) with mapi id 15.20.1856.008; Thu, 2 May 2019 16:10:10 +0000 From: Ben Davis To: "dri-devel@lists.freedesktop.org" Subject: [PATCH v4 2/2] drm/malidp: Enable writeback scaling Thread-Topic: [PATCH v4 2/2] drm/malidp: Enable writeback scaling Thread-Index: AQHVAQGEiGsTwEYHR0qJQuS6stmqig== Date: Thu, 2 May 2019 16:10:10 +0000 Message-ID: <1556813386-18823-3-git-send-email-ben.davis@arm.com> References: <1556813386-18823-1-git-send-email-ben.davis@arm.com> In-Reply-To: <1556813386-18823-1-git-send-email-ben.davis@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [217.140.106.53] x-clientproxiedby: LO2P123CA0018.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:a6::30) To VI1PR0801MB1935.eurprd08.prod.outlook.com (2603:10a6:800:89::21) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.7.4 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fc630dbf-5f17-4217-d9a3-08d6cf18a6c6 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=C/s6uF1co3xiBPEVLQTUt91k5XEsaMsRT1B6ZsM4buo=; b=rREnldVRC9A62uk8FnwPqJInizRQD4yYzOj6s3YYByB/8TL3XLUF75JQYjxq8e4bahYi3t6SBJJT0xUWAkj2ZBnqX/rKEh6B5IIgCvFWRZZDrzNYliaV9FlDmQE7lnjvVTIczbkJ0gwDUFXuh3jkrbIgB8xnY83it06CNslVD5w= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Ben.Davis@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "airlied@linux.ie" , Liviu Dudau , "linux-kernel@vger.kernel.org" , "maxime.ripard@bootlin.com" , nd , "sean@poorly.run" , Ben Davis Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The phase setting part of malidp_crtc_atomic_check_scaling is refactored to allow use in writeback scaling. Also the enable_memwrite function prototype is simplified by directly passing mw_state. Signed-off-by: Ben Davis Reviewed-by: Liviu Dudau --- drivers/gpu/drm/arm/malidp_crtc.c | 47 ++++++++------- drivers/gpu/drm/arm/malidp_drv.c | 10 +++- drivers/gpu/drm/arm/malidp_drv.h | 2 + drivers/gpu/drm/arm/malidp_hw.c | 45 ++++++++++----- drivers/gpu/drm/arm/malidp_hw.h | 19 ++++++- drivers/gpu/drm/arm/malidp_mw.c | 117 ++++++++++++++++++++++++++++++-------- drivers/gpu/drm/arm/malidp_regs.h | 1 + 7 files changed, 176 insertions(+), 65 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c index 3f65996..6548859 100644 --- a/drivers/gpu/drm/arm/malidp_crtc.c +++ b/drivers/gpu/drm/arm/malidp_crtc.c @@ -265,6 +265,29 @@ static int malidp_crtc_atomic_check_ctm(struct drm_crtc *crtc, return 0; } +void malidp_set_se_config_phase(struct malidp_se_config *s) +{ +#define SE_N_PHASE 4 +#define SE_SHIFT_N_PHASE 12 + u32 phase; + + /* Calculate initial_phase and delta_phase for horizontal. */ + phase = s->input_w; + s->h_init_phase = ((phase << SE_N_PHASE) / s->output_w + 1) / 2; + + phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); + s->h_delta_phase = phase / s->output_w; + + /* Same for vertical. */ + phase = s->input_h; + s->v_init_phase = ((phase << SE_N_PHASE) / s->output_h + 1) / 2; + + phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); + s->v_delta_phase = phase / s->output_h; +#undef SE_N_PHASE +#undef SE_SHIFT_N_PHASE +} + static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, struct drm_crtc_state *state) { @@ -291,7 +314,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { struct malidp_plane *mp = to_malidp_plane(plane); - u32 phase; if (!(mp->layer->id & scaling)) continue; @@ -319,27 +341,8 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, s->output_w = pstate->crtc_w; s->output_h = pstate->crtc_h; -#define SE_N_PHASE 4 -#define SE_SHIFT_N_PHASE 12 - /* Calculate initial_phase and delta_phase for horizontal. */ - phase = s->input_w; - s->h_init_phase = - ((phase << SE_N_PHASE) / s->output_w + 1) / 2; - - phase = s->input_w; - phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); - s->h_delta_phase = phase / s->output_w; - - /* Same for vertical. */ - phase = s->input_h; - s->v_init_phase = - ((phase << SE_N_PHASE) / s->output_h + 1) / 2; - - phase = s->input_h; - phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); - s->v_delta_phase = phase / s->output_h; -#undef SE_N_PHASE -#undef SE_SHIFT_N_PHASE + + malidp_set_se_config_phase(s); s->plane_src_id = mp->layer->id; } diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index d37ff9d..e2465e9 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -138,7 +138,7 @@ static void malidp_atomic_commit_se_config(struct drm_crtc *crtc, u32 val; /* Set SE_CONTROL */ - if (!s->scale_enable) { + if (!s->scale_enable && !s->wb_scale_enable) { val = malidp_hw_read(hwdev, se_control); val &= ~MALIDP_SE_SCALING_EN; malidp_hw_write(hwdev, val, se_control); @@ -147,12 +147,16 @@ static void malidp_atomic_commit_se_config(struct drm_crtc *crtc, hwdev->hw->se_set_scaling_coeffs(hwdev, s, old_s); val = malidp_hw_read(hwdev, se_control); - val |= MALIDP_SE_SCALING_EN | MALIDP_SE_ALPHA_EN; + val |= MALIDP_SE_SCALING_EN; val &= ~MALIDP_SE_ENH(MALIDP_SE_ENH_MASK); val |= s->enhancer_enable ? MALIDP_SE_ENH(3) : 0; - val |= MALIDP_SE_RGBO_IF_EN; + if (s->scale_enable) + val |= (MALIDP_SE_RGBO_IF_EN | MALIDP_SE_ALPHA_EN); + else + val &= ~((MALIDP_SE_RGBO_IF_EN | MALIDP_SE_ALPHA_EN)); + malidp_hw_write(hwdev, val, se_control); /* Set IN_SIZE & OUT_SIZE. */ diff --git a/drivers/gpu/drm/arm/malidp_drv.h b/drivers/gpu/drm/arm/malidp_drv.h index 391d6ff..924f831 100644 --- a/drivers/gpu/drm/arm/malidp_drv.h +++ b/drivers/gpu/drm/arm/malidp_drv.h @@ -104,6 +104,8 @@ struct malidp_crtc_state { int malidp_de_planes_init(struct drm_device *drm); int malidp_crtc_init(struct drm_device *drm); +void malidp_set_se_config_phase(struct malidp_se_config *s); + bool malidp_hw_format_is_linear_only(u32 format); bool malidp_hw_format_is_afbc_only(u32 format); diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c index 1a36718..6f59c0e 100644 --- a/drivers/gpu/drm/arm/malidp_hw.c +++ b/drivers/gpu/drm/arm/malidp_hw.c @@ -497,13 +497,18 @@ static long malidp500_se_calc_mclk(struct malidp_hw_device *hwdev, return ret; } -static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, - dma_addr_t *addrs, s32 *pitches, - int num_planes, u16 w, u16 h, u32 fmt_id, - const s16 *rgb2yuv_coeffs) +static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, u16 w, u16 h, + struct malidp_mw_connector_state *mw_state) { + + int num_planes = mw_state->n_planes; + dma_addr_t *addrs = mw_state->addrs; + s32 *pitches = mw_state->pitches; + u32 fmt_id = mw_state->format; u32 base = MALIDP500_SE_MEMWRITE_BASE; u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); + const s16 *rgb2yuv_coeffs = !mw_state->rgb2yuv_initialized ? + mw_state->rgb2yuv_coeffs : NULL; /* enable the scaling engine block */ malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); @@ -847,13 +852,18 @@ static long malidp550_se_calc_mclk(struct malidp_hw_device *hwdev, return ret; } -static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, - dma_addr_t *addrs, s32 *pitches, - int num_planes, u16 w, u16 h, u32 fmt_id, - const s16 *rgb2yuv_coeffs) +static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, u16 w, u16 h, + struct malidp_mw_connector_state *mw_state) { + int num_planes = mw_state->n_planes; + bool scaling = mw_state->wb_scale_enable; + dma_addr_t *addrs = mw_state->addrs; + s32 *pitches = mw_state->pitches; + u32 fmt_id = mw_state->format; u32 base = MALIDP550_SE_MEMWRITE_BASE; u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); + const s16 *rgb2yuv_coeffs = !mw_state->rgb2yuv_initialized ? + mw_state->rgb2yuv_coeffs : NULL; /* enable the scaling engine block */ malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); @@ -876,10 +886,18 @@ static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, WARN(1, "Invalid number of planes"); } - malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), - MALIDP550_SE_MEMWRITE_OUT_SIZE); - malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, - MALIDP550_SE_CONTROL); + malidp_hw_clearbits(hwdev, MALIDP_SE_MEMWRITE_EN | MALIDP_SE_MEMWRITE_SCL_EN, + MALIDP550_SE_CONTROL); + + if (scaling) { + malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_SCL_EN, + MALIDP550_SE_CONTROL); + } else { + malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), + MALIDP550_SE_MEMWRITE_OUT_SIZE); + malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, + MALIDP550_SE_CONTROL); + } if (rgb2yuv_coeffs) { int i; @@ -897,7 +915,8 @@ static void malidp550_disable_memwrite(struct malidp_hw_device *hwdev) { u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); - malidp_hw_clearbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, + malidp_hw_clearbits(hwdev, + MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN | MALIDP_SE_MEMWRITE_SCL_EN, MALIDP550_SE_CONTROL); malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC); } diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h index 8352a2e..61ddcb5 100644 --- a/drivers/gpu/drm/arm/malidp_hw.h +++ b/drivers/gpu/drm/arm/malidp_hw.h @@ -85,6 +85,7 @@ enum malidp_scaling_coeff_set { struct malidp_se_config { u8 scale_enable : 1; u8 enhancer_enable : 1; + u8 wb_scale_enable : 1; u8 hcoeff : 3; u8 vcoeff : 3; u8 plane_src_id; @@ -94,6 +95,19 @@ struct malidp_se_config { u32 v_init_phase, v_delta_phase; }; +#define to_mw_state(_state) (struct malidp_mw_connector_state *)(_state) + +struct malidp_mw_connector_state { + struct drm_connector_state base; + dma_addr_t addrs[2]; + s32 pitches[2]; + u8 format; + u8 n_planes; + bool rgb2yuv_initialized; + const s16 *rgb2yuv_coeffs; + bool wb_scale_enable; +}; + /* regmap features */ #define MALIDP_REGMAP_HAS_CLEARIRQ BIT(0) #define MALIDP_DEVICE_AFBC_SUPPORT_SPLIT BIT(1) @@ -206,9 +220,8 @@ struct malidp_hw { * @param h - height of the output frame * @param fmt_id - internal format ID of output buffer */ - int (*enable_memwrite)(struct malidp_hw_device *hwdev, dma_addr_t *addrs, - s32 *pitches, int num_planes, u16 w, u16 h, u32 fmt_id, - const s16 *rgb2yuv_coeffs); + int (*enable_memwrite)(struct malidp_hw_device *hwdev, u16 w, u16 h, + struct malidp_mw_connector_state *mw_state); /* * Disable the writing to memory of the next frame's content. diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c index 2865f7a..f1ad588 100644 --- a/drivers/gpu/drm/arm/malidp_mw.c +++ b/drivers/gpu/drm/arm/malidp_mw.c @@ -13,23 +13,12 @@ #include #include #include +#include