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Mon, 27 Aug 2018 07:34:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AAB46E18C; Mon, 27 Aug 2018 07:34:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0113.outbound.protection.outlook.com [104.47.1.113]) by gabe.freedesktop.org (Postfix) with ESMTPS id EB4C56E653 for ; Fri, 24 Aug 2018 08:55:18 +0000 (UTC) Received: from orc.pedanet (85.226.244.23) by AM5PR0201MB2450.eurprd02.prod.outlook.com (2603:10a6:203:35::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1080.15; Fri, 24 Aug 2018 08:55:16 +0000 From: Peter Rosin To: linux-kernel@vger.kernel.org Subject: [PATCH 1/2] drm/atmel-hlcdc: prefer a higher rate clock as pixel-clock base Date: Fri, 24 Aug 2018 10:55:00 +0200 Message-Id: <20180824085501.9740-2-peda@axentia.se> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824085501.9740-1-peda@axentia.se> References: <20180824085501.9740-1-peda@axentia.se> MIME-Version: 1.0 X-Originating-IP: [85.226.244.23] X-ClientProxiedBy: VI1PR0701CA0070.eurprd07.prod.outlook.com (2603:10a6:800:5f::32) To AM5PR0201MB2450.eurprd02.prod.outlook.com (2603:10a6:203:35::7) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 40eb9bda-5b0b-4864-3e0a-08d6099f502e X-Microsoft-Antispam: BCL:0; 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E.g. requesting a pixel-clock of 65MHz with a sys_clk of 132MHz results in the divider being set to 3 ending up with 44MHz. By preferring the doubled sys_clk as base, the divider instead ends up as 5 yielding a pixel-clock of 52.8Mhz, which is a definite improvement. While at it, clamp the divider so that it does not overflow in case it gets big. Signed-off-by: Peter Rosin --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index c38a479ada98..71c9cd90d2ae 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -101,18 +101,22 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) (adj->crtc_hdisplay - 1) | ((adj->crtc_vdisplay - 1) << 16)); - cfg = 0; + cfg = ATMEL_HLCDC_CLKSEL; - prate = clk_get_rate(crtc->dc->hlcdc->sys_clk); + prate = 2 * clk_get_rate(crtc->dc->hlcdc->sys_clk); mode_rate = adj->crtc_clock * 1000; - if ((prate / 2) < mode_rate) { - prate *= 2; - cfg |= ATMEL_HLCDC_CLKSEL; - } div = DIV_ROUND_UP(prate, mode_rate); if (div < 2) div = 2; + else if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) { + /* the divider ended up too big, try a lower base rate */ + cfg &= ~ATMEL_HLCDC_CLKSEL; + prate /= 2; + div = DIV_ROUND_UP(prate, mode_rate); + if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) + div = ATMEL_HLCDC_CLKDIV_MASK; + } cfg |= ATMEL_HLCDC_CLKDIV(div); From patchwork Fri Aug 24 08:55:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Rosin X-Patchwork-Id: 10576537 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9DBDD174A for ; Mon, 27 Aug 2018 07:37:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 84DA229702 for ; Mon, 27 Aug 2018 07:37:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 782BE29833; Mon, 27 Aug 2018 07:37:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1E8D829702 for ; Mon, 27 Aug 2018 07:37:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 469176E229; Mon, 27 Aug 2018 07:36:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0714.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe1f::714]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFA446E655 for ; Fri, 24 Aug 2018 08:55:24 +0000 (UTC) Received: from orc.pedanet (85.226.244.23) by AM5PR0201MB2450.eurprd02.prod.outlook.com (2603:10a6:203:35::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1080.15; Fri, 24 Aug 2018 08:55:22 +0000 From: Peter Rosin To: linux-kernel@vger.kernel.org Subject: [PATCH 2/2] drm/atmel-hlcdc: allow selecting a higher pixel-clock that requested Date: Fri, 24 Aug 2018 10:55:01 +0200 Message-Id: <20180824085501.9740-3-peda@axentia.se> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824085501.9740-1-peda@axentia.se> References: <20180824085501.9740-1-peda@axentia.se> MIME-Version: 1.0 X-Originating-IP: [85.226.244.23] X-ClientProxiedBy: VI1PR0701CA0070.eurprd07.prod.outlook.com (2603:10a6:800:5f::32) To AM5PR0201MB2450.eurprd02.prod.outlook.com (2603:10a6:203:35::7) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 46304afd-f185-487e-7336-08d6099f53d2 X-Microsoft-Antispam: BCL:0; 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I pulled "10 times" as the discriminator out of the hat, and went with that. This is useful, if e.g. the target pixel-clock is 65MHz and the sys_clk is 132MHz. In this case the highest possible pixel-clock lower than the requested 65MHz is 52.8MHz, which is almost 20% off (and outside the spec for the panel). The lowest possible pixel-clock higher than 65MHz is 66MHz, which is a *much* better match, and only 1.5% off. Signed-off-by: Peter Rosin --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 71c9cd90d2ae..0c2717ed4ac6 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -116,6 +116,19 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) div = DIV_ROUND_UP(prate, mode_rate); if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) div = ATMEL_HLCDC_CLKDIV_MASK; + } else { + int div_low = prate / mode_rate; + + if (div_low >= 2 && + ((prate / div_low - mode_rate) < + 10 * (mode_rate - prate / div))) + /* + * At least 10 times better when + * using a higher frequency than + * requested, instead of a lower. + * So, go with that. + */ + div = div_low; } cfg |= ATMEL_HLCDC_CLKDIV(div);