From patchwork Thu May 9 21:19:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937819 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5FCB915A6 for ; Thu, 9 May 2019 21:19:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 50E0428A68 for ; Thu, 9 May 2019 21:19:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 450BB28AFB; Thu, 9 May 2019 21:19:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E66D428A68 for ; Thu, 9 May 2019 21:19:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727035AbfEIVTf (ORCPT ); Thu, 9 May 2019 17:19:35 -0400 Received: from shell.v3.sk ([90.176.6.54]:45809 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727024AbfEIVTf (ORCPT ); Thu, 9 May 2019 17:19:35 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id E5AF9104029; Thu, 9 May 2019 23:19:32 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id We7yaFsnBu8b; Thu, 9 May 2019 23:19:20 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 90253104024; Thu, 9 May 2019 23:19:19 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 88RNB5lrXCgV; Thu, 9 May 2019 23:19:17 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id C1B53104020; Thu, 9 May 2019 23:19:16 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 1/7] dt-bindings: clock: make marvell,mmp2 a power controller Date: Thu, 9 May 2019 23:19:05 +0200 Message-Id: <20190509211911.17998-2-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is a binding for the MMP2 power management units. As such apart from providing the clocks, they also manage the power domains. Signed-off-by: Lubomir Rintel --- Documentation/devicetree/bindings/clock/marvell,mmp2.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/marvell,mmp2.txt b/Documentation/devicetree/bindings/clock/marvell,mmp2.txt index 23b52dc02266..0387348f7211 100644 --- a/Documentation/devicetree/bindings/clock/marvell,mmp2.txt +++ b/Documentation/devicetree/bindings/clock/marvell,mmp2.txt @@ -13,7 +13,8 @@ Required Properties: "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - #clock-cells: should be 1. -- #reset-cells: should be 1. +- #reset-cells: should be 1 +- #power-domain-cells: should 1 Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. From patchwork Thu May 9 21:19:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937821 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 01CE11390 for ; Thu, 9 May 2019 21:19:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E5FB628A68 for ; Thu, 9 May 2019 21:19:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D9D8628AAC; Thu, 9 May 2019 21:19:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEC3628A94 for ; Thu, 9 May 2019 21:19:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726682AbfEIVTd (ORCPT ); Thu, 9 May 2019 17:19:33 -0400 Received: from shell.v3.sk ([90.176.6.54]:45801 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727024AbfEIVTd (ORCPT ); Thu, 9 May 2019 17:19:33 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 22EA2104036; Thu, 9 May 2019 23:19:31 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id tVSJ4BL4c0AJ; Thu, 9 May 2019 23:19:21 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 53AC310402F; Thu, 9 May 2019 23:19:20 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id Q5kk3_USBzoz; Thu, 9 May 2019 23:19:17 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id 3192E104025; Thu, 9 May 2019 23:19:17 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 2/7] dt-bindings: marvell,mmp2: Add clock ids for the GPU clocks Date: Thu, 9 May 2019 23:19:06 +0200 Message-Id: <20190509211911.17998-3-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The GC860 GPU uses two distinct clocks for the graphics core, and the AXI bus interface, along with respective parent clock multiplexers. Signed-off-by: Lubomir Rintel --- include/dt-bindings/clock/marvell,mmp2.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/marvell,mmp2.h b/include/dt-bindings/clock/marvell,mmp2.h index e785c6eb3561..4b31abd998f1 100644 --- a/include/dt-bindings/clock/marvell,mmp2.h +++ b/include/dt-bindings/clock/marvell,mmp2.h @@ -72,6 +72,10 @@ #define MMP2_CLK_CCIC1_PHY 118 #define MMP2_CLK_CCIC1_SPHY 119 #define MMP2_CLK_DISP0_LCDC 120 +#define MMP2_CLK_GPU_GC_MUX 121 +#define MMP2_CLK_GPU_GC 122 +#define MMP2_CLK_GPU_BUS_MUX 123 +#define MMP2_CLK_GPU_BUS 124 #define MMP2_NR_CLKS 200 #endif From patchwork Thu May 9 21:19:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937823 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 930B815A6 for ; Thu, 9 May 2019 21:19:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 829E028A94 for ; Thu, 9 May 2019 21:19:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7457928A68; Thu, 9 May 2019 21:19:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1DA9728A68 for ; Thu, 9 May 2019 21:19:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727024AbfEIVTg (ORCPT ); Thu, 9 May 2019 17:19:36 -0400 Received: from shell.v3.sk ([90.176.6.54]:45816 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbfEIVTg (ORCPT ); Thu, 9 May 2019 17:19:36 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 6E0BD10402A; Thu, 9 May 2019 23:19:34 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id e6GD6NUekwiZ; Thu, 9 May 2019 23:19:21 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 5F785104020; Thu, 9 May 2019 23:19:21 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 9nKtqCLUeS6g; Thu, 9 May 2019 23:19:18 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id 95918104026; Thu, 9 May 2019 23:19:17 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 3/7] dt-bindings: marvell,mmp2: Add id for the GPU power domain Date: Thu, 9 May 2019 23:19:07 +0200 Message-Id: <20190509211911.17998-4-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The power management unit on MMP2 is able to gate clock for the GC860 GPU, and maybe more peripherals (unknown -- no data sheet). Signed-off-by: Lubomir Rintel --- include/dt-bindings/power/marvell,mmp2.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 include/dt-bindings/power/marvell,mmp2.h diff --git a/include/dt-bindings/power/marvell,mmp2.h b/include/dt-bindings/power/marvell,mmp2.h new file mode 100644 index 000000000000..f773713ef2ad --- /dev/null +++ b/include/dt-bindings/power/marvell,mmp2.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DTS_MARVELL_MMP2_POWER_H +#define __DTS_MARVELL_MMP2_POWER_H + +#define MMP2_POWER_DOMAIN_GPU 0 + +#define MMP2_NR_POWER_DOMAINS 1 + +#endif From patchwork Thu May 9 21:19:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937827 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A619D13AD for ; Thu, 9 May 2019 21:19:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 966A628A68 for ; Thu, 9 May 2019 21:19:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8ACD528AAC; Thu, 9 May 2019 21:19:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 22B4728A68 for ; Thu, 9 May 2019 21:19:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726787AbfEIVTj (ORCPT ); Thu, 9 May 2019 17:19:39 -0400 Received: from shell.v3.sk ([90.176.6.54]:45823 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbfEIVTj (ORCPT ); Thu, 9 May 2019 17:19:39 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 5535657F2F; Thu, 9 May 2019 23:19:36 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id jfaHUI51auJT; Thu, 9 May 2019 23:19:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id F3972104033; Thu, 9 May 2019 23:19:21 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id YwV1a_cSPCh1; Thu, 9 May 2019 23:19:18 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id 0243A104027; Thu, 9 May 2019 23:19:17 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 4/7] clk: mmp2: add GPU clocks Date: Thu, 9 May 2019 23:19:08 +0200 Message-Id: <20190509211911.17998-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The GC860 uses two different clocks for the GPU core and the AXI bus interface, along with respective parent clock multiplexors. Meaning of the relevant APMU_GPU bites were gotten from James Cameron's message and [1] and the OLPC OS kernel source [2]. [1] http://lists.laptop.org/pipermail/devel/2019-April/039053.html [2] http://dev.laptop.org/git/olpc-kernel/commit/arch/arm/mach-mmp/mmp2.c?h=arm-3.0-wip&id=8ce9f6122 Signed-off-by: Lubomir Rintel --- drivers/clk/mmp/clk-of-mmp2.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c index a60a1be937ad..45f94c89cdc1 100644 --- a/drivers/clk/mmp/clk-of-mmp2.c +++ b/drivers/clk/mmp/clk-of-mmp2.c @@ -53,6 +53,7 @@ #define APMU_DISP1 0x110 #define APMU_CCIC0 0x50 #define APMU_CCIC1 0xf4 +#define APMU_GPU 0xcc #define MPMU_UART_PLL 0x14 struct mmp2_clk_unit { @@ -202,6 +203,13 @@ static const char *disp_parent_names[] = {"pll1", "pll1_16", "pll2", "vctcxo"}; static DEFINE_SPINLOCK(ccic0_lock); static DEFINE_SPINLOCK(ccic1_lock); static const char *ccic_parent_names[] = {"pll1_2", "pll1_16", "vctcxo"}; + +static DEFINE_SPINLOCK(gpu_lock); +static const char *gpu_gc_parent_names[] = {"pll1_2", "pll1_3", "pll2_2", "pll2_3", "pll2", "usb_pll"}; +static u32 gpu_gc_parent_table[] = {0x0000, 0x0040, 0x0080, 0x00c0, 0x1000, 0x1040 }; +static const char *gpu_bus_parent_names[] = {"pll1_4", "pll2", "pll2_2", "usb_pll"}; +static u32 gpu_bus_parent_table[] = {0x0000, 0x0020, 0x0030, 0x4020 }; + static struct mmp_clk_mix_config ccic0_mix_config = { .reg_info = DEFINE_MIX_REG_INFO(4, 17, 2, 6, 32), }; @@ -240,6 +248,8 @@ static struct mmp_param_gate_clk apmu_gate_clks[] = { {MMP2_CLK_CCIC1, "ccic1_clk", "ccic1_mix_clk", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x1b, 0x1b, 0x0, 0, &ccic1_lock}, {MMP2_CLK_CCIC1_PHY, "ccic1_phy_clk", "ccic1_mix_clk", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x24, 0x24, 0x0, 0, &ccic1_lock}, {MMP2_CLK_CCIC1_SPHY, "ccic1_sphy_clk", "ccic1_sphy_div", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x300, 0x300, 0x0, 0, &ccic1_lock}, + {MMP2_CLK_GPU_GC, "gpu_gc_clk", "gpu_gc_mux", CLK_SET_RATE_PARENT, APMU_GPU, 0x5, 0x5, 0x0, MMP_CLK_GATE_NEED_DELAY, &gpu_lock}, + {MMP2_CLK_GPU_BUS, "gpu_bus_clk", "gpu_bus_mux", CLK_SET_RATE_PARENT, APMU_GPU, 0xa, 0xa, 0x0, MMP_CLK_GATE_NEED_DELAY, &gpu_lock}, }; static void mmp2_axi_periph_clk_init(struct mmp2_clk_unit *pxa_unit) @@ -270,6 +280,22 @@ static void mmp2_axi_periph_clk_init(struct mmp2_clk_unit *pxa_unit) mmp_register_mux_clks(unit, apmu_mux_clks, pxa_unit->apmu_base, ARRAY_SIZE(apmu_mux_clks)); + clk = clk_register_mux_table(NULL, "gpu_gc_mux", gpu_gc_parent_names, + ARRAY_SIZE(gpu_gc_parent_names), + CLK_SET_RATE_PARENT, + pxa_unit->apmu_base + APMU_GPU, + 0, 0x10c0, 0, + gpu_gc_parent_table, &gpu_lock); + mmp_clk_add(unit, MMP2_CLK_GPU_GC_MUX, clk); + + clk = clk_register_mux_table(NULL, "gpu_bus_mux", gpu_bus_parent_names, + ARRAY_SIZE(gpu_bus_parent_names), + CLK_SET_RATE_PARENT, + pxa_unit->apmu_base + APMU_GPU, + 0, 0x4030, 0, + gpu_bus_parent_table, &gpu_lock); + mmp_clk_add(unit, MMP2_CLK_GPU_BUS_MUX, clk); + mmp_register_div_clks(unit, apmu_div_clks, pxa_unit->apmu_base, ARRAY_SIZE(apmu_div_clks)); From patchwork Thu May 9 21:19:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C0C4D13AD for ; Thu, 9 May 2019 21:19:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B046D28A68 for ; Thu, 9 May 2019 21:19:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A461A28AAC; Thu, 9 May 2019 21:19:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B4F128A68 for ; Thu, 9 May 2019 21:19:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726817AbfEIVTp (ORCPT ); Thu, 9 May 2019 17:19:45 -0400 Received: from shell.v3.sk ([90.176.6.54]:45844 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726806AbfEIVTp (ORCPT ); Thu, 9 May 2019 17:19:45 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 7E614104024; Thu, 9 May 2019 23:19:42 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id iluzY6wj_yDR; Thu, 9 May 2019 23:19:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 53433104026; Thu, 9 May 2019 23:19:23 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id ekLLkc6jHzlj; Thu, 9 May 2019 23:19:19 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id 6330C10402B; Thu, 9 May 2019 23:19:18 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 5/7] clk: mmp2: create a power domain for the GPU core Date: Thu, 9 May 2019 23:19:09 +0200 Message-Id: <20190509211911.17998-6-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The power management unit on MMP2 is able to gate clock for the GC860 GPU. There's some special dance required to initialize the unit after the power has been enabled. If not followed, either the GPU's memory interface or the GPU core doesn't work or the SoC just hangs. Once the power has been applied to the GPU block, it doesn't seem possible to turn it off entirely and initialize again. As the data sheet is missing, neither the details about initialization, nor the reason why it can't be reinitialized are understood. The meaning of most bits in the APMU_GPU register are partially described in [1]. [1] http://lists.laptop.org/pipermail/devel/2019-April/039053.html Signed-off-by: Lubomir Rintel --- arch/arm/mach-mmp/Kconfig | 2 + drivers/clk/mmp/clk-of-mmp2.c | 91 +++++++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+) diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index 94500bed56ab..a0efaefbfc74 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -124,6 +124,8 @@ config MACH_MMP2_DT select PINCTRL_SINGLE select ARCH_HAS_RESET_CONTROLLER select CPU_PJ4 + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF help Include support for Marvell MMP2 based platforms using the device tree. diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c index 45f94c89cdc1..7bbf70b2ccd2 100644 --- a/drivers/clk/mmp/clk-of-mmp2.c +++ b/drivers/clk/mmp/clk-of-mmp2.c @@ -16,8 +16,11 @@ #include #include #include +#include +#include #include +#include #include "clk.h" #include "reset.h" @@ -58,6 +61,8 @@ struct mmp2_clk_unit { struct mmp_clk_unit unit; + struct genpd_onecell_data pd_data; + struct generic_pm_domain gpu_pm_domain; void __iomem *mpmu_base; void __iomem *apmu_base; void __iomem *apbc_base; @@ -325,6 +330,90 @@ static void mmp2_clk_reset_init(struct device_node *np, mmp_clk_reset_register(np, cells, nr_resets); } +static int mmp2_gpu_pm_domain_power_on(struct generic_pm_domain *genpd) +{ + struct mmp2_clk_unit *pxa_unit = container_of(genpd, + struct mmp2_clk_unit, gpu_pm_domain); + struct mmp_clk_unit *unit = &pxa_unit->unit; + void __iomem *reg = pxa_unit->apmu_base + APMU_GPU; + unsigned long flags = 0; + u32 tmp; + int ret; + + spin_lock_irqsave(&gpu_lock, flags); + + /* Power up the module. */ + tmp = readl(reg); + tmp &= ~0x8700; + tmp |= 0x8600; + writel(tmp, reg); + + ret = clk_prepare_enable(unit->clk_table[MMP2_CLK_GPU_GC]); + if (ret) + return ret; + + ret = clk_prepare_enable(unit->clk_table[MMP2_CLK_GPU_BUS]); + if (ret) { + clk_disable_unprepare(unit->clk_table[MMP2_CLK_GPU_GC]); + return ret; + } + + /* Disable isolation now that clocks are running. */ + tmp = readl(reg); + tmp |= 0x100; + writel(tmp, reg); + udelay(1); + + spin_unlock_irqrestore(&gpu_lock, flags); + + return 0; +} + +static int mmp2_gpu_pm_domain_power_off(struct generic_pm_domain *genpd) +{ + struct mmp2_clk_unit *pxa_unit = container_of(genpd, + struct mmp2_clk_unit, gpu_pm_domain); + struct mmp_clk_unit *unit = &pxa_unit->unit; + void __iomem *reg = pxa_unit->apmu_base + APMU_GPU; + unsigned long flags = 0; + u32 tmp; + + spin_lock_irqsave(&gpu_lock, flags); + + /* + * Re-enable isolation. We must not touch the other bits, + * otherwise the * GPU hangs without a known way to recover. + */ + tmp = readl(reg); + tmp &= ~0x100; + writel(tmp, reg); + udelay(1); + + clk_disable_unprepare(unit->clk_table[MMP2_CLK_GPU_BUS]); + clk_disable_unprepare(unit->clk_table[MMP2_CLK_GPU_GC]); + + spin_unlock_irqrestore(&gpu_lock, flags); + + return 0; +} + +static struct generic_pm_domain *mmp2_pm_onecell_domains[MMP2_NR_POWER_DOMAINS]; + +static void mmp2_pm_domain_init(struct device_node *np, + struct mmp2_clk_unit *pxa_unit) +{ + pm_genpd_init(&pxa_unit->gpu_pm_domain, NULL, true); + pxa_unit->gpu_pm_domain.name = "GPU"; + pxa_unit->gpu_pm_domain.power_on = mmp2_gpu_pm_domain_power_on; + pxa_unit->gpu_pm_domain.power_off = mmp2_gpu_pm_domain_power_off; + mmp2_pm_onecell_domains[MMP2_POWER_DOMAIN_GPU] + = &pxa_unit->gpu_pm_domain; + + pxa_unit->pd_data.domains = mmp2_pm_onecell_domains; + pxa_unit->pd_data.num_domains = ARRAY_SIZE(mmp2_pm_onecell_domains); + of_genpd_add_provider_onecell(np, &pxa_unit->pd_data); +} + static void __init mmp2_clk_init(struct device_node *np) { struct mmp2_clk_unit *pxa_unit; @@ -351,6 +440,8 @@ static void __init mmp2_clk_init(struct device_node *np) goto unmap_apmu_region; } + mmp2_pm_domain_init(np, pxa_unit); + mmp_clk_init(np, &pxa_unit->unit, MMP2_NR_CLKS); mmp2_pll_init(pxa_unit); From patchwork Thu May 9 21:19:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 37A881390 for ; Thu, 9 May 2019 21:19:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 278EA28A68 for ; Thu, 9 May 2019 21:19:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1BBCA28AAC; Thu, 9 May 2019 21:19:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CA15D28A68 for ; Thu, 9 May 2019 21:19:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726851AbfEIVTl (ORCPT ); Thu, 9 May 2019 17:19:41 -0400 Received: from shell.v3.sk ([90.176.6.54]:45833 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbfEIVTl (ORCPT ); Thu, 9 May 2019 17:19:41 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 3FDCE104024; Thu, 9 May 2019 23:19:39 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id lHpsRXzgKgYX; Thu, 9 May 2019 23:19:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 0E1AC104025; Thu, 9 May 2019 23:19:23 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id DaRgWoyjJULq; Thu, 9 May 2019 23:19:19 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id C1D0310402C; Thu, 9 May 2019 23:19:18 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 6/7] ARM: dts: mmp2: Add #power-domain-cells to /clocks Date: Thu, 9 May 2019 23:19:10 +0200 Message-Id: <20190509211911.17998-7-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The power management unit, described by the soc_clocks node, controls the power to the peripherals by the means of power domains with a single cell -- the domain number. Signed-off-by: Lubomir Rintel --- arch/arm/boot/dts/mmp2.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index f02fb97f515c..8ad3e6673e1f 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -390,6 +390,7 @@ reg-names = "mpmu", "apmu", "apbc"; #clock-cells = <1>; #reset-cells = <1>; + #power-domain-cells = <1>; }; }; }; From patchwork Thu May 9 21:19:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10937831 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81CB513AD for ; Thu, 9 May 2019 21:19:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72FF228A68 for ; Thu, 9 May 2019 21:19:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 66A2728AAC; Thu, 9 May 2019 21:19:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1AB4828A68 for ; Thu, 9 May 2019 21:19:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726764AbfEIVTm (ORCPT ); Thu, 9 May 2019 17:19:42 -0400 Received: from shell.v3.sk ([90.176.6.54]:45844 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726806AbfEIVTm (ORCPT ); Thu, 9 May 2019 17:19:42 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 763F057F2F; Thu, 9 May 2019 23:19:40 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id FXU6NnfE1peR; Thu, 9 May 2019 23:19:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 0573C10402C; Thu, 9 May 2019 23:19:24 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 9aOyP7FwSBZ1; Thu, 9 May 2019 23:19:20 +0200 (CEST) Received: from furthur.local (g-server-2.ign.cz [91.219.240.2]) by zimbra.v3.sk (Postfix) with ESMTPSA id 37EA857F2F; Thu, 9 May 2019 23:19:19 +0200 (CEST) From: Lubomir Rintel To: linux-pm@vger.kernel.org Cc: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , James Cameron , Michael Turquette , Stephen Boyd , Lubomir Rintel Subject: [PATCH RFC 7/7] ARM: dts: mmp2: Add GPU core Date: Thu, 9 May 2019 23:19:11 +0200 Message-Id: <20190509211911.17998-8-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190509211911.17998-1-lkundrak@v3.sk> References: <20190509211911.17998-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The base address, clock and power domain gotten from the OLPC OS kernel; the data sheet is not available. Signed-off-by: Lubomir Rintel --- arch/arm/boot/dts/mmp2.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index 8ad3e6673e1f..2f1d9fa8064f 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -8,6 +8,7 @@ */ #include +#include / { #address-cells = <1>; @@ -41,6 +42,17 @@ reg = <0xd4200000 0x00200000>; ranges; + gpu: gpu@d420d000 { + compatible = "vivante,gc"; + reg = <0xd420d000 0x4000>; + interrupts = <8>; + status = "disabled"; + clocks = <&soc_clocks MMP2_CLK_GPU_GC>, + <&soc_clocks MMP2_CLK_GPU_BUS>; + clock-names = "core", "bus"; + power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>; + }; + intc: interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller;