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Wed, 15 May 2019 12:28:13 +0000 From: Anson Huang To: "mturquette@baylibre.com" , "sboyd@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "l.stach@pengutronix.de" , Aisheng Dong , "tiny.windzz@gmail.com" , "pp@emlix.com" , "colin.didier@devialet.com" , "robh@kernel.org" , "hofrat@osadl.org" , Jacky Bai , Leonard Crestez , "stefan@agner.ch" , "michael@amarulasolutions.com" , Abel Vesa , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH V2 1/2] clk: imx: Add common API for masking MMDC handshake Thread-Topic: [PATCH V2 1/2] clk: imx: Add common API for masking MMDC handshake Thread-Index: AQHVCxmq80TspEKNo0uWdJG5ctX+bA== Date: Wed, 15 May 2019 12:28:13 +0000 Message-ID: <1557922984-20811-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0P153CA0031.APCP153.PROD.OUTLOOK.COM (2603:1096:203:17::19) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng --- Changes since V1: - add necessary "io.h" head file to avoid build error based on latest linux-next. --- drivers/clk/imx/clk.c | 15 +++++++++++++++ drivers/clk/imx/clk.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c index 1efed86..9cd7097 100644 --- a/drivers/clk/imx/clk.c +++ b/drivers/clk/imx/clk.c @@ -1,13 +1,28 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include #include #include #include #include "clk.h" +#define CCM_CCDR 0x4 +#define CCDR_MMDC_CH0_MASK BIT(17) +#define CCDR_MMDC_CH1_MASK BIT(16) + DEFINE_SPINLOCK(imx_ccm_lock); +void __init imx_mmdc_mask_handshake(void __iomem *ccm_base, + unsigned int chn) +{ + unsigned int reg; + + reg = readl_relaxed(ccm_base + CCM_CCDR); + reg |= chn == 0 ? CCDR_MMDC_CH0_MASK : CCDR_MMDC_CH1_MASK; + writel_relaxed(reg, ccm_base + CCM_CCDR); +} + void __init imx_check_clocks(struct clk *clks[], unsigned int count) { unsigned i; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 8639a8f..6dcdc91 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -10,6 +10,7 @@ extern spinlock_t imx_ccm_lock; void imx_check_clocks(struct clk *clks[], unsigned int count); void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count); void imx_register_uart_clocks(struct clk ** const clks[]); +void imx_mmdc_mask_handshake(void __iomem *ccm_base, unsigned int chn); extern void imx_cscmr1_fixup(u32 *val); From patchwork Wed May 15 12:28:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10944687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1B58A76 for ; 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bh=TUKTTWtdup4kcg1hBTn5GgCNlMToZqlxuuoKC0uuBVk=; b=LIQZSvUGyMttw+e7AywSOcWi40wz/wUhZKXuMGqw/H+re7CIW4+I0QwFCNO8jAjq1w1LPE43G1+KJ86ytI9hPa7mNflxt7/b9nEpYDe2PoYpfc8yZBUHZg8cm6M9netBtXZ3zRBSm/rKATNuZzkX5xstR4TdQjpV1xGJTdMIY3g= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3946.eurprd04.prod.outlook.com (52.134.72.13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1900.16; Wed, 15 May 2019 12:28:20 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::d035:3bd0:a56a:189d]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::d035:3bd0:a56a:189d%2]) with mapi id 15.20.1900.010; Wed, 15 May 2019 12:28:20 +0000 From: Anson Huang To: "mturquette@baylibre.com" , "sboyd@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "l.stach@pengutronix.de" , Aisheng Dong , "tiny.windzz@gmail.com" , "pp@emlix.com" , "colin.didier@devialet.com" , "robh@kernel.org" , "hofrat@osadl.org" , Jacky Bai , Leonard Crestez , "stefan@agner.ch" , "michael@amarulasolutions.com" , Abel Vesa , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH V2 2/2] clk: imx: Use imx_mmdc_mask_handshake() API for masking MMDC channel Thread-Topic: [PATCH V2 2/2] clk: imx: Use imx_mmdc_mask_handshake() API for masking MMDC channel Thread-Index: AQHVCxmupCy7lBV1C029aC5p17PIAg== Date: Wed, 15 May 2019 12:28:19 +0000 Message-ID: <1557922984-20811-2-git-send-email-Anson.Huang@nxp.com> References: <1557922984-20811-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1557922984-20811-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0P153CA0031.APCP153.PROD.OUTLOOK.COM (2603:1096:203:17::19) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3946; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Yx3VXDHEMZ7gHl/mBCf+77MNXxpvpCxQFH5bvDu50lFFSK4fuPk4gsRHNPJUGdPkrwqzubeBH2Rg+M7WG5Goj2lIbRINwBPqHGooWMtzzHBb9/iT1Y2tHTraya2Q7U+hy2FqEeX3130LKIcMTKmpc3sqCDdtEKMsq3uhbvp/wIHGQ3ToMWcsTlq5hW5ylUsu1RKZS3NWXBSAv2SVzi8xN+mYzYtX6editvH69fIIoFgMLjE3Bvs/c2iE8XEF3dvz37rc+UJvQID3rTdTsWYq6nHaZYAPHLTEK/hARaW+olblI9jfTa+pgn3/yB5zBfh+NdbNdkbMnHV7gYiWA0PbHQss9QeJWzsDS0PY4xxIW0eUQricfSjVOpKZ8LvqGIltf5nDko0p0p19UY5UaHffq8YDg07zk+VMeeh7c1R4mEE= Content-ID: <51EF862EDC503D40B06F3F92E712B7C5@eurprd04.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: da266132-ffc7-4753-38ee-08d6d930d064 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2019 12:28:20.0102 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3946 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190515_052827_705688_240F6E86 X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Use imx_mmdc_mask_handshake() API instead of programming CCM register directly in each platform to mask unused MMDC channel's handshake. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng --- No changes. --- drivers/clk/imx/clk-imx6q.c | 13 +------------ drivers/clk/imx/clk-imx6sl.c | 5 +---- drivers/clk/imx/clk-imx6sll.c | 3 +-- drivers/clk/imx/clk-imx6sx.c | 5 +---- drivers/clk/imx/clk-imx6ul.c | 5 +---- 5 files changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 708e7c5..077276b 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -260,25 +260,14 @@ static bool pll6_bypassed(struct device_node *node) return false; } -#define CCM_CCDR 0x04 #define CCM_CCSR 0x0c #define CCM_CS2CDR 0x2c -#define CCDR_MMDC_CH1_MASK BIT(16) #define CCSR_PLL3_SW_CLK_SEL BIT(0) #define CS2CDR_LDB_DI0_CLK_SEL_SHIFT 9 #define CS2CDR_LDB_DI1_CLK_SEL_SHIFT 12 -static void __init imx6q_mmdc_ch1_mask_handshake(void __iomem *ccm_base) -{ - unsigned int reg; - - reg = readl_relaxed(ccm_base + CCM_CCDR); - reg |= CCDR_MMDC_CH1_MASK; - writel_relaxed(reg, ccm_base + CCM_CCDR); -} - /* * The only way to disable the MMDC_CH1 clock is to move it to pll3_sw_clk * via periph2_clk2_sel and then to disable pll3_sw_clk by selecting the @@ -651,7 +640,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) disable_anatop_clocks(anatop_base); - imx6q_mmdc_ch1_mask_handshake(base); + imx_mmdc_mask_handshake(base, 1); if (clk_on_imx6qp()) { clk[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index e13d881..acb5983 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -17,8 +17,6 @@ #include "clk.h" -#define CCDR 0x4 -#define BM_CCM_CCDR_MMDC_CH0_MASK (1 << 17) #define CCSR 0xc #define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2) #define CACRR 0x10 @@ -414,8 +412,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) clks[IMX6SL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8); /* Ensure the MMDC CH0 handshake is bypassed */ - writel_relaxed(readl_relaxed(base + CCDR) | - BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR); + imx_mmdc_mask_handshake(base, 0); imx_check_clocks(clks, ARRAY_SIZE(clks)); diff --git a/drivers/clk/imx/clk-imx6sll.c b/drivers/clk/imx/clk-imx6sll.c index 7eea448..3aa71c9 100644 --- a/drivers/clk/imx/clk-imx6sll.c +++ b/drivers/clk/imx/clk-imx6sll.c @@ -16,7 +16,6 @@ #include "clk.h" #define CCM_ANALOG_PLL_BYPASS (0x1 << 16) -#define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16) #define xPLL_CLR(offset) (offset + 0x8) static const char *pll_bypass_src_sels[] = { "osc", "dummy", }; @@ -340,7 +339,7 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node) clks[IMX6SLL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6); /* mask handshake of mmdc */ - writel_relaxed(BM_CCM_CCDR_MMDC_CH0_MASK, base + 0x4); + imx_mmdc_mask_handshake(base, 0); imx_check_clocks(clks, ARRAY_SIZE(clks)); diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c index 91558b0..24f7b4d 100644 --- a/drivers/clk/imx/clk-imx6sx.c +++ b/drivers/clk/imx/clk-imx6sx.c @@ -22,9 +22,6 @@ #include "clk.h" -#define CCDR 0x4 -#define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16) - static const char *step_sels[] = { "osc", "pll2_pfd2_396m", }; static const char *pll1_sw_sels[] = { "pll1_sys", "step", }; static const char *periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", }; @@ -488,7 +485,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clks[IMX6SX_CLK_CKO2] = imx_clk_gate("cko2", "cko2_podf", base + 0x60, 24); /* mask handshake of mmdc */ - writel_relaxed(BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR); + imx_mmdc_mask_handshake(base, 0); imx_check_clocks(clks, ARRAY_SIZE(clks)); diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c index fd60d15..4bf3226 100644 --- a/drivers/clk/imx/clk-imx6ul.c +++ b/drivers/clk/imx/clk-imx6ul.c @@ -22,9 +22,6 @@ #include "clk.h" -#define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16) -#define CCDR 0x4 - static const char *pll_bypass_src_sels[] = { "osc", "dummy", }; static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", }; @@ -464,7 +461,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) clks[IMX6UL_CLK_CKO2] = imx_clk_gate("cko2", "cko2_podf", base + 0x60, 24); /* mask handshake of mmdc */ - writel_relaxed(BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR); + imx_mmdc_mask_handshake(base, 0); imx_check_clocks(clks, ARRAY_SIZE(clks));