From patchwork Mon May 20 15:42:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 10951711 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3EA21395 for ; Mon, 20 May 2019 15:42:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2F362882C for ; Mon, 20 May 2019 15:42:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A780A288BD; Mon, 20 May 2019 15:42:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2CE582882C for ; Mon, 20 May 2019 15:42:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392315AbfETPmi (ORCPT ); Mon, 20 May 2019 11:42:38 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:32808 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387938AbfETPmh (ORCPT ); Mon, 20 May 2019 11:42:37 -0400 Received: by mail-wr1-f66.google.com with SMTP id d9so2202628wrx.0; Mon, 20 May 2019 08:42:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=H5MO9N2QjJdT8ukTWS53zrDPxdDd+G48hqRWtJcAIQQ=; b=oI/iQSVPrQ+Sp9Y8m3hsxgcmBer2VC/LvG5zxrDTf1+BPd2t98wCKm1IVOgGIIvbLc FTIg/mLjzvXpK53XtT8AOdAkwHnoBOOL96vpBQbTuhsgMOcyhUm8MvQKY4r8gYUHB0Qi lpZWKxCQuyvhnt+kXShX+ssc/kEcJerph0ZV5F936MsT5PT9809A0dZaN1oQbFNMIRms tfHqGBPU4TQt7BYdaAb5bBRf8MBT+osmQMQdJUfaeAX9dUp0MGtiwg6WxjGYoUMvu63O xOTXgOp/b1nXousme6XnYXcI57ujNLAMIOrzQ9mo0AJoW2dO3QLu74XleFZf0VamBQqk qk5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=H5MO9N2QjJdT8ukTWS53zrDPxdDd+G48hqRWtJcAIQQ=; b=M7ImZPko2m9z8ViqkAOOFseY2sRzRyQuTenWr43X+v4xtQRfw3O0OXOD4qzGeLkBjT Pf3BWBwxQgvqIwYpT0flpkFFhCzJvJngfcB1syPt6Z0ioB+AXL8JyJhp4/tHN+vvF2+J YiYdp9XZ59iyjzZ/ZyHzSe6eRCWY7cxwUrN0OGKfLEfBNDOF5cGoMDpAg4rwCqwKD5gE g0gBoqu1gZc1CJGPn5OdS9jsGRkapLuSf74Hno0FCj67qqgxQDTkaSAIOvzRbQt5SoVm 6dUKn0abaJFbBuGpRnIcUAM+3KwHuj8lXYZMVwVZliFGaUnniMe4jFgROPTgU6+wYeOn QmDA== X-Gm-Message-State: APjAAAVhYZ1Bv9i9QOLt3NM+gx2eWWwfGP/LlUYyH07OG0lstLTeUuKQ UmOrjPA7weGzNxSvzPH/z/jGNIWI X-Google-Smtp-Source: APXvYqxdPNQWri+QCSMzeYqq2F6LeQwPGGFYdo6plbfsyVv1el1zqfA1jSB1zq3XBVyd2AMOQcnnag== X-Received: by 2002:adf:e408:: with SMTP id g8mr14154034wrm.143.1558366954741; Mon, 20 May 2019 08:42:34 -0700 (PDT) Received: from 640k.lan ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id v11sm15851995wrq.80.2019.05.20.08.42.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 May 2019 08:42:33 -0700 (PDT) From: Paolo Bonzini To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Sean Christopherson Subject: [PATCH 1/2] KVM: x86/pmu: mask the result of rdpmc according to the width of the counters Date: Mon, 20 May 2019 17:42:30 +0200 Message-Id: <1558366951-19259-2-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558366951-19259-1-git-send-email-pbonzini@redhat.com> References: <1558366951-19259-1-git-send-email-pbonzini@redhat.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch will simplify the changes in the next, by enforcing the masking of the counters to RDPMC and RDMSR. Signed-off-by: Paolo Bonzini --- arch/x86/kvm/pmu.c | 10 +++------- arch/x86/kvm/pmu.h | 3 ++- arch/x86/kvm/pmu_amd.c | 2 +- arch/x86/kvm/vmx/pmu_intel.c | 13 +++++++++---- 4 files changed, 15 insertions(+), 13 deletions(-) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index e39741997893..dd745b58ffd8 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -283,7 +283,7 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data) bool fast_mode = idx & (1u << 31); struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); struct kvm_pmc *pmc; - u64 ctr_val; + u64 mask = fast_mode ? ~0u : ~0ull; if (!pmu->version) return 1; @@ -291,15 +291,11 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data) if (is_vmware_backdoor_pmc(idx)) return kvm_pmu_rdpmc_vmware(vcpu, idx, data); - pmc = kvm_x86_ops->pmu_ops->msr_idx_to_pmc(vcpu, idx); + pmc = kvm_x86_ops->pmu_ops->msr_idx_to_pmc(vcpu, idx, &mask); if (!pmc) return 1; - ctr_val = pmc_read_counter(pmc); - if (fast_mode) - ctr_val = (u32)ctr_val; - - *data = ctr_val; + *data = pmc_read_counter(pmc) & mask; return 0; } diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index ba8898e1a854..22dff661145a 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -25,7 +25,8 @@ struct kvm_pmu_ops { unsigned (*find_fixed_event)(int idx); bool (*pmc_is_enabled)(struct kvm_pmc *pmc); struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx); - struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx); + struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx, + u64 *mask); int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx); bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr); int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data); diff --git a/arch/x86/kvm/pmu_amd.c b/arch/x86/kvm/pmu_amd.c index 1495a735b38e..41dff881e0f0 100644 --- a/arch/x86/kvm/pmu_amd.c +++ b/arch/x86/kvm/pmu_amd.c @@ -186,7 +186,7 @@ static int amd_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx) } /* idx is the ECX register of RDPMC instruction */ -static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, unsigned idx) +static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *mask) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); struct kvm_pmc *counters; diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index f8502c376b37..b6f5157445fe 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -126,7 +126,7 @@ static int intel_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx) } static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu, - unsigned idx) + unsigned idx, u64 *mask) { struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); bool fixed = idx & (1u << 30); @@ -138,6 +138,7 @@ static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu, if (fixed && idx >= pmu->nr_arch_fixed_counters) return NULL; counters = fixed ? pmu->fixed_counters : pmu->gp_counters; + *mask &= pmu->counter_bitmask[fixed ? KVM_PMC_FIXED : KVM_PMC_GP]; return &counters[idx]; } @@ -183,9 +184,13 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data) *data = pmu->global_ovf_ctrl; return 0; default: - if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || - (pmc = get_fixed_pmc(pmu, msr))) { - *data = pmc_read_counter(pmc); + if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { + u64 val = pmc_read_counter(pmc); + *data = val & pmu->counter_bitmask[KVM_PMC_GP]; + return 0; + } else if ((pmc = get_fixed_pmc(pmu, msr))) { + u64 val = pmc_read_counter(pmc); + *data = val & pmu->counter_bitmask[KVM_PMC_FIXED]; return 0; } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { *data = pmc->eventsel; From patchwork Mon May 20 15:42:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 10951713 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B778B1395 for ; Mon, 20 May 2019 15:42:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A61952882C for ; Mon, 20 May 2019 15:42:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A48E288BD; Mon, 20 May 2019 15:42:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A9BB2882C for ; Mon, 20 May 2019 15:42:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392327AbfETPmo (ORCPT ); Mon, 20 May 2019 11:42:44 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:36136 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732399AbfETPmi (ORCPT ); Mon, 20 May 2019 11:42:38 -0400 Received: by mail-wr1-f67.google.com with SMTP id s17so15186190wru.3; Mon, 20 May 2019 08:42:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=pTMTqWY8E4+UnCZ9AjMEiomm00MjjGjXsokoRCkoYLc=; b=DRl+KqdIokWtcnwsE6se0zRs1ML6Kgm5bl5siV1nJDAo4iSmjRnWsw0M798AjhjBF3 ew4/B/7NlF3XRd8e0/QekmlLtPWw5uoRKUKLuubsrSH6GpaUcg+og9IqBjsqVWjLerZ9 ASrOFalwLhiL/xx7tppP5YrCN5ob3vLKQUKynHSCEPcZSghHuYvgPZLP6u/VKIh5KO2z Hb1AUo1BFbB+4jCjVqnJE7UTQD6RKoB81ZXyEVpV/kjwjO9tpvd+R1Ob50jWsXEAW/ia JlbVfWAMOSB+17SuHnnlTbLOzDl1RPLMzHH5UQEGxIQmVKe9rscdfomvyFZQlX/6K4HN 1Byg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=pTMTqWY8E4+UnCZ9AjMEiomm00MjjGjXsokoRCkoYLc=; b=hviR3VTPFZETcBTQyAEyKEMkKEl06dxAhjjbNKoLYCQtgHPuxrmmEnIChMs3QHYneT X/dE5W2PFG/NwqkO7oif4D0LjPEr2IacX2AIZPXzByiX84t4CK5Qa5xnwBuyCtdLCAB5 ntuCz2XPEsL/miEsZ56FvFVQ+pnvYU6s4ZcNfV9tq415vdiiCZbxycBL0352hdeoatUl vM7swRbM8nIj76MZXvUgEFeTWwZ1Wk6fpyJaLNFo9gWd+ghv2FLQdxJaBKVBvpFmP7O4 tqCwyJfKOW5RcixNtFH4OjQfW78YxmG6y/hd3xm4arO4GLgv8lH1NapMP46u7D62jur1 6tTw== X-Gm-Message-State: APjAAAUzfg/GXv36QFgWn1L4QVGGYt/hfXMgNA3DSUCYVPBrQaV9uvBI IixlUwpwZybyMlUyWDuWyMg7e3Im X-Google-Smtp-Source: APXvYqx/JY1VdrUlB1N4GQpIfYrei6E013ax5TCwwP3gyNNdvMlBuS3CQRLeTY+cgMRCa9akd05eSw== X-Received: by 2002:a05:6000:41:: with SMTP id k1mr14631085wrx.332.1558366955908; Mon, 20 May 2019 08:42:35 -0700 (PDT) Received: from 640k.lan ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id v11sm15851995wrq.80.2019.05.20.08.42.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 May 2019 08:42:35 -0700 (PDT) From: Paolo Bonzini To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Sean Christopherson Subject: [PATCH 2/2] KVM: x86/pmu: do not mask the value that is written to fixed PMUs Date: Mon, 20 May 2019 17:42:31 +0200 Message-Id: <1558366951-19259-3-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1558366951-19259-1-git-send-email-pbonzini@redhat.com> References: <1558366951-19259-1-git-send-email-pbonzini@redhat.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to the SDM, for MSR_IA32_PERFCTR0/1 "the lower-order 32 bits of each MSR may be written with any value, and the high-order 8 bits are sign-extended according to the value of bit 31", but the fixed counters in real hardware appear to be limited to the width of the fixed counters. Fix KVM to do the same. Reported-by: Nadav Amit Signed-off-by: Paolo Bonzini --- arch/x86/kvm/vmx/pmu_intel.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index b6f5157445fe..a99613a060dd 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -240,11 +240,14 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) } break; default: - if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || - (pmc = get_fixed_pmc(pmu, msr))) { - if (!msr_info->host_initiated) - data = (s64)(s32)data; - pmc->counter += data - pmc_read_counter(pmc); + if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { + if (msr_info->host_initiated) + pmc->counter = data; + else + pmc->counter = (s32)data; + return 0; + } else if ((pmc = get_fixed_pmc(pmu, msr))) { + pmc->counter = data; return 0; } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { if (data == pmc->eventsel)