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Tue, 21 May 2019 07:14:47 -0700 Received: from saturn.analog.com (10.50.1.244) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Tue, 21 May 2019 10:14:46 -0400 From: Alexandru Ardelean To: CC: Alexandru Ardelean Subject: [PATCH 1/3][V2] include: fpga: adi-axi-common.h: add common regs & defs header Date: Tue, 21 May 2019 17:14:23 +0300 Message-ID: <20190521141425.26176-1-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(396003)(346002)(136003)(39860400002)(2980300002)(199004)(189003)(50226002)(1076003)(316002)(16586007)(6306002)(2906002)(5660300002)(70586007)(70206006)(356004)(6666004)(126002)(2616005)(476003)(305945005)(47776003)(7636002)(426003)(86362001)(336012)(966005)(486006)(478600001)(51416003)(4326008)(44832011)(7696005)(6916009)(53416004)(36756003)(186003)(77096007)(26005)(50466002)(246002)(2351001)(8936002)(48376002)(107886003)(106002)(8676002);DIR:OUT;SFP:1101;SCL:1;SRVR:BLUPR03MB550;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;A:1;MX:1; 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To reduce duplication for this, a common header is added to define these registers as well as bitfields & macros to work with these registers. Signed-off-by: Alexandru Ardelean --- include/linux/fpga/adi-axi-common.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/linux/fpga/adi-axi-common.h diff --git a/include/linux/fpga/adi-axi-common.h b/include/linux/fpga/adi-axi-common.h new file mode 100644 index 000000000000..7966c89561b1 --- /dev/null +++ b/include/linux/fpga/adi-axi-common.h @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices AXI common registers & definitions + * + * Copyright 2019 Analog Devices Inc. + * + * https://wiki.analog.com/resources/fpga/docs/axi_ip + * https://wiki.analog.com/resources/fpga/docs/hdl/regmap + */ + +#ifndef ADI_AXI_COMMON_H_ +#define ADI_AXI_COMMON_H_ + +#define ADI_AXI_REG_VERSION 0x0000 + +#define ADI_AXI_PCORE_VER(major, minor, patch) \ + (((major) << 16) | ((minor) << 8) | (patch)) + +#endif /* ADI_AXI_COMMON_H_ */ From patchwork Tue May 21 14:14:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 10953895 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 428B614B6 for ; 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Tue, 21 May 2019 10:14:48 -0400 From: Alexandru Ardelean To: CC: Lars-Peter Clausen , Alexandru Ardelean Subject: [PATCH 2/3][V2] dmaengine: axi-dmac: Discover length alignment requirement Date: Tue, 21 May 2019 17:14:24 +0300 Message-ID: <20190521141425.26176-2-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521141425.26176-1-alexandru.ardelean@analog.com> References: <20190521141425.26176-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(346002)(396003)(39860400002)(376002)(2980300002)(199004)(189003)(43544003)(316002)(8676002)(8936002)(16586007)(246002)(2906002)(86362001)(36756003)(48376002)(50466002)(478600001)(2351001)(50226002)(53416004)(486006)(51416003)(7696005)(2616005)(476003)(47776003)(446003)(70206006)(76176011)(11346002)(426003)(305945005)(7636002)(336012)(70586007)(126002)(14444005)(44832011)(6916009)(26005)(186003)(4326008)(54906003)(1076003)(356004)(6666004)(5660300002)(106002)(77096007)(107886003);DIR:OUT;SFP:1101;SCL:1;SRVR:BN6PR03MB3123;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;A:1;MX:1; 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The LSBs that are required to be set for alignment will always read back as set from the transfer length register. It is not possible to clear them by writing a 0. This means the driver can discover the length alignment requirement by writing 0 to that register and reading back the value. Since the DMA will support length alignment requirements that are different from the address alignment requirement track both of them independently. For older versions of the peripheral assume that the length alignment requirement is equal to the address alignment requirement. Signed-off-by: Lars-Peter Clausen Signed-off-by: Alexandru Ardelean --- drivers/dma/dma-axi-dmac.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c index 0984ae6eb155..196e6c429182 100644 --- a/drivers/dma/dma-axi-dmac.c +++ b/drivers/dma/dma-axi-dmac.c @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -110,7 +111,8 @@ struct axi_dmac_chan { unsigned int dest_type; unsigned int max_length; - unsigned int align_mask; + unsigned int address_align_mask; + unsigned int length_align_mask; bool hw_cyclic; bool hw_2d; @@ -169,14 +171,14 @@ static bool axi_dmac_check_len(struct axi_dmac_chan *chan, unsigned int len) { if (len == 0) return false; - if ((len & chan->align_mask) != 0) /* Not aligned */ + if ((len & chan->length_align_mask) != 0) /* Not aligned */ return false; return true; } static bool axi_dmac_check_addr(struct axi_dmac_chan *chan, dma_addr_t addr) { - if ((addr & chan->align_mask) != 0) /* Not aligned */ + if ((addr & chan->address_align_mask) != 0) /* Not aligned */ return false; return true; } @@ -394,7 +396,7 @@ static struct axi_dmac_sg *axi_dmac_fill_linear_sg(struct axi_dmac_chan *chan, num_segments = DIV_ROUND_UP(period_len, chan->max_length); segment_size = DIV_ROUND_UP(period_len, num_segments); /* Take care of alignment */ - segment_size = ((segment_size - 1) | chan->align_mask) + 1; + segment_size = ((segment_size - 1) | chan->length_align_mask) + 1; for (i = 0; i < num_periods; i++) { len = period_len; @@ -623,7 +625,7 @@ static int axi_dmac_parse_chan_dt(struct device_node *of_chan, return ret; chan->dest_width = val / 8; - chan->align_mask = max(chan->dest_width, chan->src_width) - 1; + chan->address_align_mask = max(chan->dest_width, chan->src_width) - 1; if (axi_dmac_dest_is_mem(chan) && axi_dmac_src_is_mem(chan)) chan->direction = DMA_MEM_TO_MEM; @@ -640,6 +642,9 @@ static int axi_dmac_parse_chan_dt(struct device_node *of_chan, static int axi_dmac_detect_caps(struct axi_dmac *dmac) { struct axi_dmac_chan *chan = &dmac->chan; + unsigned int version; + + version = axi_dmac_read(dmac, ADI_AXI_REG_VERSION); axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, AXI_DMAC_FLAG_CYCLIC); if (axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS) == AXI_DMAC_FLAG_CYCLIC) @@ -670,6 +675,13 @@ static int axi_dmac_detect_caps(struct axi_dmac *dmac) return -ENODEV; } + if (version >= ADI_AXI_PCORE_VER(4, 1, 'a')) { + axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, 0x00); + chan->length_align_mask = axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH); + } else { + chan->length_align_mask = chan->address_align_mask; + } + return 0; } From patchwork Tue May 21 14:14:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 10953891 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5BB51112C for ; Tue, 21 May 2019 14:14:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA15628A30 for ; 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vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=analog.com; Received-SPF: Pass (protection.outlook.com: domain of analog.com designates 137.71.25.55 as permitted sender) receiver=protection.outlook.com; client-ip=137.71.25.55; helo=nwd2mta1.analog.com; Received: from nwd2mta1.analog.com (137.71.25.55) by CY1NAM02FT058.mail.protection.outlook.com (10.152.74.149) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.1900.16 via Frontend Transport; Tue, 21 May 2019 14:14:53 +0000 Received: from NWD2HUBCAS7.ad.analog.com (nwd2hubcas7.ad.analog.com [10.64.69.107]) by nwd2mta1.analog.com (8.13.8/8.13.8) with ESMTP id x4LEErpO032419 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK) for ; Tue, 21 May 2019 07:14:53 -0700 Received: from saturn.analog.com (10.50.1.244) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Tue, 21 May 2019 10:14:51 -0400 From: Alexandru Ardelean To: CC: Alexandru Ardelean Subject: [PATCH 3/3][V2] dmaengine: axi-dmac: assign `copy_align` property Date: Tue, 21 May 2019 17:14:25 +0300 Message-ID: <20190521141425.26176-3-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521141425.26176-1-alexandru.ardelean@analog.com> References: <20190521141425.26176-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(396003)(376002)(39860400002)(346002)(2980300002)(199004)(189003)(316002)(486006)(107886003)(2616005)(2351001)(11346002)(8676002)(126002)(44832011)(86362001)(50226002)(2906002)(36756003)(305945005)(6916009)(7636002)(1076003)(426003)(356004)(6666004)(478600001)(51416003)(7696005)(76176011)(50466002)(48376002)(53416004)(47776003)(186003)(77096007)(26005)(70206006)(70586007)(106002)(4326008)(476003)(446003)(246002)(16586007)(336012)(5660300002)(4744005)(8936002)(81973001);DIR:OUT;SFP:1101;SCL:1;SRVR:BN3PR03MB2258;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;A:1;MX:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 15807ffa-79ea-45f9-970f-08d6ddf6b225 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4709054)(2017052603328);SRVR:BN3PR03MB2258; X-MS-TrafficTypeDiagnostic: BN3PR03MB2258: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-Forefront-PRVS: 0044C17179 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: A5OeSkyHIuUc904olr3Qq6FDL83ZEB4xoiNjCJAwgb55z88VoDha+M/vhCWprthPyRFW81227XYk5o7WNa3jC1W8OTDdwddMDc6gn70PKugU5FudGRgnqrqcoNYvrB/QeMmll7tmZg9o2XvlYoOFg5hpx9PKp09wLL46HlNxFJKQHK+0qBIlGlZm3dVFRonbRYHPnCdBfDUxFrLEQRWQXGCBt5jhliLTybbTYqmbhZh5cvZCVGRqXJ6PPbYpw92bbKFO4b1GSzFIKzHV5A7biLW2ogvwndXvqQRpV5VT8a7n7HBbh99xa8INGaY3AzZz9/7EDaQVWJCVOL8A9UpYfWkt6ZEZkqy4oriNqE0/+EDJsnTLLrji7razhYuFqORUWrQF4N5aRRKjWu0g85LGrXqFuADbSWuJtn11fM6MFbM= X-OriginatorOrg: analog.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2019 14:14:53.7142 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15807ffa-79ea-45f9-970f-08d6ddf6b225 X-MS-Exchange-CrossTenant-Id: eaa689b4-8f87-40e0-9c6f-7228de4d754a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=eaa689b4-8f87-40e0-9c6f-7228de4d754a;Ip=[137.71.25.55];Helo=[nwd2mta1.analog.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR03MB2258 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The `copy_align` property is a generic property that describes alignment for DMA memcpy & sg ops. It serves mostly an informational purpose, and can be used in DMA tests, to pass the info to know what alignment to expect. Signed-off-by: Alexandru Ardelean --- drivers/dma/dma-axi-dmac.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c index 196e6c429182..88f9986e0e14 100644 --- a/drivers/dma/dma-axi-dmac.c +++ b/drivers/dma/dma-axi-dmac.c @@ -762,6 +762,8 @@ static int axi_dmac_probe(struct platform_device *pdev) if (ret) goto err_clk_disable; + dma_dev->copy_align = (dmac->chan.address_align_mask + 1); + axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x00); ret = dma_async_device_register(dma_dev);