From patchwork Sat May 25 18:13:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 10961025 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0992A933 for ; Sat, 25 May 2019 18:13:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F0D0628A86 for ; Sat, 25 May 2019 18:13:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E4C5428A93; Sat, 25 May 2019 18:13:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C65FD28A86 for ; Sat, 25 May 2019 18:13:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727515AbfEYSNg (ORCPT ); Sat, 25 May 2019 14:13:36 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:42144 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727126AbfEYSNf (ORCPT ); Sat, 25 May 2019 14:13:35 -0400 Received: by mail-pf1-f194.google.com with SMTP id r22so4328229pfh.9; Sat, 25 May 2019 11:13:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TBYBYBJRinIndW3feN0QlKthGu6jDN89/Qjy9roHMcw=; b=A339eY7bCLexXVnkZlLZ3sfWCRU1QfuGi15dk096SzbcHhwN8lZ2q6E+Ls6OL1ahQf rb63D6hu0xJ28ZSsPYdSSUOL9YmXcWBYXOtWsxPP0oblkXxE6RZvonLgzktL/yKAcTAk fdBHV17OE3TzfFHoN6iIsFVGgqwkQaWuEcsskfXWvv5QRLhW0GDT1xZnmLP5Oahmm2HC L6Skt8Hht3plboZ/bTiiohraK06/Nyl/3mftlz8tS7TMNoa/iPr5HsACykwHGhSJdklf xTreCX/S+Axo2hKgUPu6yCWRYwKSgHxeWdZCkwW+rAaj+f9Ti1MSQxW9LzD/p4XB2IzE wUpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TBYBYBJRinIndW3feN0QlKthGu6jDN89/Qjy9roHMcw=; b=UKVB3199CdoqAmBWQWGfj6v9dunDluSIm2RmWzQXQ8p7TW4HMch9EC/ZlB/lXb7fWy 6A2TpweIYA/V7xY4P+w551alJDZTCWnV6dNOmEAba+mVNnccB18RR+XzTMIaikFG9Mqm N1X+e7BLocrHljEqlvGM9Y9TD1SQVLcWo/bZmILHAlWEdZFCpRfGCqHQ3H1bD6ncJJOa 4fw+A53IvKe4RnI2XozK1sunnkB8g64fkn5Xs+QxTi14kz78qcZnM7Yk7WybR8yzQmpD pdN8mdk5ijfthfSkF36Z1V0k5wszlrS+mtQRXvlAhYYtcq88E1nN7ICFZp3q3dhLxjs+ BWCw== X-Gm-Message-State: APjAAAV2vy1yuMjHTyumF/X2BAbtRQBCjhBh2hgk8hzNldALuZs4bYoo YFEbtkj2V2R3lpy39k1aGixuNDjyQRY= X-Google-Smtp-Source: APXvYqzyKRxMRw4Kd/k40QbALYxN90+IJ9eDcxW0V6aCteRflB6pLw5VyJPwXXEoCDoKbW+4Npdz7w== X-Received: by 2002:a63:c64a:: with SMTP id x10mr112244740pgg.195.1558808014553; Sat, 25 May 2019 11:13:34 -0700 (PDT) Received: from localhost (68.168.130.77.16clouds.com. [68.168.130.77]) by smtp.gmail.com with ESMTPSA id n127sm5707044pga.57.2019.05.25.11.13.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 25 May 2019 11:13:34 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, davem@davemloft.net, mchehab+samsung@kernel.org, gregkh@linuxfoundation.org, linus.walleij@linaro.org, nicolas.ferre@microchip.com, paulmck@linux.ibm.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yangtao Li Subject: [PATCH v3 1/3] thermal: sun8i: add thermal driver for h6 Date: Sat, 25 May 2019 14:13:27 -0400 Message-Id: <20190525181329.18657-2-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20190525181329.18657-1-tiny.windzz@gmail.com> References: <20190525181329.18657-1-tiny.windzz@gmail.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the support for allwinner thermal sensor, within allwinner SoC. It will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by: Yangtao Li --- MAINTAINERS | 7 + drivers/thermal/Kconfig | 14 + drivers/thermal/Makefile | 1 + drivers/thermal/sun8i_thermal.c | 437 ++++++++++++++++++++++++++++++++ 4 files changed, 459 insertions(+) create mode 100644 drivers/thermal/sun8i_thermal.c diff --git a/MAINTAINERS b/MAINTAINERS index 2336dd26ece4..d312f9eecf0d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -674,6 +674,13 @@ L: linux-crypto@vger.kernel.org S: Maintained F: drivers/crypto/sunxi-ss/ +ALLWINNER THERMAL DRIVER +M: Yangtao Li +L: linux-pm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +F: drivers/thermal/sun8i_thermal.c + ALLWINNER VPU DRIVER M: Maxime Ripard M: Paul Kocialkowski diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 9966364a6deb..e5465053d66f 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -262,6 +262,20 @@ config SPEAR_THERMAL Enable this to plug the SPEAr thermal sensor driver into the Linux thermal framework. +config SUN8I_THERMAL + tristate "Allwinner sun8i thermal driver" + depends on ARCH_SUNXI || COMPILE_TEST + depends on HAS_IOMEM + depends on NVMEM_SUNXI_SID + depends on OF + depends on RESET_CONTROLLER + help + Support for the sun8i thermal sensor driver into the Linux thermal + framework. + + To compile this driver as a module, choose M here: the + module will be called sun8i-thermal. + config ROCKCHIP_THERMAL tristate "Rockchip thermal driver" depends on ARCH_ROCKCHIP || COMPILE_TEST diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 74a37c7f847a..fa6f8b206281 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -31,6 +31,7 @@ thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o obj-y += broadcom/ obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o +obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c new file mode 100644 index 000000000000..a9cc2197f4cb --- /dev/null +++ b/drivers/thermal/sun8i_thermal.c @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Thermal sensor driver for Allwinner SOC + * Copyright (C) 2019 Yangtao Li + * + * Based on the work of Icenowy Zheng + * Based on the work of Ondrej Jirman + * Based on the work of Josef Gajdusek + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_SENSOR_NUM 4 + +#define FT_TEMP_MASK GENMASK(11, 0) +#define TEMP_CALIB_MASK GENMASK(11, 0) +#define TEMP_TO_REG 672 +#define CALIBRATE_DEFAULT 0x800 + +#define SUN50I_THS_CTRL0 0x00 +#define SUN50I_H6_THS_ENABLE 0x04 +#define SUN50I_H6_THS_PC 0x08 +#define SUN50I_H6_THS_DIC 0x10 +#define SUN50I_H6_THS_DIS 0x20 +#define SUN50I_H6_THS_MFC 0x30 +#define SUN50I_H6_THS_TEMP_CALIB 0xa0 +#define SUN50I_H6_THS_TEMP_DATA 0xc0 + +#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) +#define SUN50I_THS_FILTER_EN BIT(2) +#define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) +#define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) +#define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x) + +/* millidegree celsius */ +#define SUN50I_H6_FT_DEVIATION 7000 + +struct ths_device; + +struct tsensor { + struct ths_device *tmdev; + struct thermal_zone_device *tzd; + int id; + wait_queue_head_t wait_queue; +}; + +struct ths_thermal_chip { + int sensor_num; + int offset; + int scale; + int ft_deviation; + int temp_calib_base; + int temp_data_base; + int (*calibrate)(struct ths_device *tmdev); + int (*init)(struct ths_device *tmdev); + irqreturn_t (*irq_thread)(int irq, void *data); +}; + +struct ths_device { + const struct ths_thermal_chip *chip; + struct device *dev; + struct regmap *regmap; + struct reset_control *reset; + struct clk *bus_clk; + struct tsensor sensor[MAX_SENSOR_NUM]; + int data_ready; +}; + +/* Temp Unit: millidegree Celsius */ +static int sun8i_ths_reg2temp(struct ths_device *tmdev, + int reg) +{ + return (reg + tmdev->chip->offset) * tmdev->chip->scale; +} + +static int sun8i_ths_get_temp(void *data, int *temp) +{ + struct tsensor *s = data; + struct ths_device *tmdev = s->tmdev; + int val; + + wait_event(s->wait_queue, tmdev->data_ready & BIT(s->id)); + tmdev->data_ready &= ~BIT(s->id); + + regmap_read(tmdev->regmap, tmdev->chip->temp_data_base + + 0x4 * s->id, &val); + + *temp = sun8i_ths_reg2temp(tmdev, val); + /* + * XX - According to the original sdk, there are some platforms(rarely) + * that add a fixed offset value after calculating the temperature + * value. We can't simply put it on the formula for calculating the + * temperature above, because the formula for calculating the + * temperature above is also used when the sensor is calibrated. If + * do this, the correct calibration formula is hard to know. + */ + if (tmdev->chip->ft_deviation) + *temp += tmdev->chip->ft_deviation; + + return 0; +} + +static const struct thermal_zone_of_device_ops ths_ops = { + .get_temp = sun8i_ths_get_temp, +}; + +static const struct regmap_config config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, +}; + +static irqreturn_t sun50i_h6_irq_thread(int irq, void *data) +{ + wait_queue_head_t *data_wait; + struct ths_device *tmdev = data; + int i, state; + + regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + data_wait = &tmdev->sensor[i].wait_queue; + + if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) { + /* clear data irq pending */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS, + SUN50I_H6_THS_DATA_IRQ_STS(i)); + + tmdev->data_ready |= BIT(i); + wake_up(data_wait); + } + } + + return IRQ_HANDLED; +} + +static int sun8i_ths_resource_init(struct ths_device *tmdev) +{ + struct device *dev = tmdev->dev; + struct platform_device *pdev = to_platform_device(dev); + struct resource *mem; + void __iomem *base; + int ret, irq; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, mem); + if (IS_ERR(base)) + return PTR_ERR(base); + + tmdev->regmap = devm_regmap_init_mmio(dev, base, &config); + if (IS_ERR(tmdev->regmap)) + return PTR_ERR(tmdev->regmap); + + tmdev->reset = devm_reset_control_get(dev, 0); + if (IS_ERR(tmdev->reset)) + return PTR_ERR(tmdev->reset); + + tmdev->bus_clk = devm_clk_get(&pdev->dev, "bus"); + if (IS_ERR(tmdev->bus_clk)) + return PTR_ERR(tmdev->bus_clk); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(dev, irq, NULL, + tmdev->chip->irq_thread, + IRQF_ONESHOT, "ths", tmdev); + if (ret) + return ret; + + ret = reset_control_deassert(tmdev->reset); + if (ret) + return ret; + + ret = clk_prepare_enable(tmdev->bus_clk); + if (ret) + goto assert_reset; + + ret = tmdev->chip->calibrate(tmdev); + if (ret) + goto bus_disable; + + return 0; + +bus_disable: + clk_disable_unprepare(tmdev->bus_clk); +assert_reset: + reset_control_assert(tmdev->reset); + + return ret; +} + +static int sun50i_ths_calibrate(struct ths_device *tmdev) +{ + struct nvmem_cell *calcell; + struct device *dev = tmdev->dev; + u16 *caldata; + size_t callen; + int ft_temp; + int i, ret = 0; + + calcell = devm_nvmem_cell_get(dev, "calib"); + if (IS_ERR(calcell)) { + if (PTR_ERR(calcell) == -EPROBE_DEFER) + return -EPROBE_DEFER; + /* + * Even if the external calibration data stored in sid is + * not accessible, the THS hardware can still work, although + * the data won't be so accurate. + * + * The default value of calibration register is 0x800 for + * every sensor, and the calibration value is usually 0x7xx + * or 0x8xx, so they won't be away from the default value + * for a lot. + * + * So here we do not return error if the calibartion data is + * not available, except the probe needs deferring. + */ + goto out; + } + + caldata = nvmem_cell_read(calcell, &callen); + if (IS_ERR(caldata)) { + ret = PTR_ERR(caldata); + goto out; + } + + if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) { + ret = -EINVAL; + goto out_free; + } + + /* + * efuse layout: + * + * 0 11 16 32 + * +-------+-------+-------+ + * |temp| |sensor0|sensor1| + * +-------+-------+-------+ + * + * The calibration data on the H6 is the ambient temperature and + * sensor values that are filled during the factory test stage. + * + * The unit of stored FT temperature is 0.1 degreee celusis. + * Through the stored ambient temperature and the data read + * by the sensor, after a certain calculation, the calibration + * value to be compensated can be obtained. + */ + ft_temp = caldata[0] & FT_TEMP_MASK; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + int reg = (int)caldata[i + 1]; + int sensor_temp = sun8i_ths_reg2temp(tmdev, reg); + int delta, cdata, calib_offest; + + /* + * To calculate the calibration value: + * + * X(in Celsius) = Ts - ft_temp + * delta = X * 10000 / TEMP_TO_REG + * cdata = CALIBRATE_DEFAULT - delta + * + * cdata: calibration value + */ + delta = (sensor_temp - ft_temp * 100) * 10 / TEMP_TO_REG; + cdata = CALIBRATE_DEFAULT - delta; + if (cdata & ~TEMP_CALIB_MASK) { + /* + * Calibration value more than 12-bit, but calibration + * register is 12-bit. In this case, ths hardware can + * still work without calibration, although the data + * won't be so accurate. + */ + dev_warn(dev, "sensor%d is not calibrated.\n", i); + + continue; + } + + calib_offest = tmdev->chip->temp_calib_base + (i / 2) * 0x4; + + if (i % 2) { + int val; + + regmap_read(tmdev->regmap, calib_offest, &val); + val = (val & TEMP_CALIB_MASK) | (cdata << 16); + regmap_write(tmdev->regmap, calib_offest, val); + } else { + regmap_write(tmdev->regmap, calib_offest, cdata); + } + } + +out_free: + kfree(caldata); +out: + return ret; +} + +static int sun8i_ths_register(struct ths_device *tmdev) +{ + struct thermal_zone_device *tzd; + int i; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + tmdev->sensor[i].tmdev = tmdev; + tmdev->sensor[i].id = i; + tmdev->sensor[i].tzd = + devm_thermal_zone_of_sensor_register(tmdev->dev, + i, + &tmdev->sensor[i], + &ths_ops); + if (IS_ERR(tmdev->sensor[i].tzd)) + return PTR_ERR(tzd); + } + + return 0; +} + +static int sun8i_ths_probe(struct platform_device *pdev) +{ + struct ths_device *tmdev; + struct device *dev = &pdev->dev; + int i, ret; + + tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL); + if (!tmdev) + return -ENOMEM; + + tmdev->dev = dev; + tmdev->chip = of_device_get_match_data(&pdev->dev); + if (!tmdev->chip) + return -EINVAL; + + /* + * Initialize wait_queue in advance, to avoid calling wake_up + * before ths is registered in isr. + */ + for (i = 0; i < tmdev->chip->sensor_num; i++) + init_waitqueue_head(&tmdev->sensor[i].wait_queue); + + platform_set_drvdata(pdev, tmdev); + + ret = sun8i_ths_resource_init(tmdev); + if (ret) + return ret; + + ret = tmdev->chip->init(tmdev); + if (ret) + return ret; + + ret = sun8i_ths_register(tmdev); + if (ret) + return ret; + + return ret; +} + +static int sun8i_ths_remove(struct platform_device *pdev) +{ + struct ths_device *tmdev = platform_get_drvdata(pdev); + + clk_disable_unprepare(tmdev->bus_clk); + reset_control_assert(tmdev->reset); + + return 0; +} + +static int sun50i_thermal_init(struct ths_device *tmdev) +{ + int val; + + /* + * clkin = 24MHz + * T acquire = clkin / (x + 1) + * = 20us + */ + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, + SUN50I_THS_CTRL0_T_ACQ(479)); + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, + SUN50I_THS_FILTER_EN | + SUN50I_THS_FILTER_TYPE(1)); + /* period = (x + 1) * 4096 / clkin; ~10ms */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_PC, + SUN50I_H6_THS_PC_TEMP_PERIOD(58)); + /* enable sensor */ + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val); + /* thermal data interrupt enable */ + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val); + + return 0; +} + +static const struct ths_thermal_chip sun50i_h6_ths = { + .sensor_num = 2, + .offset = -2794, + .scale = -67, + .ft_deviation = SUN50I_H6_FT_DEVIATION, + .temp_calib_base = SUN50I_H6_THS_TEMP_CALIB, + .temp_data_base = SUN50I_H6_THS_TEMP_DATA, + .calibrate = sun50i_ths_calibrate, + .init = sun50i_thermal_init, + .irq_thread = sun50i_h6_irq_thread, +}; + +static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, of_ths_match); + +static struct platform_driver ths_driver = { + .probe = sun8i_ths_probe, + .remove = sun8i_ths_remove, + .driver = { + .name = "sun8i-thermal", + .of_match_table = of_ths_match, + }, +}; +module_platform_driver(ths_driver); + +MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC"); +MODULE_LICENSE("GPL v2"); From patchwork Sat May 25 18:13:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 10961031 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C9B2A15A6 for ; Sat, 25 May 2019 18:13:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BDF8328A86 for ; Sat, 25 May 2019 18:13:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B22D028A8E; Sat, 25 May 2019 18:13:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2539528A86 for ; Sat, 25 May 2019 18:13:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727566AbfEYSNj (ORCPT ); Sat, 25 May 2019 14:13:39 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:42148 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727528AbfEYSNh (ORCPT ); Sat, 25 May 2019 14:13:37 -0400 Received: by mail-pf1-f196.google.com with SMTP id r22so4328258pfh.9; Sat, 25 May 2019 11:13:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=G+xQDY4NgbdOhNfnVsTOZ1zXd6nCy3MVGYQPOyxe4yI=; b=FS4CgB9gYD6Eg2VljLyZogHNHtVp41eRjKNEh7vZJ8R7KkzouEFVN1rKJe5QJ/mcdI hzh3oRKmWkvDyf09nsIVPxZtYXKEG4S6A61SupalYg5P9LWi0y3Zn8OUvinwc0JLfbUq A4pKoYel9h8ekqt26ctgWGq9qmAr9pw/x6+oeVwpYYHRYkYq5KNs+uEgM1OyAHkSxk0I qjCtaemHqYnUPaQWq3gvp15hk9rHwoESYdCKd8GpExiXfHGJMD6HYD/bhNJQih2pQ2dc er/qTfweb/0hg7LSDlzrqX7gFWaF1tkqMjXEp8ejeOxFzQn4kUBg9jjZi/R1SuPE2gHG hTgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G+xQDY4NgbdOhNfnVsTOZ1zXd6nCy3MVGYQPOyxe4yI=; b=XXDEMniP3JY5mBLJPMvsdj6HrJM4Hj9J5JMdl5bC3at4objwGmVwsWU+IVSk5UWBiT cv/brmrUAwGDUUNNTob17wqR6yCd/I3dQYMe9GKc9vJEpZ66HbPkaAXAO4J/IUMP1K/O pAvYPpGmt2peo0+YRhd30h3+St1cPafdCH8+aIG2nsDhL2cG/4YwhbZL2UhV+vbau2ff AM1CrK9wXLr6rageKZbVcrY/37H9uQz2KdnsbLpp2Su5ZcAQ+qWtnKBqs6ZpUIgfCdsV hG10KNydH1VfkRve/GZI+IJnIM33hzHUupGMPZa6N521JSk05GQ5wfJLf5h1i+KrzJOc rvdA== X-Gm-Message-State: APjAAAWhDRowcdVpyjIBOl2aEwzz7ksirkFLRFyBwj28MXaJcI1dqwSi AzvA9gDQJOGNFhCnmKttDKQ= X-Google-Smtp-Source: APXvYqy9G1fyaENg/3CGzNWn7jnGIZjEs0X/vD+ci2R8s+qv434po80SA5TWA1V8/lfEZLr5gXKSXQ== X-Received: by 2002:aa7:98c6:: with SMTP id e6mr119766182pfm.191.1558808017054; Sat, 25 May 2019 11:13:37 -0700 (PDT) Received: from localhost (68.168.130.77.16clouds.com. [68.168.130.77]) by smtp.gmail.com with ESMTPSA id 127sm6623553pfc.159.2019.05.25.11.13.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 25 May 2019 11:13:36 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, davem@davemloft.net, mchehab+samsung@kernel.org, gregkh@linuxfoundation.org, linus.walleij@linaro.org, nicolas.ferre@microchip.com, paulmck@linux.ibm.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yangtao Li Subject: [PATCH v3 2/3] dt-bindings: thermal: add binding document for h6 thermal controller Date: Sat, 25 May 2019 14:13:28 -0400 Message-Id: <20190525181329.18657-3-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20190525181329.18657-1-tiny.windzz@gmail.com> References: <20190525181329.18657-1-tiny.windzz@gmail.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding document for allwinner h6 thermal controller. Signed-off-by: Yangtao Li --- .../bindings/thermal/sun8i-thermal.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml new file mode 100644 index 000000000000..54cf1277870e --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/sun8i-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner SUN8I Thermal Controller Device Tree Bindings + +maintainers: + - Yangtao Li + +description: |- + This describes the device tree binding for the Allwinner thermal + controller which measures the on-SoC temperatures. + +properties: + compatible: + enum: + - allwinner,sun50i-h6-ths + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + items: + - description: ths bus clock + + clock-names: + items: + - const: bus + + "#thermal-sensor-cells": + enum: [ 0, 1 ] + + nvmem-cells: + items: + - description: ths calibrate data + + nvmem-cell-names: + items: + - const: calib + +required: + - compatible + - reg + - interrupts + - reset + - clocks + - clock-names + +examples: + - | + ths: ths@5070400 { + compatible = "allwinner,sun50i-h6-ths"; + reg = <0x05070400 0x100>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + interrupts = ; + nvmem-cells = <&tsen_calib>; + nvmem-cell-names = "calib"; + #thermal-sensor-cells = <1>; + }; + +... From patchwork Sat May 25 18:13:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 10961029 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A7A86933 for ; Sat, 25 May 2019 18:13:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A42428A86 for ; Sat, 25 May 2019 18:13:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8DF0828A8E; Sat, 25 May 2019 18:13:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D42F28A86 for ; Sat, 25 May 2019 18:13:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727602AbfEYSNk (ORCPT ); Sat, 25 May 2019 14:13:40 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:36766 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727575AbfEYSNj (ORCPT ); Sat, 25 May 2019 14:13:39 -0400 Received: by mail-pl1-f195.google.com with SMTP id d21so5442408plr.3; Sat, 25 May 2019 11:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EnB6+3mIR1GUxLAogalYOOntDr+t9u6MSm9vkJ1kPoo=; b=sf1yzaTwgKxt+8JN/8Rimolz5jnu9NNXetAgOkIApDyLNJDdFaArYWTeELrst+ysF6 OSYnqiTZkrfnVB3cRFLG1/wpr673pY8FrlPEfzb0E1jSiQ00Tp4GR3TUB70v3povEMVb j7mqnt1fWgFe4kDI/gFfX5/cwTOO7x0syZnVkF05kV4qYXzJ+0RoQndloQT7i8rLlGaS JDR6h3bcHn1uLys10XUTwd95nyEM4NM+bEuMw3l+TMNrxel0VQhsO+Ie3cORtnR4nBeW 1M7RLnhQ2jVU97gHKeXAfGqKyYqQPG4j2OqeRb8Xto4qa71HzwBL0KWJYT4mP/lnyyGe F9ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EnB6+3mIR1GUxLAogalYOOntDr+t9u6MSm9vkJ1kPoo=; b=txOrLSRZ/Y5rWZyMZuzKmar5FEiGe//55eVX+E1bjypagpa28hchji86psFwNU1pbc BFiqxqsAc3bP6UPPu7vtSISisbt8rQN2i1weD+ofxDsUVkLhyeKk59g1U6VftzWmVrOI EHxg+8hvOfBzxq+4X/fdlpH9k8kZADpbhkrhJjEhHLKP4M0YuxHIfuXj/osFARIdSWeT VqeqlAUhbKcUhkz/M8moJVssEfgDDiBb5QgudW64QjaeRDqbUDZ9VaW281M+Hd1biBxr 0rtFw26xs0rbxaSnrhjWClGRkJcvQDDkz1/ae/yXbyrsquwRSjWnuCWebyVKQC2KBHyX kApg== X-Gm-Message-State: APjAAAWalH8s4de9xMdzu2y+eH4Bf9NMxxZ9EHw0eG4uFrYdOYgQ/613 VBrmF9KZqV1TCYDLbXIgHYo= X-Google-Smtp-Source: APXvYqzz6527zTMOTWddGiv92U6XysI9bjqHAgREMygNcxWlnY6V/lVUVwTzV9Erzysf5B8LGDBWJQ== X-Received: by 2002:a17:902:2983:: with SMTP id h3mr88692846plb.267.1558808019178; Sat, 25 May 2019 11:13:39 -0700 (PDT) Received: from localhost (68.168.130.77.16clouds.com. [68.168.130.77]) by smtp.gmail.com with ESMTPSA id s66sm18914576pfb.37.2019.05.25.11.13.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 25 May 2019 11:13:38 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, davem@davemloft.net, mchehab+samsung@kernel.org, gregkh@linuxfoundation.org, linus.walleij@linaro.org, nicolas.ferre@microchip.com, paulmck@linux.ibm.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yangtao Li Subject: [PATCH v3 3/3] thermal: fix indentation in makefile Date: Sat, 25 May 2019 14:13:29 -0400 Message-Id: <20190525181329.18657-4-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20190525181329.18657-1-tiny.windzz@gmail.com> References: <20190525181329.18657-1-tiny.windzz@gmail.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To unify code style. Signed-off-by: Yangtao Li --- drivers/thermal/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index fa6f8b206281..d7eafb5ef8ef 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -5,7 +5,7 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o thermal_sys-y += thermal_core.o thermal_sysfs.o \ - thermal_helpers.o + thermal_helpers.o # interface to/from other layers providing sensors thermal_sys-$(CONFIG_THERMAL_HWMON) += thermal_hwmon.o @@ -25,11 +25,11 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o # devfreq cooling -thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o +thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o # platform thermal drivers obj-y += broadcom/ -obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o +obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o @@ -50,7 +50,7 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/ obj-y += st/ obj-$(CONFIG_QCOM_TSENS) += qcom/ obj-y += tegra/ -obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o +obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o