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Cota" , lucienmp_antispam@yahoo.com, =?utf-8?q?Alex_Benn=C3=A9e?= , Luc Michel Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The register request via gdbstub would return the SR part which contains the Trace/Master/IRQ state flags, but would be missing the CR (Condition Register) state bits. This fix adds this support by merging them in the m68k specific gdbstub handler Signed-off-by: Lucien Murray-Pitts Reviewed-by: Laurent Vivier --- target/m68k/gdbstub.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c index fd2bb46c42..f092044883 100644 --- a/target/m68k/gdbstub.c +++ b/target/m68k/gdbstub.c @@ -35,8 +35,10 @@ int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) return gdb_get_reg32(mem_buf, env->aregs[n - 8]); } else { switch (n) { - case 16: - return gdb_get_reg32(mem_buf, env->sr); + case 16: { + /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */ + return gdb_get_reg32(mem_buf, (env->sr | cpu_m68k_get_ccr(env))); + } case 17: return gdb_get_reg32(mem_buf, env->pc); }