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Mon, 27 May 2019 14:28:15 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 8B78A404CB; Mon, 27 May 2019 14:28:13 +0300 (MSK) Received: from bbwork.com (172.17.14.115) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Mon, 27 May 2019 14:28:13 +0300 From: Alexander Filippov To: Subject: [PATCH] ARM: dts: aspeed: g4: add video engine support Date: Mon, 27 May 2019 14:27:53 +0300 Message-ID: <20190527112753.1681-1-a.filippov@yadro.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Originating-IP: [172.17.14.115] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190527_073552_875463_ADD2D696 X-CRM114-Status: GOOD ( 11.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Andrew Jeffery , linux-kernel@vger.kernel.org, Alexander Filippov , Rob Herring , Joel Stanley , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a node to describe the video engine and VGA scratch registers on AST2400. These changes were copied from aspeed-g5.dtsi Signed-off-by: Alexander Filippov Acked-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g4.dtsi | 62 ++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 6011692df15a..adc1804918df 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -168,6 +168,10 @@ compatible = "aspeed,g4-pinctrl"; }; + vga_scratch: scratch { + compatible = "aspeed,bmc-misc"; + }; + p2a: p2a-control { compatible = "aspeed,ast2400-p2a-ctrl"; status = "disabled"; @@ -195,6 +199,16 @@ reg = <0x1e720000 0x8000>; // 32K }; + video: video@1e700000 { + compatible = "aspeed,ast2400-video-engine"; + reg = <0x1e700000 0x1000>; + clocks = <&syscon ASPEED_CLK_GATE_VCLK>, + <&syscon ASPEED_CLK_GATE_ECLK>; + clock-names = "vclk", "eclk"; + interrupts = <7>; + status = "disabled"; + }; + gpio: gpio@1e780000 { #gpio-cells = <2>; gpio-controller; @@ -1408,6 +1422,54 @@ }; }; +&vga_scratch { + dac_mux { + offset = <0x2c>; + bit-mask = <0x3>; + bit-shift = <16>; + }; + vga0 { + offset = <0x50>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga1 { + offset = <0x54>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga2 { + offset = <0x58>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga3 { + offset = <0x5c>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga4 { + offset = <0x60>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga5 { + offset = <0x64>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga6 { + offset = <0x68>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; + vga7 { + offset = <0x6c>; + bit-mask = <0xffffffff>; + bit-shift = <0>; + }; +}; + &sio_regs { sio_2b { offset = <0xf0>;