From patchwork Wed May 29 08:32:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 10966485 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5499676 for ; Wed, 29 May 2019 08:31:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45DC028755 for ; Wed, 29 May 2019 08:31:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3994C28874; Wed, 29 May 2019 08:31:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D1B8728755 for ; Wed, 29 May 2019 08:31:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=VGNmUAqNrQ+mCpV7xcCm5/OohdOkigLcX/U2cybHntg=; b=cmQ 1EEfCml7P9SmhYzB7Yw3heXw2FASxIt9n3Y7X/D8rFg5qWyEX5pMM32kqoXYKbV1SLk2r+whm86++ ydhtl8RoNQyeqSmvpK9sPpIjskK/hEruAdEkIpV/Ii7NOXr2wtz6YBaRR77JJ+GF+VyqfOEYzrJPC 0KBJCSYjBmO+X1WyZNhNSqJ/QybcYIzLO7Sf3RMfETk24aZyUCNuYygZVYsm2qOv9r+mG/6O8iOD8 1BtXzZNEQD0FhgNofC85bbLavW8Q7pXt/pvWQ3CNVQ+RYLL/A0JeCsZmnRJaRcm8iXAGS3N/gXwXq 5EE+MIenz3GmsI8+dGtoPd0rfSWkRbg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVtzO-0005kG-7O; Wed, 29 May 2019 08:31:14 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVtzL-0005jP-Gg for linux-arm-kernel@lists.infradead.org; Wed, 29 May 2019 08:31:12 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8736F200273; Wed, 29 May 2019 10:31:09 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3F2902011C3; Wed, 29 May 2019 10:31:04 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C8C27402FB; Wed, 29 May 2019 16:30:57 +0800 (SGT) From: Chuanhua Han To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com Subject: [PATCH 1/3] gpio: mpc8xxx: Enable port input and interrupt Date: Wed, 29 May 2019 16:32:52 +0800 Message-Id: <20190529083254.39581-1-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.17.1 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190529_013111_687599_8F28F4D5 X-CRM114-Status: UNSURE ( 8.18 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Zhang Ying-22455 , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Chuanhua Han , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The GPIO Input Buffer Enable register is used to control the input enable of each individual GPIO port. When an individual GPIO port's direction is set to input (GPIO_GPDIR[DRn=0]), the associated input enable must be set (GPIOxGPIE[IEn]=1) to propagate the port value to the GPIO Data Register. This patch enable port input and interrupt. Signed-off-by: Zhang Ying-22455 Signed-off-by: Chuanhua Han --- drivers/gpio/gpio-mpc8xxx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index c8673a5d9412..555e0e7957d9 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c @@ -373,9 +373,10 @@ static int mpc8xxx_probe(struct platform_device *pdev) if (!mpc8xxx_gc->irq) return 0; - /* ack and mask all irqs */ + /* ack and enable irqs */ gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff); - gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0); + gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0xffffffff); + gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR2, 0xffffffff); irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade, mpc8xxx_gc); From patchwork Wed May 29 08:32:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 10966487 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7724176 for ; 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Wed, 29 May 2019 10:31:05 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 10C44402CB; Wed, 29 May 2019 16:30:58 +0800 (SGT) From: Chuanhua Han To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com Subject: [PATCH 2/3] gpio: mpc8xxx: Use IRQF_SHARED mode to request IRQ Date: Wed, 29 May 2019 16:32:53 +0800 Message-Id: <20190529083254.39581-2-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190529083254.39581-1-chuanhua.han@nxp.com> References: <20190529083254.39581-1-chuanhua.han@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190529_013112_492364_292AD047 X-CRM114-Status: GOOD ( 12.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Zhang Ying-22455 , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Chuanhua Han , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP GPIO3 and GPIO4 controllers share one irq number on Layerscape platform. In the current implementation, only one GPIO controller can register successfully. This patch is to allow two controllers to share a single interrupt number. Signed-off-by: Zhang Ying-22455 Signed-off-by: Chuanhua Han --- drivers/gpio/gpio-mpc8xxx.c | 43 ++++++++++++++++++++++++++----------- 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index 555e0e7957d9..63c8586fe5c8 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include @@ -105,10 +106,9 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset) return -ENXIO; } -static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc) +static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *dev_id) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc); - struct irq_chip *chip = irq_desc_get_chip(desc); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = dev_id; struct gpio_chip *gc = &mpc8xxx_gc->gc; unsigned int mask; @@ -117,8 +117,7 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc) if (mask) generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 32 - ffs(mask))); - if (chip->irq_eoi) - chip->irq_eoi(&desc->irq_data); + return IRQ_HANDLED; } static void mpc8xxx_irq_unmask(struct irq_data *d) @@ -129,6 +128,9 @@ static void mpc8xxx_irq_unmask(struct irq_data *d) raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); + gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, + gc->pin2mask(gc, irqd_to_hwirq(d))); + gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR) | mpc_pin2mask(irqd_to_hwirq(d))); @@ -302,21 +304,31 @@ static int mpc8xxx_probe(struct platform_device *pdev) struct gpio_chip *gc; const struct mpc8xxx_gpio_devtype *devtype = of_device_get_match_data(&pdev->dev); - int ret; + int ret, irq; mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL); if (!mpc8xxx_gc) return -ENOMEM; - platform_set_drvdata(pdev, mpc8xxx_gc); - - raw_spin_lock_init(&mpc8xxx_gc->lock); - mpc8xxx_gc->regs = of_iomap(np, 0); if (!mpc8xxx_gc->regs) return -ENOMEM; gc = &mpc8xxx_gc->gc; + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "can't get irq number\n"); + return irq; + } + + mpc8xxx_gc->gc.label = pdev->name; + mpc8xxx_gc->gc.owner = THIS_MODULE; + mpc8xxx_gc->gc.base = -1; + mpc8xxx_gc->gc.ngpio = MPC8XXX_GPIO_PINS; + + platform_set_drvdata(pdev, mpc8xxx_gc); + + raw_spin_lock_init(&mpc8xxx_gc->lock); if (of_property_read_bool(np, "little-endian")) { ret = bgpio_init(gc, &pdev->dev, 4, @@ -364,7 +376,7 @@ static int mpc8xxx_probe(struct platform_device *pdev) goto err; } - mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0); + mpc8xxx_gc->irqn = platform_get_irq(pdev, 0); if (!mpc8xxx_gc->irqn) return 0; @@ -378,8 +390,13 @@ static int mpc8xxx_probe(struct platform_device *pdev) gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0xffffffff); gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR2, 0xffffffff); - irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, - mpc8xxx_gpio_irq_cascade, mpc8xxx_gc); + /* Request IRQ */ + ret = devm_request_irq(&pdev->dev, irq, mpc8xxx_gpio_irq_cascade, + IRQF_SHARED, pdev->name, mpc8xxx_gc); + if (ret) { + dev_err(&pdev->dev, "can't claim irq %d\n", mpc8xxx_gc->irqn); + goto err; + } return 0; err: iounmap(mpc8xxx_gc->regs); From patchwork Wed May 29 08:32:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 10966489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB88C112C for ; Wed, 29 May 2019 08:31:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE6E228755 for ; Wed, 29 May 2019 08:31:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D258E28874; Wed, 29 May 2019 08:31:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8756B28755 for ; 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Wed, 29 May 2019 08:31:32 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVtzM-0005jf-KQ for linux-arm-kernel@lists.infradead.org; Wed, 29 May 2019 08:31:14 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 77FB92011CA; Wed, 29 May 2019 10:31:11 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8E10D200272; Wed, 29 May 2019 10:31:06 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 418BA402FA; Wed, 29 May 2019 16:31:00 +0800 (SGT) From: Chuanhua Han To: shawnguo@kernel.org, leoyang.li@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com Subject: [PATCH 3/3] arm64: dts: ls1088a: Revise gpio registers to little-endian Date: Wed, 29 May 2019 16:32:54 +0800 Message-Id: <20190529083254.39581-3-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190529083254.39581-1-chuanhua.han@nxp.com> References: <20190529083254.39581-1-chuanhua.han@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190529_013112_801904_70A83BD2 X-CRM114-Status: UNSURE ( 6.07 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Chuanhua Han , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since fsl-ls1088a Soc GPIO registers are used as little endian, the patch adds the little-endian attribute to each gpio node. Signed-off-by: Chuanhua Han Acked-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index 661137ffa319..3e6d20d065bd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -272,6 +272,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -282,6 +283,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -292,6 +294,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -302,6 +305,7 @@ compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + little-endian; gpio-controller; #gpio-cells = <2>; interrupt-controller;