From patchwork Wed Jun 12 18:16:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10990615 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45B5C1398 for ; Wed, 12 Jun 2019 18:16:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3959D28830 for ; Wed, 12 Jun 2019 18:16:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2DE8D288ED; Wed, 12 Jun 2019 18:16:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E019528830 for ; Wed, 12 Jun 2019 18:16:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 78CC4897B5; Wed, 12 Jun 2019 18:16:10 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id B5BA689817 for ; Wed, 12 Jun 2019 18:16:08 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jun 2019 11:16:08 -0700 X-ExtLoop1: 1 Received: from mdroper-desk.fm.intel.com ([10.105.128.126]) by fmsmga001.fm.intel.com with ESMTP; 12 Jun 2019 11:16:08 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Wed, 12 Jun 2019 11:16:02 -0700 Message-Id: <20190612181602.18438-1-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.5 In-Reply-To: References: Subject: [Intel-gfx] [PATCH v2] drm/i915: Add Wa_1409120013:icl,ehl X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This chicken bit should be set before enabling FBC to avoid screen corruption when the plane size has odd vertical and horizontal dimensions. It is safe to leave the bit set even when FBC is disabled. v2: - The bspec's name for this bit on these platforms ("Spare 14") is pretty meaningless. Let's rename the bit definition to something that more accurately reflects what the bit really does. (Clint) Cc: Clinton Taylor Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_fbc.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index edf9f93934a1..54654a578c84 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3150,6 +3150,8 @@ enum i915_power_well_id { /* Framebuffer compression for Ironlake */ #define ILK_DPFC_CB_BASE _MMIO(0x43200) +#define ILK_DPFC_CHICKEN _MMIO(0x43224) +#define ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL REG_BIT(14) #define ILK_DPFC_CONTROL _MMIO(0x43208) #define FBC_CTL_FALSE_COLOR (1 << 10) /* The bit 28-8 is reserved */ diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 5679f2fffb7c..d36cada2cc7d 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) HSW_FBCQ_DIS); } + if (IS_GEN(dev_priv, 11)) + /* Wa_1409120013:icl,ehl */ + I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL); + I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); intel_fbc_recompress(dev_priv);