From patchwork Thu Jun 13 16:16:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992661 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CF3D14C0 for ; Thu, 13 Jun 2019 16:17:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B9EF21EEB for ; Thu, 13 Jun 2019 16:17:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A04C26223; Thu, 13 Jun 2019 16:17:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CC07A21EEB for ; Thu, 13 Jun 2019 16:17:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=lEHPbHHv4ZaojZo7cKWaS3s9UjPRJxbWItZYIC6ZliA=; b=lVXNOAyUjaox2b/2/jljDpXT2Z 8je4UmXZWZgTCHtl7jz+XbEFd2DqsqU+1xyonfon0m6S+4h7XYu8XzxgprvPvRe/WdAEcuCfZQQKC IApQtUZAiEkyU0lFV6FzjRy1Plf6AGacncetuR8dFq+zl7meRixWDFGtrvcS3N9F45riTHTklxiyy NOPmvKlS20vDKdBSp9X7fCJLtx8lcGBB/PqiylUtsq+Ko5f9y42zQEV+K5LSu/Jj1Pv8Isiu55D3b X8PlDda4s/a3B3o19pyyzec4tZOm/6dwl9GI1FMcwCaQuEGQE25u0WrgOF4RKDmi2LiJuMb83oFqn Chai1VUg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPx-0004PT-0Y; Thu, 13 Jun 2019 16:17:37 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPR-00043x-2U for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:06 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C555DA78; Thu, 13 Jun 2019 09:17:04 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7097F3F694; Thu, 13 Jun 2019 09:17:03 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 1/8] arm64/fpsimd: Update documentation of do_sve_acc Date: Thu, 13 Jun 2019 17:16:49 +0100 Message-Id: <20190613161656.20765-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091705_154492_0252B061 X-CRM114-Status: GOOD ( 11.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP TIF_SVE is cleared by fpsimd_restore_current_state() not task_fpsimd_load(). Update the documentation of do_sve_acc to reflect this behavior. Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- Changes in v2: - Fix typo in the commit message --- arch/arm64/kernel/fpsimd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index a38bf74bcca8..92f418e4f989 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -853,7 +853,7 @@ void fpsimd_release_task(struct task_struct *dead_task) * the SVE access trap will be disabled the next time this task * reaches ret_to_user. * - * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load() + * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() * would have disabled the SVE access trap for userspace during * ret_to_user, making an SVE access trap impossible in that case. */ From patchwork Thu Jun 13 16:16:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992665 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7732714C0 for ; Thu, 13 Jun 2019 16:18:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64B3C205FD for ; Thu, 13 Jun 2019 16:18:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 592892267B; Thu, 13 Jun 2019 16:18:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 091C9205FD for ; Thu, 13 Jun 2019 16:18:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=CmUkO2ELZ5WP5Wsa95DNZpfIyciQWV4IpFOcF9DYl+Y=; b=Ul11mCJ4Xk1DtslUwjm6gZz9Df 4KGBuIR7oQ4MoL54rDjxFvMZsGX7ohPSf60FT6TYrwWOMM3JwDA+lG1cZvYBvQJEJ4wkKoZrOpZrl KmB/7NNcgo7YGjhi6LRh7ayl5iqnVEPPWIu8YOCjU9cg9pIE5cFu+LZhzWYPrTbp82/Ed2w0LlDeg 2Z3SCJEoVODBQ3o5r+43a1sqo2dhBnSu1pHk/bVPcJlX8/IiraKbYtNwQNjKukG1VGXmvXlx/pFMC YA3Kve4QzaM297Id/BKe367A8KpcFjW3+7mLjf9Rv49OKr4zQA4AV6kGkdXdonxycJVYFTlLYGWJf 2RzSPVEA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSQF-0004fF-SP; Thu, 13 Jun 2019 16:17:55 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPS-00044q-OD for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 58E32C14; Thu, 13 Jun 2019 09:17:06 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 04E4B3F694; Thu, 13 Jun 2019 09:17:04 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 2/8] arm64/signal: Update the comment in preserve_sve_context Date: Thu, 13 Jun 2019 17:16:50 +0100 Message-Id: <20190613161656.20765-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091706_829587_52B1B218 X-CRM114-Status: GOOD ( 11.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The SVE state is saved by fpsimd_signal_preserve_current_state() and not preserve_fpsimd_context(). Update the comment in preserve_sve_context to reflect the current behavior. Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- arch/arm64/kernel/signal.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index a9b0485df074..ab3e56bbfb07 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -255,7 +255,8 @@ static int preserve_sve_context(struct sve_context __user *ctx) if (vq) { /* * This assumes that the SVE state has already been saved to - * the task struct by calling preserve_fpsimd_context(). + * the task struct by calling the function + * fpsimd_signal_preserve_current_state(). */ err |= __copy_to_user((char __user *)ctx + SVE_SIG_REGS_OFFSET, current->thread.sve_state, From patchwork Thu Jun 13 16:16:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992667 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06B39924 for ; Thu, 13 Jun 2019 16:18:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E9BE6237F1 for ; Thu, 13 Jun 2019 16:18:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEC68204BE; Thu, 13 Jun 2019 16:18:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 661A2204BE for ; Thu, 13 Jun 2019 16:18:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=kwcUiHIpeJWoRffbQhHEiNGWNBqSByOpWb7VetBN7Po=; b=YKsWlx26ZUwEjm9smfbjBj0UHL DlW7osZ1PCQTue/O+ElRDrypolFRTWQUebr5HZIzBO7vBBwPtsRAgbUscTxR01fy5Tyw6MpmR7AD7 RnTdS5URA4DDQoAlQlANUN3oCDIDOnx/80yyUsek8Bqz/YiX7thwQptlR0OrXCEZUiNjF66LdxYjM V9mp2FAKh+WF1KpG1bUZlOZ1xYcy17IlntW9NoXDJubuTSGRLA3NcQ/WueDxaacm8MYW33pCgYWuB HXyze9ofo+u7P827ACVtfft6DfZuuJC1OPj/Laa5heNzTbQteBunZLaOlouW4JkToMeO8iXXF7fyI 0asH/36g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSQT-0004wK-Cg; Thu, 13 Jun 2019 16:18:09 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPU-00046b-Fu for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:10 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 08C6EC84; Thu, 13 Jun 2019 09:17:08 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8D6313F694; Thu, 13 Jun 2019 09:17:06 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 3/8] arm64/fpsimdmacros: Allow the macro "for" to be used in more cases Date: Thu, 13 Jun 2019 17:16:51 +0100 Message-Id: <20190613161656.20765-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091708_607411_EE463BE2 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave Martin , Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The current version of the macro "for" is only able to work when the counter is used to generate registers using mnemonics. This is because gas is not able to evaluate the expression generated if used in registers name (i.e x\n). Gas offers a way to evaluate macro arguments by using % in front of them under the alternate macro mode [1]. The implementation of "for" is updated to use the alternate macro mode and %, so we can use the macro in more cases. As the alternate macro mode may have side-effect, this is disabled when generating the body. While it is enough to prefix the argument of the macro "__for_body" with %, the arguments of "__for" are also prefixed to get a more bearable value in case of compilation error. [1] https://sourceware.org/binutils/docs/as/Altmacro.html Suggested-by: Dave Martin Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- Changes in v2: - Fix typo in the commit message --- arch/arm64/include/asm/fpsimdmacros.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 46843515d77b..e2ab77dd9b4f 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -177,19 +177,23 @@ .macro __for from:req, to:req .if (\from) == (\to) - _for__body \from + _for__body %\from .else - __for \from, (\from) + ((\to) - (\from)) / 2 - __for (\from) + ((\to) - (\from)) / 2 + 1, \to + __for %\from, %((\from) + ((\to) - (\from)) / 2) + __for %((\from) + ((\to) - (\from)) / 2 + 1), %\to .endif .endm .macro _for var:req, from:req, to:req, insn:vararg .macro _for__body \var:req + .noaltmacro \insn + .altmacro .endm + .altmacro __for \from, \to + .noaltmacro .purgem _for__body .endm From patchwork Thu Jun 13 16:16:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992671 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8FEF114C0 for ; Thu, 13 Jun 2019 16:18:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7CDD1205FD for ; Thu, 13 Jun 2019 16:18:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71578237F1; Thu, 13 Jun 2019 16:18:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 26DCE205FD for ; Thu, 13 Jun 2019 16:18:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=WtVWL8kaR5sCu52Vx33V3XyAr1neQV9OS7xaKz+v4Us=; b=fGxEKygAtVbHqzrAiH8s49PkG8 i4uxKAx7zYjDDKALdfXxlhe+prbMtpO7B0rmrtf66sI8xps99t8ocjzHjlr7tF1YwqqlYfItQAqOs QjadYUIKHw/2jdNAiG1KpR8A3ak3W3Fcgi/bxD+0yJsBRLCKvyGfK6VM0wOQyt7FhayWbvjZRlDvq PYpIxphYMn4rrDKhrc5pxohurZyxVzpEyjzqWoo6AJ2hvx6LIEtvJQmolZqya8l8WveZyqVwfH0Mb CHjgg247TGmLV9dNWzg2ZvprZbVAzd/CjoS4uhFU7nKVLeKLEkCbqjMjtUqaB7ijnvUjSQo0M+Yr0 EokXmAgQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSQo-0005EO-3p; Thu, 13 Jun 2019 16:18:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPV-00048D-RI for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 918CBCFC; Thu, 13 Jun 2019 09:17:09 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3D1543F694; Thu, 13 Jun 2019 09:17:08 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 4/8] arm64/fpsimdmacros: Introduce a macro to update ZCR_EL1.LEN Date: Thu, 13 Jun 2019 17:16:52 +0100 Message-Id: <20190613161656.20765-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091709_940350_C3576876 X-CRM114-Status: UNSURE ( 9.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP A follow-up patch will need to update ZCR_EL1.LEN. Add a macro that could be re-used in the current and new places to avoid code duplication. Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- Changes in v2: - Fix typo in the commit message --- arch/arm64/include/asm/fpsimdmacros.h | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index e2ab77dd9b4f..5e291d9c1ba0 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -198,6 +198,17 @@ .purgem _for__body .endm +/* Update ZCR_EL1.LEN with the new VQ */ +.macro sve_load_vq xvqminus1, xtmp, xtmp2 + mrs_s \xtmp, SYS_ZCR_EL1 + bic \xtmp2, \xtmp, ZCR_ELx_LEN_MASK + orr \xtmp2, \xtmp2, \xvqminus1 + cmp \xtmp2, \xtmp + b.eq 921f + msr_s SYS_ZCR_EL1, \xtmp2 //self-synchronising +921: +.endm + .macro sve_save nxbase, xpfpsr, nxtmp _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 @@ -212,13 +223,7 @@ .endm .macro sve_load nxbase, xpfpsr, xvqminus1, nxtmp, xtmp2 - mrs_s x\nxtmp, SYS_ZCR_EL1 - bic \xtmp2, x\nxtmp, ZCR_ELx_LEN_MASK - orr \xtmp2, \xtmp2, \xvqminus1 - cmp \xtmp2, x\nxtmp - b.eq 921f - msr_s SYS_ZCR_EL1, \xtmp2 // self-synchronising -921: + sve_load_vq \xvqminus1, x\nxtmp, \xtmp2 _for n, 0, 31, _sve_ldr_v \n, \nxbase, \n - 34 _sve_ldr_p 0, \nxbase _sve_wrffr 0 From patchwork Thu Jun 13 16:16:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992673 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D9E5924 for ; Thu, 13 Jun 2019 16:18:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7CA21237F1 for ; Thu, 13 Jun 2019 16:18:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 713D526223; Thu, 13 Jun 2019 16:18:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1B0A8237F1 for ; Thu, 13 Jun 2019 16:18:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=qD2NnVkYr+xQtlc5/xnU+GK46Buw26KI1lliSwurwGo=; b=FnUrB3UjO+Nyvfcx/SjNB5OtBG vtJ8QSCMRtunuw9n+zg1TGq/Ri/+UUeVq7laZdX75yO5fSRq0LAxV6/xe+ix/A70DCOMIsTfvpm52 kFaYhVBPoXMxdEPWrgdE5lSq63SaJfFuj9j3IaDMQmMw+PtQklwjFAjK+Y7LiPKhgywXJqCNJNPhp oAmMhCTxBjLpljo+dRlIHP3hYr8Un/er/F74QY8s0LmTfnOxXGNI75XlkBo/QZVDgXsiOVqEDv8gB pK5T8/zYSjDs5M47w8evU6/EGrqVnQmXBrYgGrcOOix1IbfhPlRleRenrCuH7JDGn/U582Rg01SXy rGHFYVjg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSR0-0005Ta-It; Thu, 13 Jun 2019 16:18:42 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPX-0004A3-Iu for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 25621D75; Thu, 13 Jun 2019 09:17:11 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C585D3F694; Thu, 13 Jun 2019 09:17:09 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 5/8] arm64/sve: Implement an helper to flush SVE registers Date: Thu, 13 Jun 2019 17:16:53 +0100 Message-Id: <20190613161656.20765-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091711_932752_2517161D X-CRM114-Status: UNSURE ( 9.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a new helper that will zero all SVE registers but the first 128-bits of each vector. Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- Changes in v2: - Fix typo in the commit title --- arch/arm64/include/asm/fpsimd.h | 3 +++ arch/arm64/include/asm/fpsimdmacros.h | 19 +++++++++++++++++++ arch/arm64/kernel/entry-fpsimd.S | 7 +++++++ 3 files changed, 29 insertions(+) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index df62bbd33a9a..fda3544c9606 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -83,6 +83,9 @@ static inline void *sve_pffr(struct thread_struct *thread) extern void sve_save_state(void *state, u32 *pfpsr); extern void sve_load_state(void const *state, u32 const *pfpsr, unsigned long vq_minus_1); + +extern void sve_flush_live(void); + extern unsigned int sve_get_vl(void); struct arm64_cpu_capabilities; diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 5e291d9c1ba0..a41ab337bf42 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -175,6 +175,13 @@ | ((\np) << 5) .endm +/* PFALSE P\np.B */ +.macro _sve_pfalse np + _sve_check_preg \np + .inst 0x2518e400 \ + | (\np) +.endm + .macro __for from:req, to:req .if (\from) == (\to) _for__body %\from @@ -209,6 +216,18 @@ 921: .endm +/* Preserve the first 128-bits of Znz and zero the rest. */ +.macro _sve_flush_z nz + _sve_check_zreg \nz + mov v\nz\().16b, v\nz\().16b +.endm + +.macro sve_flush + _for n, 0, 31, _sve_flush_z \n + _for n, 0, 15, _sve_pfalse \n + _sve_wrffr 0 +.endm + .macro sve_save nxbase, xpfpsr, nxtmp _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 12d4958e6429..17121a51c41f 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -57,4 +57,11 @@ ENTRY(sve_get_vl) _sve_rdvl 0, 1 ret ENDPROC(sve_get_vl) + +/* Zero all SVE registers but the first 128-bits of each vector */ +ENTRY(sve_flush_live) + sve_flush + ret +ENDPROC(sve_flush_live) + #endif /* CONFIG_ARM64_SVE */ From patchwork Thu Jun 13 16:16:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992681 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B050B14C0 for ; Thu, 13 Jun 2019 16:19:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E333204BE for ; Thu, 13 Jun 2019 16:19:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 91D98205D1; Thu, 13 Jun 2019 16:19:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 393B7204BE for ; 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Thu, 13 Jun 2019 16:19:02 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPZ-0004Bq-3C for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ACFCA105A; Thu, 13 Jun 2019 09:17:12 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 592533F694; Thu, 13 Jun 2019 09:17:11 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 6/8] arm64/sve: Implement an helper to load SVE registers from FPSIMD state Date: Thu, 13 Jun 2019 17:16:54 +0100 Message-Id: <20190613161656.20765-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091713_247909_D9138649 X-CRM114-Status: GOOD ( 10.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In a follow-up patch, we may save the FPSIMD rather than the full SVE state when the state has to be zeroed on return to userspace (e.g during a syscall). Introduce an helper to load SVE vectors from FPSIMD state and zero the rest of SVE registers. Signed-off-by: Julien Grall Reviewed-by: Dave Martin --- arch/arm64/include/asm/fpsimd.h | 3 +++ arch/arm64/kernel/entry-fpsimd.S | 17 +++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index fda3544c9606..f07a88552588 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -86,6 +86,9 @@ extern void sve_load_state(void const *state, u32 const *pfpsr, extern void sve_flush_live(void); +extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state, + unsigned long vq_minus_1); + extern unsigned int sve_get_vl(void); struct arm64_cpu_capabilities; diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 17121a51c41f..35c21a707730 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -58,6 +58,23 @@ ENTRY(sve_get_vl) ret ENDPROC(sve_get_vl) +/* + * Load SVE state from FPSIMD state. + * + * x0 = pointer to struct fpsimd_state + * x1 = VQ - 1 + * + * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD + * and the rest zeroed. All the other SVE registers will be zeroed. + */ +ENTRY(sve_load_from_fpsimd_state) + sve_load_vq x1, x2, x3 + fpsimd_restore x0, 8 + _for n, 0, 15, _sve_pfalse \n + _sve_wrffr 0 + ret +ENDPROC(sve_load_from_fpsimd_state) + /* Zero all SVE registers but the first 128-bits of each vector */ ENTRY(sve_flush_live) sve_flush From patchwork Thu Jun 13 16:16:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992683 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5B4614C0 for ; Thu, 13 Jun 2019 16:19:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9204E2022C for ; Thu, 13 Jun 2019 16:19:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8636F26222; Thu, 13 Jun 2019 16:19:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C226E2022C for ; Thu, 13 Jun 2019 16:19:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=EGa6/Gj7w/M+4rx8z8YalGXcD4/oV+j7QbtOGUpz67Y=; b=tNEMlMb6GL53Q9dsPQzzuvmjtq /vnDDdyN44ywpb/E/CgY5v5QdEQihuubEm5x5dNOCcLy5B7Ni0bYTpLuvdyzsq5Z62uOSiBpqBPaS TbbltCFsq0XZl+2r+fdBE82/nqBBy8uQEuW2pGQabsqxh18mfknL24aenlS+rbMRilc4iD22W8cvM ozbyw580b2v/VXTa1OWVFGvqg9KHUEUwJUA97y8OVEXLDB/HFDDfXPhCYiXvSTXLQguJXRye7RjTV STqZ4WkfCK5mNTMyuvYAw6/LeksUDhAdWRd8W2PquRl0r8nMt3cMfnQ/oX4YWIvbiPaqcqVULlvCt q0KuYKWA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSRW-0005zz-Tn; Thu, 13 Jun 2019 16:19:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPa-0004A3-IB for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 412FB106F; Thu, 13 Jun 2019 09:17:14 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E0E6F3F694; Thu, 13 Jun 2019 09:17:12 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 7/8] arm64/sve: Don't disable SVE on syscalls return Date: Thu, 13 Jun 2019 17:16:55 +0100 Message-Id: <20190613161656.20765-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091714_786285_CF956E07 X-CRM114-Status: GOOD ( 21.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Per the syscalls ABI, SVE registers will be unknown after a syscalls. In practice the kernel will disable SVE and zero all the registers but the first 128-bits of the vector on the next SVE instructions. In workload mixing SVE and syscall, this will result of 2 entry/exit to the kernel per exit. To avoid the second entry/exit, a new flag TIF_SVE_NEEDS_FLUSH is introduced to mark a task that needs to flush the SVE context on return to userspace. On entry to a syscall, the flag TIF_SVE will still be cleared. It will be restored on return to userspace once the SVE state has been flushed. This means that if a task requires to synchronize the FP state during a syscall (e.g context switch, signal), only the FPSIMD registers will be saved. When the task is rescheduled, the SVE state will be loaded from FPSIMD state. Signed-off-by: Julien Grall --- Changes in v2: - Fix typo in a comment --- arch/arm64/include/asm/thread_info.h | 5 ++++- arch/arm64/kernel/fpsimd.c | 32 ++++++++++++++++++++++++++++++++ arch/arm64/kernel/process.c | 1 + arch/arm64/kernel/ptrace.c | 7 +++++++ arch/arm64/kernel/signal.c | 14 +++++++++++++- arch/arm64/kernel/syscall.c | 13 +++++-------- 6 files changed, 62 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index f1d032be628a..d87bcd80cb0f 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -86,6 +86,7 @@ void arch_release_task_struct(struct task_struct *tsk); #define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ #define TIF_UPROBE 4 /* uprobe breakpoint or singlestep */ #define TIF_FSCHECK 5 /* Check FS is USER_DS on return */ +#define TIF_SVE_NEEDS_FLUSH 6 /* Flush SVE registers on return */ #define TIF_NOHZ 7 #define TIF_SYSCALL_TRACE 8 #define TIF_SYSCALL_AUDIT 9 @@ -113,10 +114,12 @@ void arch_release_task_struct(struct task_struct *tsk); #define _TIF_FSCHECK (1 << TIF_FSCHECK) #define _TIF_32BIT (1 << TIF_32BIT) #define _TIF_SVE (1 << TIF_SVE) +#define _TIF_SVE_NEEDS_FLUSH (1 << TIF_SVE_NEEDS_FLUSH) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \ - _TIF_UPROBE | _TIF_FSCHECK) + _TIF_UPROBE | _TIF_FSCHECK | \ + _TIF_SVE_NEEDS_FLUSH) #define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 92f418e4f989..41ab73b12f4a 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -161,6 +161,8 @@ extern void __percpu *efi_sve_state; */ static void __sve_free(struct task_struct *task) { + /* SVE context will be zeroed when allocated. */ + clear_tsk_thread_flag(task, TIF_SVE_NEEDS_FLUSH); kfree(task->thread.sve_state); task->thread.sve_state = NULL; } @@ -217,6 +219,11 @@ static void sve_free(struct task_struct *task) * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state * irrespective of whether TIF_SVE is clear or set, since these are * not vector length dependent. + * + * * When TIF_SVE_NEEDS_FLUSH is set, all the SVE registers but the first + * 128-bits of the Z-registers are logically zero but not stored anywhere. + * Saving logically zero bits across context switches is therefore + * pointless, although they must be zeroed before re-entering userspace. */ /* @@ -226,6 +233,14 @@ static void sve_free(struct task_struct *task) * thread_struct is known to be up to date, when preparing to enter * userspace. * + * When TIF_SVE_NEEDS_FLUSH is set, the SVE state will be restored from the + * FPSIMD state. + * + * TIF_SVE_NEEDS_FLUSH and TIF_SVE set at the same time should never happen. + * In the unlikely case it happens, the code is able to cope with it. It will + * first restore the SVE registers and then flush them in + * fpsimd_restore_current_state. + * * Softirqs (and preemption) must be disabled. */ static void task_fpsimd_load(void) @@ -236,6 +251,12 @@ static void task_fpsimd_load(void) sve_load_state(sve_pffr(¤t->thread), ¤t->thread.uw.fpsimd_state.fpsr, sve_vq_from_vl(current->thread.sve_vl) - 1); + else if (system_supports_sve() && + test_and_clear_thread_flag(TIF_SVE_NEEDS_FLUSH)) { + sve_load_from_fpsimd_state(¤t->thread.uw.fpsimd_state, + sve_vq_from_vl(current->thread.sve_vl) - 1); + set_thread_flag(TIF_SVE); + } else fpsimd_load_state(¤t->thread.uw.fpsimd_state); } @@ -1070,6 +1091,17 @@ void fpsimd_restore_current_state(void) fpsimd_bind_task_to_cpu(); } + if (system_supports_sve() && + test_and_clear_thread_flag(TIF_SVE_NEEDS_FLUSH)) { + /* + * The userspace had SVE enabled on entry to the kernel + * and requires the state to be flushed. + */ + sve_flush_live(); + sve_user_enable(); + set_thread_flag(TIF_SVE); + } + local_bh_enable(); } diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 3767fb21a5b8..8c67ef89b01a 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -367,6 +367,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, * and disable discard SVE state for p: */ clear_tsk_thread_flag(p, TIF_SVE); + clear_tsk_thread_flag(p, TIF_SVE_NEEDS_FLUSH); p->thread.sve_state = NULL; /* diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index b82e0a9b3da3..f44016052cba 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -899,6 +899,11 @@ static int sve_set(struct task_struct *target, ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, SVE_PT_FPSIMD_OFFSET); clear_tsk_thread_flag(target, TIF_SVE); + /* + * If ptrace requested to use FPSIMD, then don't try to + * re-enable SVE when the task is running again. + */ + clear_tsk_thread_flag(target, TIF_SVE_NEEDS_FLUSH); goto out; } @@ -923,6 +928,8 @@ static int sve_set(struct task_struct *target, */ fpsimd_sync_to_sve(target); set_tsk_thread_flag(target, TIF_SVE); + /* Don't flush SVE registers on return as ptrace will update them. */ + clear_tsk_thread_flag(target, TIF_SVE_NEEDS_FLUSH); BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header)); start = SVE_PT_SVE_OFFSET; diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index ab3e56bbfb07..83a23a1edc7e 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -530,6 +530,17 @@ static int restore_sigframe(struct pt_regs *regs, } else { err = restore_fpsimd_context(user.fpsimd); } + + /* + * When successfully restoring the: + * - FPSIMD context, we don't want to re-enable SVE + * - SVE context, we don't want to override what was + * restored + */ + if (err == 0) + clear_thread_flag(TIF_SVE_NEEDS_FLUSH); + + } return err; @@ -942,7 +953,8 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, rseq_handle_notify_resume(NULL, regs); } - if (thread_flags & _TIF_FOREIGN_FPSTATE) + if (thread_flags & (_TIF_FOREIGN_FPSTATE | + _TIF_SVE_NEEDS_FLUSH)) fpsimd_restore_current_state(); } diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 871c739f060a..b9bd7092e253 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -142,16 +142,13 @@ static inline void sve_user_discard(void) if (!system_supports_sve()) return; - clear_thread_flag(TIF_SVE); - /* - * task_fpsimd_load() won't be called to update CPACR_EL1 in - * ret_to_user unless TIF_FOREIGN_FPSTATE is still set, which only - * happens if a context switch or kernel_neon_begin() or context - * modification (sigreturn, ptrace) intervenes. - * So, ensure that CPACR_EL1 is already correct for the fast-path case. + * TIF_SVE is cleared to save the FPSIMD state rather than the SVE + * state on context switch. The bit will be set again while + * restoring/zeroing the registers. */ - sve_user_disable(); + if (test_and_clear_thread_flag(TIF_SVE)) + set_thread_flag(TIF_SVE_NEEDS_FLUSH); } asmlinkage void el0_svc_handler(struct pt_regs *regs) From patchwork Thu Jun 13 16:16:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10992687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C8618924 for ; Thu, 13 Jun 2019 16:19:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B717320499 for ; Thu, 13 Jun 2019 16:19:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B57AD205FD; Thu, 13 Jun 2019 16:19:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4350D204FD for ; Thu, 13 Jun 2019 16:19:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=q/8Qc3ncrQw+MngcZ4gIaznbet4GzLkkqpHMV0FKdLY=; b=aBD1n8BxRC3OyXbqzLCsHlD5Mc a2GF2CPfujUK6rXex1NH5JVjkwOUNUyKQggjdejrsecqYeARtybLUE7RbcshrsCjE8tIBTjAu31BS DJHxDq7qRBquFAXFfg5JYx1zZagykUA8uOI/H9EFv33tMLv5xKqtah5uoJnK0cD6jpuFVMlwpgMSI GPixj8GPJTo/muNidHZk7mkpc7N6m8vf8j4wnQ3lS/Wb0BBgf8ADeTlAXWyvZxCBk1Ytc1f0dB7sk rDBeSJwFGi5x2OCeVusWPoaopbDkwYWx7W2Vfcf9/ixlA9ENlkYsxdZ9Lpr+e+rmkVq0s5uEZXSDf seRrD0lg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSRr-0006SF-AB; Thu, 13 Jun 2019 16:19:35 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hbSPc-0004Bq-0K for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2019 16:17:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C9A6411D4; Thu, 13 Jun 2019 09:17:15 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 757033F694; Thu, 13 Jun 2019 09:17:14 -0700 (PDT) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 8/8] arm64/sve: Rework SVE trap access to use TIF_SVE_NEEDS_FLUSH Date: Thu, 13 Jun 2019 17:16:56 +0100 Message-Id: <20190613161656.20765-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190613161656.20765-1-julien.grall@arm.com> References: <20190613161656.20765-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_091716_472456_87E125FE X-CRM114-Status: GOOD ( 18.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, zhang.lei@jp.fujitsu.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP SVE state will be flushed on the first SVE access trap. At the moment, the SVE state will be generated from the FPSIMD state in software and then loaded in memory. It is possible to use the newly introduce flag TIF_SVE_NEEDS_FLUSH to avoid a lot of memory access. If the FPSIMD state is in memory, the SVE state will be loaded on return to userspace from the FPSIMD state. If the FPSIMD state is loaded, then we need to set the vector-length before relying on return to userspace to flush the SVE registers. This is because the vector-length is only set when loading from memory. We also need to rebind the task to the CPU so the newly allocated SVE state is used when the task is saved. Signed-off-by: Julien Grall --- Changes in v2: - Rebind the task to the CPU if loaded in memory --- arch/arm64/include/asm/fpsimd.h | 2 ++ arch/arm64/kernel/entry-fpsimd.S | 5 +++++ arch/arm64/kernel/fpsimd.c | 33 ++++++++++++++++++++++----------- 3 files changed, 29 insertions(+), 11 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index f07a88552588..200c1fce52b6 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -91,6 +91,8 @@ extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state, extern unsigned int sve_get_vl(void); +extern void sve_set_vq(unsigned long vq_minus_1); + struct arm64_cpu_capabilities; extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 35c21a707730..e3ec566d7335 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -58,6 +58,11 @@ ENTRY(sve_get_vl) ret ENDPROC(sve_get_vl) +ENTRY(sve_set_vq) + sve_load_vq x0, x1, x2 + ret +ENDPROC(sve_set_vq) + /* * Load SVE state from FPSIMD state. * diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 41ab73b12f4a..0a517ee93134 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -869,10 +869,8 @@ void fpsimd_release_task(struct task_struct *dead_task) /* * Trapped SVE access * - * Storage is allocated for the full SVE state, the current FPSIMD - * register contents are migrated across, and TIF_SVE is set so that - * the SVE access trap will be disabled the next time this task - * reaches ret_to_user. + * Storage is allocated for the full SVE state and rely on the return + * code to actually convert the FPSIMD state to SVE state. * * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() * would have disabled the SVE access trap for userspace during @@ -890,14 +888,24 @@ asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) local_bh_disable(); - fpsimd_save(); - - /* Force ret_to_user to reload the registers: */ - fpsimd_flush_task_state(current); + set_thread_flag(TIF_SVE_NEEDS_FLUSH); + /* + * We should not be here with SVE enabled. TIF_SVE will be set + * before returning to userspace by fpsimd_restore_current_state(). + */ + WARN_ON(test_thread_flag(TIF_SVE)); - fpsimd_to_sve(current); - if (test_and_set_thread_flag(TIF_SVE)) - WARN_ON(1); /* SVE access shouldn't have trapped */ + /* + * When the FPSIMD state is loaded: + * - The return path (see fpsimd_restore_current_state) requires + * the Vector-Length t be loaded beforehand. + * - We need to rebind the task to the CPU so the newly allocated + * SVE state is used when the task is saved. + */ + if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { + sve_set_vq(sve_vq_from_vl(current->thread.sve_vl) - 1); + fpsimd_bind_task_to_cpu(); + } local_bh_enable(); } @@ -1096,6 +1104,9 @@ void fpsimd_restore_current_state(void) /* * The userspace had SVE enabled on entry to the kernel * and requires the state to be flushed. + * + * We rely on the Vector-Length to be set correctly before-hand + * when converting a loaded FPSIMD state to SVE state. */ sve_flush_live(); sve_user_enable();