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Add tcon lcd compatible R40, the same compatible can handle TCON LCD0, LCD1. Cc: Rob Herring Cc: Mark Rutland Signed-off-by: Jagan Teki Acked-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 31ab72cba3d4..9e9c7f934202 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -160,6 +160,7 @@ Required properties: * allwinner,sun8i-a33-tcon * allwinner,sun8i-a83t-tcon-lcd * allwinner,sun8i-a83t-tcon-tv + * allwinner,sun8i-r40-tcon-lcd * allwinner,sun8i-r40-tcon-tv * allwinner,sun8i-v3s-tcon * allwinner,sun9i-a80-tcon-lcd From patchwork Thu Jun 13 18:52:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993531 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B2F913AF for ; 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Thu, 13 Jun 2019 11:53:56 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id p43sm946314pjp.4.2019.06.13.11.53.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 11:53:56 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jernej Skrabec Subject: [PATCH 2/9] drm/sun4i: tcon: Add TCON LCD support for R40 Date: Fri, 14 Jun 2019 00:22:34 +0530 Message-Id: <20190613185241.22800-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190613185241.22800-1-jagan@amarulasolutions.com> References: <20190613185241.22800-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_115358_089972_4B8F69A7 X-CRM114-Status: GOOD ( 10.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, Michael Trimarchi , linux-amarula@amarulasolutions.com, Jagan Teki Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP TCON LCD0, LCD1 in allwinner R40, are used for managing LCD interfaces like RGB, LVDS and DSI. Like TCON TV0, TV1 these LCD0, LCD1 are also managed via tcon top. Add support for it, in tcon driver. Signed-off-by: Jagan Teki Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9e9d08ee8387..8553066e7bed 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -1471,6 +1471,12 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { .has_channel_1 = true, }; +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { + .supports_lvds = true, + .has_channel_0 = true, + .set_mux = sun8i_r40_tcon_tv_set_mux, +}; + static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = { .has_channel_1 = true, .set_mux = sun8i_r40_tcon_tv_set_mux, @@ -1501,6 +1507,7 @@ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-tv", .data = &sun8i_a83t_tv_quirks }, + { .compatible = "allwinner,sun8i-r40-tcon-lcd", .data = &sun8i_r40_lcd_quirks }, { .compatible = "allwinner,sun8i-r40-tcon-tv", .data = &sun8i_r40_tv_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks }, From patchwork Thu Jun 13 18:52:35 2019 Content-Type: text/plain; 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Use the macro in place of index numbers, for more code readability. Signed-off-by: Jagan Teki Reviewed-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-r40.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index bb856e53b806..219d2dca16b3 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -44,6 +44,7 @@ #include #include #include +#include #include #include @@ -704,7 +705,7 @@ compatible = "allwinner,sun8i-r40-tcon-tv"; reg = <0x01c73000 0x1000>; interrupts = ; - clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>; + clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>; clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV0>; reset-names = "lcd"; @@ -747,7 +748,7 @@ compatible = "allwinner,sun8i-r40-tcon-tv"; reg = <0x01c74000 0x1000>; interrupts = ; - clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top 1>; + clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top CLK_TCON_TOP_TV1>; clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV1>; reset-names = "lcd"; From patchwork Thu Jun 13 18:52:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993541 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F71913AD for ; Thu, 13 Jun 2019 18:55:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 003EA22B27 for ; Thu, 13 Jun 2019 18:55:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E7D5523201; Thu, 13 Jun 2019 18:55:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 98E5822B27 for ; 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Right now the code is using, real numbers start with 0, but we have proper macros that defined these name index numbers. Use the existing macros, instead of real numbers for more code readability. Signed-off-by: Jagan Teki Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 3267d0f9b9b2..465e9b0cdfee 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -194,19 +194,22 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, clk_data->hws[CLK_TCON_TOP_TV0] = sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_TV0_GATE, 0); + TCON_TOP_TCON_TV0_GATE, + CLK_TCON_TOP_TV0); if (quirks->has_tcon_tv1) clk_data->hws[CLK_TCON_TOP_TV1] = sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_TV1_GATE, 1); + TCON_TOP_TCON_TV1_GATE, + CLK_TCON_TOP_TV1); if (quirks->has_dsi) clk_data->hws[CLK_TCON_TOP_DSI] = sun8i_tcon_top_register_gate(dev, "dsi", regs, &tcon_top->reg_lock, - TCON_TOP_TCON_DSI_GATE, 2); + TCON_TOP_TCON_DSI_GATE, + CLK_TCON_TOP_DSI); for (i = 0; i < CLK_NUM; i++) if (IS_ERR(clk_data->hws[i])) { From patchwork Thu Jun 13 18:52:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993543 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FAAC13AF for ; Thu, 13 Jun 2019 18:55:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E3CFE1FFD9 for ; Thu, 13 Jun 2019 18:55:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D0C3620587; Thu, 13 Jun 2019 18:55:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4DC041FFD9 for ; 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TCON Top Block Diagram in User manual. TCON TOP can have an hierarchy for TCON_LCD0, LCD1 like TCON_TV0, TV1 so, the tcon top would handle the clocks of TCON_LCD0, LCD1 similar like TV0, TV1. But, the current tcon_top node is using dsi clock name with CLK_DSI_DPHY which is ideally handle via dphy which indeed a separate interface block. So, use tcon-lcd0 instead of dsi which would refer the CLK_TCON_LCD0 similar like CLK_TCON_TV0 with tcon-tv0. This way we can refer CLK_TCON_LCD0 from tcon_top clock in tcon_lcd0 node and the actual DSI_DPHY clock node would refer in dphy node. Signed-off-by: Jagan Teki --- arch/arm/boot/dts/sun8i-r40.dtsi | 6 +++--- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 6 +++--- include/dt-bindings/clock/sun8i-tcon-top.h | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 219d2dca16b3..12576536df4a 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -591,16 +591,16 @@ <&ccu CLK_TVE0>, <&ccu CLK_TCON_TV1>, <&ccu CLK_TVE1>, - <&ccu CLK_DSI_DPHY>; + <&ccu CLK_TCON_LCD0>; clock-names = "bus", "tcon-tv0", "tve0", "tcon-tv1", "tve1", - "dsi"; + "tcon-lcd0"; clock-output-names = "tcon-top-tv0", "tcon-top-tv1", - "tcon-top-dsi"; + "tcon-top-lcd0"; resets = <&ccu RST_BUS_TCON_TOP>; #clock-cells = <1>; diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 465e9b0cdfee..e23c19f18986 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -205,11 +205,11 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, CLK_TCON_TOP_TV1); if (quirks->has_dsi) - clk_data->hws[CLK_TCON_TOP_DSI] = - sun8i_tcon_top_register_gate(dev, "dsi", regs, + clk_data->hws[CLK_TCON_TOP_LCD0] = + sun8i_tcon_top_register_gate(dev, "tcon-lcd0", regs, &tcon_top->reg_lock, TCON_TOP_TCON_DSI_GATE, - CLK_TCON_TOP_DSI); + CLK_TCON_TOP_LCD0); for (i = 0; i < CLK_NUM; i++) if (IS_ERR(clk_data->hws[i])) { diff --git a/include/dt-bindings/clock/sun8i-tcon-top.h b/include/dt-bindings/clock/sun8i-tcon-top.h index 25164d767835..88de3f2ba335 100644 --- a/include/dt-bindings/clock/sun8i-tcon-top.h +++ b/include/dt-bindings/clock/sun8i-tcon-top.h @@ -6,6 +6,6 @@ #define CLK_TCON_TOP_TV0 0 #define CLK_TCON_TOP_TV1 1 -#define CLK_TCON_TOP_DSI 2 +#define CLK_TCON_TOP_LCD0 2 #endif /* _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_ */ From patchwork Thu Jun 13 18:52:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993545 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 626A314BB for ; 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Thu, 13 Jun 2019 11:54:15 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id p43sm946314pjp.4.2019.06.13.11.54.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 11:54:14 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jernej Skrabec Subject: [PATCH 6/9] dt-bindings: sun6i-dsi: Add R40 MIPI-DSI compatible (w/ A64 fallback) Date: Fri, 14 Jun 2019 00:22:38 +0530 Message-Id: <20190613185241.22800-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190613185241.22800-1-jagan@amarulasolutions.com> References: <20190613185241.22800-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_115416_334174_729ECE63 X-CRM114-Status: GOOD ( 12.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-sunxi@googlegroups.com, Rob Herring , Jagan Teki , Michael Trimarchi , linux-amarula@amarulasolutions.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The MIPI DSI controller on Allwinner R40 is similar on the one on A64 like doesn't associate any DSI_SCLK gating. So, add R40 compatible and append A64 compatible as fallback. Cc: Rob Herring Cc: Mark Rutland Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt b/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt index d0ce51fea103..438f1f999aeb 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt @@ -13,6 +13,7 @@ Required properties: - compatible: value must be one of: * allwinner,sun6i-a31-mipi-dsi * allwinner,sun50i-a64-mipi-dsi + * allwinner,sun8i-r40-mipi-dsi, allwinner,sun50i-a64-mipi-dsi - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the DSI encoder From patchwork Thu Jun 13 18:52:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993547 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8DEDF13AD for ; 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Thu, 13 Jun 2019 11:54:20 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id p43sm946314pjp.4.2019.06.13.11.54.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 11:54:19 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jernej Skrabec Subject: [PATCH 7/9] dt-bindings: sun6i-dsi: Add R40 DPHY compatible (w/ A31 fallback) Date: Fri, 14 Jun 2019 00:22:39 +0530 Message-Id: <20190613185241.22800-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190613185241.22800-1-jagan@amarulasolutions.com> References: <20190613185241.22800-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_115420_868487_D6D945FF X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-sunxi@googlegroups.com, Rob Herring , Jagan Teki , Michael Trimarchi , linux-amarula@amarulasolutions.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The MIPI DSI PHY controller on Allwinner R40 is similar on the one on A31. Add R40 compatible and append A31 compatible as fallback. Cc: Rob Herring Cc: Mark Rutland Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt b/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt index 438f1f999aeb..b7ad1be33008 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun6i-dsi.txt @@ -40,6 +40,7 @@ Required properties: - compatible: value must be one of: * allwinner,sun6i-a31-mipi-dphy * allwinner,sun50i-a64-mipi-dphy, allwinner,sun6i-a31-mipi-dphy + * allwinner,sun8i-r40-mipi-dphy, allwinner,sun6i-a31-mipi-dphy - reg: base address and size of memory-mapped region - clocks: phandles to the clocks feeding the DSI encoder * bus: the DSI interface clock From patchwork Thu Jun 13 18:52:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993549 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B52C13AD for ; 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Thu, 13 Jun 2019 11:54:24 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id p43sm946314pjp.4.2019.06.13.11.54.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 11:54:24 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jernej Skrabec Subject: [PATCH 8/9] ARM: dts: sun8i: r40: Add MIPI DSI pipeline Date: Fri, 14 Jun 2019 00:22:40 +0530 Message-Id: <20190613185241.22800-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190613185241.22800-1-jagan@amarulasolutions.com> References: <20190613185241.22800-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190613_115425_744482_80836A90 X-CRM114-Status: GOOD ( 11.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, Michael Trimarchi , linux-amarula@amarulasolutions.com, Jagan Teki Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add MIPI DSI pipeline for Allwinner R40. Unlike conventional Display pipeline in allwinner, R40 have TCON TCOP which would interact various block like muxes, tcon lcd, tcon_tv for better pipeline fitting. For MIPI DSI pipeline, we have to configure the tcon_lcd0 block which would interact with tcon_top for upper pipeline connections and dsi block for lower pipeline connections. So, this patch created that pipeline by adding new nodes for tcon_lcd0, dsi, dphy and connet them to make proper pipeline fitting. Signed-off-by: Jagan Teki --- arch/arm/boot/dts/sun8i-r40.dtsi | 73 ++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 12576536df4a..3ea2451151ff 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -623,6 +623,7 @@ tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { reg = <0>; + remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; }; tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { @@ -701,6 +702,45 @@ }; }; + tcon_lcd0: lcd-controller@1c71000 { + compatible = "allwinner,sun8i-r40-tcon-lcd"; + reg = <0x01c71000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_LCD0>, <&tcon_top CLK_TCON_TOP_LCD0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON_LCD0>, <&ccu RST_BUS_LVDS>; + reset-names = "lcd", "lvds"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_lcd0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; + }; + }; + + tcon_lcd0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon_lcd0_out_dsi_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon_lcd0_out>; + }; + }; + }; + }; + tcon_tv0: lcd-controller@1c73000 { compatible = "allwinner,sun8i-r40-tcon-tv"; reg = <0x01c73000 0x1000>; @@ -798,6 +838,39 @@ interrupts = ; }; + dsi: dsi@1ca0000 { + compatible = "allwinner,sun8i-r40-mipi-dsi", + "allwinner,sun50i-a64-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MIPI_DSI>; + clock-names = "bus"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + port { + dsi_in_tcon_lcd0_out: endpoint { + remote-endpoint = <&tcon_lcd0_out_dsi_out>; + }; + }; + }; + + dphy: d-phy@1ca1000 { + compatible = "allwinner,sun8i-r40-mipi-dphy", + "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun8i-r40-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; From patchwork Thu Jun 13 18:52:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10993553 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1C11113AD for ; Thu, 13 Jun 2019 18:57:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0851F22B27 for ; Thu, 13 Jun 2019 18:57:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EF83823201; Thu, 13 Jun 2019 18:57:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 959B022B27 for ; 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DSI panel connected via board DSI port with, - DCDC1 as VCC-DSI supply - PH18 gpio for lcd enable pin - PD17 gpio for lcd reset pin - PD16 gpio for backlight enable pin Signed-off-by: Jagan Teki --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index c488aaacbd68..5f39317b783e 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -45,6 +45,7 @@ #include "sun8i-r40.dtsi" #include +#include / { model = "Banana Pi BPI-M2-Ultra"; @@ -55,6 +56,14 @@ serial0 = &uart0; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <1 2 4 8 16 32 64 128 255>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 16 GPIO_ACTIVE_HIGH>; /* LCD-BL-EN: PH16 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -117,6 +126,23 @@ status = "okay"; }; +&dphy { + status = "okay"; +}; + +&dsi { + vcc-dsi-supply = <®_dcdc1>; /* VCC-DSI */ + status = "okay"; + + panel@0 { + compatible = "bananapi,s070wv20-ct16-icn6211"; + reg = <0>; + enable-gpio = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* LCD-PWR-EN: PH18 */ + reset-gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* LCD-RST: PH17 */ + backlight = <&backlight>; + }; +}; + &ehci1 { status = "okay"; }; @@ -203,6 +229,12 @@ pinctrl-0 = <&clk_out_a_pin>; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; + status = "okay"; +}; + ®_aldo2 { regulator-always-on; regulator-min-microvolt = <2500000>; @@ -290,6 +322,10 @@ regulator-name = "vdd1v2-sata"; }; +&tcon_lcd0 { + status = "okay"; +}; + &tcon_tv0 { status = "okay"; };