From patchwork Thu Aug 30 12:41:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 10581679 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E59BE13AC for ; Thu, 30 Aug 2018 12:41:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D5EB52BD13 for ; Thu, 30 Aug 2018 12:41:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9F4F2BDB6; Thu, 30 Aug 2018 12:41:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8A9AB2BD13 for ; Thu, 30 Aug 2018 12:41:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E9116E73F; Thu, 30 Aug 2018 12:41:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 277F56E73B; Thu, 30 Aug 2018 12:41:40 +0000 (UTC) Received: by mail-pf1-x442.google.com with SMTP id h69-v6so3835089pfd.4; Thu, 30 Aug 2018 05:41:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4G6HCei6CjxwJhVtU8dRnrOf0vEoe98B4OcSvJfMNak=; b=gONQF5PAlpuzOBtVwxI8Pk73IA6qR7sy310yWPDMRviTLOtW/6zLgfgPRJQ0LkAnE9 asCi3F9m82dq+HHCNtoHyXN3orLnVk84vDSctRfbYgeVbJxAvC2LdDjiNDaNzjMyTCjJ FTB7rdoOLXI0GX4/K3BRto0ArZsU5PLEcQgc+ky3Yi4CNRSOo8asBgxydV/uUM9QtfrV 71Yd5ehZkX4wAZse82KVd4rVp7hQwTqTXdVVAmzrkB44VoPAB7dO1cPSq1jVGqFqPeK0 uHg3uEjwJyDveKptNDkJht/WSF551KcN11Svpql7XTIbTKjlnxu9Ro2NZ8X26OQAPW/Z oJ9Q== X-Gm-Message-State: APzg51B49muvpxPiswt8rDMo0tzNZxdu/DEfO7lAxIyjC5iOgYug93tC G0JL7ZWA9qdaQwMye2/JgNRrI677xn+eBw== X-Google-Smtp-Source: ANB0Vda1t0NXg0D+qQK/RqX6orSHIpJ/GIISMhexa41NSsOCq9H2dtduGOnqLT4U+MqHADlV85+zwQ== X-Received: by 2002:a62:4f0b:: with SMTP id d11-v6mr10203995pfb.132.1535632899341; Thu, 30 Aug 2018 05:41:39 -0700 (PDT) Received: from jheikkil-mobl.fi.intel.com (fmdmzpr04-ext.fm.intel.com. [192.55.54.39]) by smtp.gmail.com with ESMTPSA id r85-v6sm18344225pfd.144.2018.08.30.05.41.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Aug 2018 05:41:38 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Subject: [PATCH 1/4] drm: Add P010, P012, P016 format definitions and fourcc Date: Thu, 30 Aug 2018 15:41:11 +0300 Message-Id: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.7.4 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sharma Swati2 , dri-devel@lists.freedesktop.org, Juha-Pekka Heikkila MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add P010 definition, semi-planar yuv format where each component is 16 bits 10 msb containing color value. First come Y plane [10:6] followed by 2x2 subsampled Cr:Cb plane [10:6:10:6] Add P012 definition, semi-planar yuv format where each component is 16 bits 12 msb containing color value. First come Y plane [12:4] followed by 2x2 subsampled Cr:Cb plane [12:4:12:4] Add P016 definition, semi-planar yuv format where each component is 16 bits. First come Y plane followed by 2x2 subsampled Cr:Cb plane [16:16] Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/drm_fourcc.c | 3 +++ include/uapi/drm/drm_fourcc.h | 10 ++++++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index 35c1e27..32e07a2 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -173,6 +173,9 @@ const struct drm_format_info *__drm_format_info(u32 format) { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true }, + { .format = DRM_FORMAT_P010, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, + { .format = DRM_FORMAT_P012, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, + { .format = DRM_FORMAT_P016, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, }; unsigned int i; diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 2ed46e9..daaabb1 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -178,6 +178,16 @@ extern "C" { #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ /* + * 2 plane YCbCr + * index 0 = Y plane, [15:0] Y little endian where Pxxx indicate + * component xxx msb Y [xxx:16-xxx] + * index 1 = Cr:Cb plane, [31:0] Cr:Cb little endian [xxx:16-xxx:xxx:16-xxx] + */ +#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane, 10 bit per channel */ +#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cr:Cb plane, 12 bit per channel */ +#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane, 16 bit per channel */ + +/* * 3 plane YCbCr * index 0: Y plane, [7:0] Y * index 1: Cb plane, [7:0] Cb From patchwork Thu Aug 30 12:41:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 10581681 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5770920 for ; Thu, 30 Aug 2018 12:41:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95EF72BD83 for ; Thu, 30 Aug 2018 12:41:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 89B782BDC1; Thu, 30 Aug 2018 12:41:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 28E872BD83 for ; Thu, 30 Aug 2018 12:41:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4BCB16E743; Thu, 30 Aug 2018 12:41:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by gabe.freedesktop.org (Postfix) with ESMTPS id 73A046E751; Thu, 30 Aug 2018 12:41:43 +0000 (UTC) Received: by mail-pl1-x632.google.com with SMTP id x6-v6so3785291plv.10; Thu, 30 Aug 2018 05:41:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LXXe78ZmgfLKZrpBxqqhOJ8NjBLp9vqAO1oibrmIcrk=; b=rj4/avK4QVnz7e3693hDftrQ/BdalaIQr0gs6a6fVQ5MQY9bPhYFkPDnR4ojIQ4IEr M+JMHtF4b7ipc9fRlaGYJf2/dgLAeIyWaNeDS+YnX18yLBFHqvmJiYwnL828Prd7F5th 1KUkTr9OSNaR12HDAIYGCkB/w97UYvFl4bkHonttJDvXL/94hbi4yYPV85sTDwBa32Tp SY2/RbACoqMhzYUXQzykgpLpYMyUFDFLfLSj///SEfhDO5kurG81YqQ8PcvcqvRsu5BT r14R8ZAUP6ctD84EDNu8bqYTenvSDQk+Rsj91qSqm7cTWcSP1Lm1n+C4IzUlZwGZM7hB iuPQ== X-Gm-Message-State: APzg51BGGVcGYT7WQd0IU/mCUEbhUgojDxnjPM4NlXOOEHxl5zVusLKL D4MrvaNBNa719lToVmaeJb3TDtoime2BNQ== X-Google-Smtp-Source: ANB0VdaQ8bs5h2b+fsW+mw1OLA5eCCBu1fgY1absmJm0vsOp9wBDnR7ZdqOn5FBvTel8j7S/LSDiDQ== X-Received: by 2002:a17:902:be07:: with SMTP id r7-v6mr9975592pls.275.1535632902607; Thu, 30 Aug 2018 05:41:42 -0700 (PDT) Received: from jheikkil-mobl.fi.intel.com (fmdmzpr04-ext.fm.intel.com. [192.55.54.39]) by smtp.gmail.com with ESMTPSA id r85-v6sm18344225pfd.144.2018.08.30.05.41.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Aug 2018 05:41:42 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Subject: [PATCH 2/4] drm/i915: Add P010, P012, P016 plane control definitions Date: Thu, 30 Aug 2018 15:41:12 +0300 Message-Id: <1535632874-29927-2-git-send-email-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> References: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sharma Swati2 , dri-devel@lists.freedesktop.org, Juha-Pekka Heikkila MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add needed plane control flag definitions for P010, P012 and P016 formats. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f232178..2c959c8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6497,8 +6497,11 @@ enum { #define PLANE_CTL_FORMAT_YUV422 (0 << 24) #define PLANE_CTL_FORMAT_NV12 (1 << 24) #define PLANE_CTL_FORMAT_XRGB_2101010 (2 << 24) +#define PLANE_CTL_FORMAT_P010 (3 << 24) #define PLANE_CTL_FORMAT_XRGB_8888 (4 << 24) +#define PLANE_CTL_FORMAT_P012 (5 << 24) #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24) +#define PLANE_CTL_FORMAT_P016 (7 << 24) #define PLANE_CTL_FORMAT_AYUV (8 << 24) #define PLANE_CTL_FORMAT_INDEXED (12 << 24) #define PLANE_CTL_FORMAT_RGB_565 (14 << 24) From patchwork Thu Aug 30 12:41:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 10581691 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4656C1805 for ; Thu, 30 Aug 2018 12:42:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 363582BDC1 for ; Thu, 30 Aug 2018 12:42:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A43A2BDC3; Thu, 30 Aug 2018 12:42:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 917E82BDC1 for ; Thu, 30 Aug 2018 12:41:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A68C66E75C; Thu, 30 Aug 2018 12:41:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by gabe.freedesktop.org (Postfix) with ESMTPS id B93C86E751; Thu, 30 Aug 2018 12:41:46 +0000 (UTC) Received: by mail-pl1-x642.google.com with SMTP id x6-v6so3785349plv.10; Thu, 30 Aug 2018 05:41:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L0qYD6iM16Y0LEFJPZnNkuig8BJJOIGjkkfBtllcA84=; b=e4rqbSM+sHj/PYKMGlE4G30aGs+06WEqTrrXoc3Jlcy6W67c3r315jvaqlWSJEofrG XhFHAWqH5EfVhTnWWKYtpo4v+poK2+5zUgLqVRNSj1vgdzEgtPHV1YrLaD3A3AdJTS7J TSNtlYIizceuueWmu5KhlXLDO/93rB6R5vQxw0O+uan4UXbK4M2HmhIN+36aY7wcsU8Y JoUmPB35uAkyDCDVm4ycYbnKSL2SiXreL3fftxgWWzLzWB4aXpJnSVevKBiq05Jy86AH sHVBH78Umq/Pq24TIT8ok5v/Fwq6o/rSN0Ih9VLiyNDeRr6A4gZGI48szAhWYjgq9pfw Ubqw== X-Gm-Message-State: APzg51DkEPhV3FSax+scwI2oMYgcEAp5N4vRFEWl8sQdEf2n1MrL7lTe mXijN6e4w97Pul3J0prVWKM70/0Ybq4lZw== X-Google-Smtp-Source: ANB0VdZned3V6No0m7x91FRGZLSUP9hkBC0tjKCpwnxn31wrBGcA/dLwxgtpjVUUhsh1lIRHjawNRg== X-Received: by 2002:a17:902:1665:: with SMTP id g92-v6mr10233730plg.257.1535632906019; Thu, 30 Aug 2018 05:41:46 -0700 (PDT) Received: from jheikkil-mobl.fi.intel.com (fmdmzpr04-ext.fm.intel.com. [192.55.54.39]) by smtp.gmail.com with ESMTPSA id r85-v6sm18344225pfd.144.2018.08.30.05.41.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Aug 2018 05:41:45 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Subject: [PATCH 3/4] drm/i915: preparations for enabling P010, P012, P016 formats Date: Thu, 30 Aug 2018 15:41:13 +0300 Message-Id: <1535632874-29927-3-git-send-email-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> References: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sharma Swati2 , dri-devel@lists.freedesktop.org, Juha-Pekka Heikkila MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Preparations for enabling P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. (Sharma, Swati2): removed unnecessary checks, changed debug error message to be more generic. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/intel_atomic.c | 3 +-- drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 41 +++++++++++++++++++++++++------ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 19 +++++++------- drivers/gpu/drm/i915/intel_sprite.c | 18 +++++++++++++- 6 files changed, 63 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index b04952b..ab76b72 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -334,8 +334,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, /* set scaler mode */ if ((INTEL_GEN(dev_priv) >= 9) && plane_state && plane_state->base.fb && - plane_state->base.fb->format->format == - DRM_FORMAT_NV12) { + is_planar_yuv_format(plane_state->base.fb->format->format)) { if (INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) && !IS_SKYLAKE(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c index fa7df5f..d64d993 100644 --- a/drivers/gpu/drm/i915/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c @@ -184,7 +184,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ else crtc_state->active_planes &= ~BIT(intel_plane->id); - if (state->visible && state->fb->format->format == DRM_FORMAT_NV12) + if (state->visible && is_planar_yuv_format(state->fb->format->format)) crtc_state->nv12_planes |= BIT(intel_plane->id); else crtc_state->nv12_planes &= ~BIT(intel_plane->id); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4bb46f2..43efeb4 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2672,6 +2672,12 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) return DRM_FORMAT_RGB565; case PLANE_CTL_FORMAT_NV12: return DRM_FORMAT_NV12; + case PLANE_CTL_FORMAT_P010: + return DRM_FORMAT_P010; + case PLANE_CTL_FORMAT_P012: + return DRM_FORMAT_P012; + case PLANE_CTL_FORMAT_P016: + return DRM_FORMAT_P016; default: case PLANE_CTL_FORMAT_XRGB_8888: if (rgb_order) { @@ -3187,7 +3193,7 @@ int skl_check_plane_surface(const struct intel_crtc_state *crtc_state, * Handle the AUX surface first since * the main surface setup depends on it. */ - if (fb->format->format == DRM_FORMAT_NV12) { + if (is_planar_yuv_format(fb->format->format)) { ret = skl_check_nv12_surface(crtc_state, plane_state); if (ret) return ret; @@ -3511,6 +3517,12 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format) return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY; case DRM_FORMAT_NV12: return PLANE_CTL_FORMAT_NV12; + case DRM_FORMAT_P010: + return PLANE_CTL_FORMAT_P010; + case DRM_FORMAT_P012: + return PLANE_CTL_FORMAT_P012; + case DRM_FORMAT_P016: + return PLANE_CTL_FORMAT_P016; default: MISSING_CASE(pixel_format); } @@ -4812,8 +4824,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, need_scaling = src_w != dst_w || src_h != dst_h; if (plane_scaler_check) - if (pixel_format == DRM_FORMAT_NV12) - need_scaling = true; + need_scaling = is_planar_yuv_format(pixel_format); if (crtc_state->ycbcr420 && scaler_user == SKL_CRTC_INDEX) need_scaling = true; @@ -4854,9 +4865,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, return 0; } - if (plane_scaler_check && pixel_format == DRM_FORMAT_NV12 && + if (plane_scaler_check && is_planar_yuv_format(pixel_format) && (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) { - DRM_DEBUG_KMS("NV12: src dimensions not met\n"); + DRM_DEBUG_KMS("planar yuv: src dimensions not met\n"); return -EINVAL; } @@ -4959,6 +4970,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: case DRM_FORMAT_NV12: + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: break; default: DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n", @@ -13182,7 +13196,7 @@ skl_max_scale(struct intel_crtc *intel_crtc, * or * cdclk/crtc_clock */ - mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3; + mult = is_planar_yuv_format(pixel_format) ? 2 : 3; tmpclk1 = (1 << 16) * mult - 1; tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock); max_scale = min(tmpclk1, tmpclk2); @@ -13413,6 +13427,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: case DRM_FORMAT_NV12: + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: if (modifier == I915_FORMAT_MOD_Yf_TILED) return true; /* fall through */ @@ -14556,6 +14573,16 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, goto err; } break; + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + if (INTEL_GEN(dev_priv) < 10 && !IS_GEMINILAKE(dev_priv)) { + DRM_DEBUG_KMS("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format, + &format_name)); + goto err; + } + break; default: DRM_DEBUG_KMS("unsupported pixel format: %s\n", drm_get_format_name(mode_cmd->pixel_format, &format_name)); @@ -14568,7 +14595,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, drm_helper_mode_fill_fb_struct(&dev_priv->drm, fb, mode_cmd); - if (fb->format->format == DRM_FORMAT_NV12 && + if (is_planar_yuv_format(fb->format->format) && (fb->width < SKL_MIN_YUV_420_SRC_W || fb->height < SKL_MIN_YUV_420_SRC_H || (fb->width % 4) != 0 || (fb->height % 4) != 0)) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index f573121..b4701ca 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -2114,6 +2114,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv, /* intel_sprite.c */ +bool is_planar_yuv_format(uint32_t pixelformat); int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, int usecs); struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv, diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d99e5fa..e1292b2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3942,7 +3942,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, if (INTEL_GEN(dev_priv) < 11) val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id)); - if (fourcc == DRM_FORMAT_NV12) { + if (is_planar_yuv_format(fourcc)) { skl_ddb_entry_init_from_hw(dev_priv, &ddb->plane[pipe][plane_id], val2); skl_ddb_entry_init_from_hw(dev_priv, @@ -4150,7 +4150,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, if (intel_plane->id == PLANE_CURSOR) return 0; - if (plane == 1 && format != DRM_FORMAT_NV12) + if (plane == 1 && !is_planar_yuv_format(format)) return 0; /* @@ -4162,7 +4162,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, height = drm_rect_height(&intel_pstate->base.src) >> 16; /* UV plane does 1/2 pixel sub-sampling */ - if (plane == 1 && format == DRM_FORMAT_NV12) { + if (plane == 1 && is_planar_yuv_format(format)) { width /= 2; height /= 2; } @@ -4229,7 +4229,7 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate, const int plane) return 0; /* For packed formats, and uv-plane, return 0 */ - if (plane == 1 && fb->format->format != DRM_FORMAT_NV12) + if (plane == 1 && !is_planar_yuv_format(fb->format->format)) return 0; /* For Non Y-tile return 8-blocks */ @@ -4247,7 +4247,7 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate, const int plane) src_w = drm_rect_width(&intel_pstate->base.src) >> 16; src_h = drm_rect_height(&intel_pstate->base.src) >> 16; - /* Halve UV plane width and height for NV12 */ + /* Halve UV plane width and height for NV12 and other planar yuv */ if (plane == 1) { src_w /= 2; src_h /= 2; @@ -4526,8 +4526,8 @@ skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv, return 0; /* only NV12 format has two planes */ - if (plane_id == 1 && fb->format->format != DRM_FORMAT_NV12) { - DRM_DEBUG_KMS("Non NV12 format have single plane\n"); + if (plane_id == 1 && !is_planar_yuv_format(fb->format->format)) { + DRM_DEBUG_KMS("Non planar format have single plane\n"); return -EINVAL; } @@ -4538,7 +4538,7 @@ skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv, wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED; wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS; - wp->is_planar = fb->format->format == DRM_FORMAT_NV12; + wp->is_planar = is_planar_yuv_format(fb->format->format); if (plane->id == PLANE_CURSOR) { wp->width = intel_pstate->base.crtc_w; @@ -4813,8 +4813,7 @@ skl_compute_wm_levels(const struct drm_i915_private *dev_priv, return ret; } - if (intel_pstate->base.fb->format->format == DRM_FORMAT_NV12) - wm->is_planar = true; + wm->is_planar = is_planar_yuv_format(intel_pstate->base.fb->format->format); return 0; } diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 9600ccf..1f1276f 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -41,6 +41,19 @@ #include #include "i915_drv.h" +bool is_planar_yuv_format(uint32_t pixelformat) +{ + switch (pixelformat) { + case DRM_FORMAT_NV12: + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return true; + default: + return false; + } +} + int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, int usecs) { @@ -1041,7 +1054,7 @@ intel_check_sprite_plane(struct intel_crtc_state *crtc_state, src->y2 = (src_y + src_h) << 16; if (fb->format->is_yuv && - fb->format->format != DRM_FORMAT_NV12 && + !is_planar_yuv_format(fb->format->format) && (src_x % 2 || src_w % 2)) { DRM_DEBUG_KMS("src x/w (%u, %u) must be a multiple of 2 for YUV planes\n", src_x, src_w); @@ -1420,6 +1433,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: case DRM_FORMAT_NV12: + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: if (modifier == I915_FORMAT_MOD_Yf_TILED) return true; /* fall through */ From patchwork Thu Aug 30 12:41:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 10581693 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E05D6920 for ; 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[192.55.54.39]) by smtp.gmail.com with ESMTPSA id r85-v6sm18344225pfd.144.2018.08.30.05.41.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Aug 2018 05:41:48 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Subject: [PATCH 4/4] drm/i915: enable P010, P012, P016 formats for primary and sprite planes Date: Thu, 30 Aug 2018 15:41:14 +0300 Message-Id: <1535632874-29927-4-git-send-email-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> References: <1535632874-29927-1-git-send-email-juhapekka.heikkila@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sharma Swati2 , dri-devel@lists.freedesktop.org, Juha-Pekka Heikkila MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Enabling of P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. (Sharma, Swati2) Rename glk format table to follow similar style as on skl. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++++++++++- drivers/gpu/drm/i915/intel_sprite.c | 26 ++++++++++++++++++++++++-- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 43efeb4..1a67340 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -104,6 +104,25 @@ static const uint32_t skl_pri_planar_formats[] = { DRM_FORMAT_NV12, }; +static const uint32_t glk_pri_planar_formats[] = { + DRM_FORMAT_C8, + DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XRGB2101010, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, + DRM_FORMAT_P010, + DRM_FORMAT_P012, + DRM_FORMAT_P016, +}; + static const uint64_t skl_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -13721,7 +13740,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, PLANE_PRIMARY); - if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { + intel_primary_formats = glk_pri_planar_formats; + num_formats = ARRAY_SIZE(glk_pri_planar_formats); + } else if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { intel_primary_formats = skl_pri_planar_formats; num_formats = ARRAY_SIZE(skl_pri_planar_formats); } else { diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 1f1276f..3270fab 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1294,6 +1294,22 @@ static uint32_t skl_planar_formats[] = { DRM_FORMAT_NV12, }; +static uint32_t glk_planar_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, + DRM_FORMAT_P010, + DRM_FORMAT_P012, + DRM_FORMAT_P016, +}; + static const uint64_t skl_plane_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -1551,8 +1567,14 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, if (skl_plane_has_planar(dev_priv, pipe, PLANE_SPRITE0 + plane)) { - plane_formats = skl_planar_formats; - num_plane_formats = ARRAY_SIZE(skl_planar_formats); + if (INTEL_GEN(dev_priv) >= 10 || + IS_GEMINILAKE(dev_priv)) { + plane_formats = glk_planar_formats; + num_plane_formats = ARRAY_SIZE(glk_planar_formats); + } else { + plane_formats = skl_planar_formats; + num_plane_formats = ARRAY_SIZE(skl_planar_formats); + } } else { plane_formats = skl_plane_formats; num_plane_formats = ARRAY_SIZE(skl_plane_formats);