From patchwork Sun Jun 16 12:37:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 10997353 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74C3F14BB for ; Sun, 16 Jun 2019 12:40:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 54EA3287C1 for ; Sun, 16 Jun 2019 12:40:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4175E287CF; Sun, 16 Jun 2019 12:40:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 58FF02876C for ; Sun, 16 Jun 2019 12:40:08 +0000 (UTC) Received: from localhost ([::1]:39464 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hcUS7-0005rb-89 for patchwork-qemu-devel@patchwork.kernel.org; Sun, 16 Jun 2019 08:40:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42252) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hcUQE-0003vs-UD for qemu-devel@nongnu.org; Sun, 16 Jun 2019 08:38:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hcUQD-000631-KM for qemu-devel@nongnu.org; Sun, 16 Jun 2019 08:38:10 -0400 Received: from mail.ilande.co.uk ([46.43.2.167]:46360 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hcUQD-00061S-Cq; Sun, 16 Jun 2019 08:38:09 -0400 Received: from host86-173-229-95.range86-173.btcentralplus.com ([86.173.229.95] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1hcUPw-0001jp-38; Sun, 16 Jun 2019 13:37:52 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net, gkurz@kaod.org Date: Sun, 16 Jun 2019 13:37:38 +0100 Message-Id: <20190616123751.781-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190616123751.781-1-mark.cave-ayland@ilande.co.uk> References: <20190616123751.781-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.173.229.95 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.43.2.167 Subject: [Qemu-devel] [PATCH v3 02/15] target/ppc: remove getVSR()/putVSR() from mem_helper.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order" functions getVSR() and putVSR() which used to convert the VSR registers into host endian order are no longer required. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/ppc/mem_helper.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 5b0f9ee50d..87632ccf53 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -417,26 +417,27 @@ STVE(stvewx, cpu_stl_data_ra, bswap32, u32) void helper_##name(CPUPPCState *env, target_ulong addr, \ target_ulong xt_num, target_ulong rb) \ { \ - int i; \ - ppc_vsr_t xt; \ + ppc_vsr_t *xt = &env->vsr[xt_num]; \ + ppc_vsr_t t; \ uint64_t nb = GET_NB(rb); \ + int i; \ \ - xt.s128 = int128_zero(); \ + t.s128 = int128_zero(); \ if (nb) { \ nb = (nb >= 16) ? 16 : nb; \ if (msr_le && !lj) { \ for (i = 16; i > 16 - nb; i--) { \ - xt.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC()); \ + t.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC()); \ addr = addr_add(env, addr, 1); \ } \ } else { \ for (i = 0; i < nb; i++) { \ - xt.VsrB(i) = cpu_ldub_data_ra(env, addr, GETPC()); \ + t.VsrB(i) = cpu_ldub_data_ra(env, addr, GETPC()); \ addr = addr_add(env, addr, 1); \ } \ } \ } \ - putVSR(xt_num, &xt, env); \ + *xt = t; \ } VSX_LXVL(lxvl, 0) @@ -447,23 +448,23 @@ VSX_LXVL(lxvll, 1) void helper_##name(CPUPPCState *env, target_ulong addr, \ target_ulong xt_num, target_ulong rb) \ { \ - int i; \ - ppc_vsr_t xt; \ + ppc_vsr_t *xt = &env->vsr[xt_num]; \ target_ulong nb = GET_NB(rb); \ + int i; \ \ if (!nb) { \ return; \ } \ - getVSR(xt_num, &xt, env); \ + \ nb = (nb >= 16) ? 16 : nb; \ if (msr_le && !lj) { \ for (i = 16; i > 16 - nb; i--) { \ - cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC()); \ + cpu_stb_data_ra(env, addr, xt->VsrB(i - 1), GETPC()); \ addr = addr_add(env, addr, 1); \ } \ } else { \ for (i = 0; i < nb; i++) { \ - cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC()); \ + cpu_stb_data_ra(env, addr, xt->VsrB(i), GETPC()); \ addr = addr_add(env, addr, 1); \ } \ } \