From patchwork Tue Jun 18 10:02:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 11001349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC1CF924 for ; Tue, 18 Jun 2019 10:03:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB64E28A27 for ; Tue, 18 Jun 2019 10:03:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FEA328A29; Tue, 18 Jun 2019 10:03:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2CFF228A27 for ; Tue, 18 Jun 2019 10:03:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NQ6LJi2lDAKM1CQDtkwJfRgO31rdnRgHjRJbzyfVnvw=; b=ky+Qp3AFiYhoCJ WQcrNbYgJSBvIhqM4j0HmIJp+VrgJaxB46BhjyvO+YficAy4lxiZo3cHV0GgudPKxnF7YDK6KS7sU yP5hJ3Sof3gBpJOIH7heFZRoK3CLo7BELasnYwRQG9ldy8MSe9RU2QE5ImdspXO64k3Wl0LHALNd9 8IQ4pq+M+s9WdEk065Q/ioSHXUUZbjavi1v5WPhRlg8ssHC+rhzDuwKB8oaFUuTROuppVlHwoqVNR qphxSF8uncOSdDw5c4105FUQ0DH5FtjhXVtRfscDiwU2KhtbHWWGpWlrGTVoKwSRUOkObCDCBcXKm rKy70FOyN86JiwQlGg1w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdAxf-0005dk-ER; Tue, 18 Jun 2019 10:03:31 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx4-0004w6-1T for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 10:02:56 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I9uvpM016668; Tue, 18 Jun 2019 12:02:51 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=wHb4WREE9/72Kxb6pYtsF+ktYoPpYJcruLTaSIRla4U=; b=KBQCWkrNtt8+AWhcR+YEpAXq2SxF0TeMxxVyrWxk/5GMaSb3y89Oc7RKKWmjM6X2/KMR x67URoYaSyoNdBJPZ4063PC9z3F3ypHBmHQdLKghBz8QZ7yTenEAV5oSSf14Awo7E0xR heoNSpb+qOl5xKsopOpvQAe90zrXTjP6ZhTEH4E1y9zL/epJa2ZML1FHGV7VTM+6FE3+ prLDsylzCV9XrGI6BqovmQVgG1ywX9K05vpgqi1VHyEr7dXsV/t1CZfdHA5/pgG89ByL KNSo4mmT/APZqI/1rVzw/emsXweEr0sRTzSLJ2PYSxwa8krZc7G8H8G/dIbIWGsfN0XY Hw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2t4qjhyq1t-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 18 Jun 2019 12:02:50 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1573E31; Tue, 18 Jun 2019 10:02:35 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E590425D7; Tue, 18 Jun 2019 10:02:34 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:35 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:33 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" Subject: [PATCH 1/5] serial: stm32: add support of timeout interrupt for RX Date: Tue, 18 Jun 2019 12:02:22 +0200 Message-ID: <1560852146-3393-2-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560852146-3393-1-git-send-email-erwan.leray@st.com> References: <1560852146-3393-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_05:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_030254_371586_A24E8A0D X-CRM114-Status: GOOD ( 15.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Erwan Le Ray , linux-serial@vger.kernel.org, Gerald Baeza , Fabrice Gasnier , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support of RX timeout interrupts to limit the number of interrupts. RX timeout is a number of bits (baud clock cycles) without transmission seen in the receiver. One character is used as an arbitrary RX timeout value. If parity is enabled, the number of bits has to include parity bit. Signed-off-by: Gerald Baeza Signed-off-by: Fabrice Gasnier Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 9c2b04e..e1cfb1e 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -437,6 +437,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr) sr = readl_relaxed(port->membase + ofs->isr); + if ((sr & USART_SR_RTOF) && ofs->icr != UNDEF_REG) + writel_relaxed(USART_ICR_RTOCF, + port->membase + ofs->icr); + if ((sr & USART_SR_WUF) && (ofs->icr != UNDEF_REG)) writel_relaxed(USART_ICR_WUCF, port->membase + ofs->icr); @@ -523,7 +527,7 @@ static void stm32_throttle(struct uart_port *port) unsigned long flags; spin_lock_irqsave(&port->lock, flags); - stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE); + stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); spin_unlock_irqrestore(&port->lock, flags); } @@ -535,7 +539,7 @@ static void stm32_unthrottle(struct uart_port *port) unsigned long flags; spin_lock_irqsave(&port->lock, flags); - stm32_set_bits(port, ofs->cr1, USART_CR1_RXNEIE); + stm32_set_bits(port, ofs->cr1, stm32_port->cr1_irq); spin_unlock_irqrestore(&port->lock, flags); } @@ -545,7 +549,7 @@ static void stm32_stop_rx(struct uart_port *port) struct stm32_port *stm32_port = to_stm32_port(port); struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; - stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE); + stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); } /* Handle breaks - ignored by us */ @@ -567,7 +571,7 @@ static int stm32_startup(struct uart_port *port) if (ret) return ret; - val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; + val = stm32_port->cr1_irq | USART_CR1_TE | USART_CR1_RE; if (stm32_port->fifoen) val |= USART_CR1_FIFOEN; stm32_set_bits(port, ofs->cr1, val); @@ -583,7 +587,8 @@ static void stm32_shutdown(struct uart_port *port) u32 val, isr; int ret; - val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE; + val = USART_CR1_TXEIE | USART_CR1_TE; + val |= stm32_port->cr1_irq | USART_CR1_RE; val |= BIT(cfg->uart_enable_bit); if (stm32_port->fifoen) val |= USART_CR1_FIFOEN; @@ -653,7 +658,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, /* Stop serial port and reset value */ writel_relaxed(0, port->membase + ofs->cr1); - cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE; + cr1 = USART_CR1_TE | USART_CR1_RE; if (stm32_port->fifoen) cr1 |= USART_CR1_FIFOEN; @@ -686,6 +691,19 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, dev_dbg(port->dev, "Unsupported data bits config: %u bits\n" , bits); + if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch || + stm32_port->fifoen)) { + if (cflag & CSTOPB) + bits = bits + 3; /* 1 start bit + 2 stop bits */ + else + bits = bits + 2; /* 1 start bit + 1 stop bit */ + + /* RX timeout irq to occur after last stop bit + bits */ + stm32_port->cr1_irq = USART_CR1_RTOIE; + writel_relaxed(bits, port->membase + ofs->rtor); + cr2 |= USART_CR2_RTOEN; + } + if (cflag & PARODD) cr1 |= USART_CR1_PS; @@ -925,6 +943,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev) stm32_ports[id].hw_flow_control = of_property_read_bool(np, "st,hw-flow-ctrl"); stm32_ports[id].port.line = id; + stm32_ports[id].cr1_irq = USART_CR1_RXNEIE; stm32_ports[id].last_res = RX_BUF_L; return &stm32_ports[id]; } diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index 30d2433..fcd01fe 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -249,6 +249,7 @@ struct stm32_port { struct dma_chan *tx_ch; /* dma tx channel */ dma_addr_t tx_dma_buf; /* dma tx buffer bus address */ unsigned char *tx_buf; /* dma tx buffer cpu address */ + u32 cr1_irq; /* USART_CR1_RXNEIE or RTOIE */ int last_res; bool tx_dma_busy; /* dma tx busy */ bool hw_flow_control; From patchwork Tue Jun 18 10:02:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 11001345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E9B36924 for ; Tue, 18 Jun 2019 10:03:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D33C228A1D for ; Tue, 18 Jun 2019 10:03:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C174328A27; Tue, 18 Jun 2019 10:03:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 58FDE28A1D for ; Tue, 18 Jun 2019 10:03:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XvZPwEEhVP/slvrLaCKisMvfnMxyeLa3ro0aKuTqjC4=; b=qo6KqcqFNfNVzX 9XPHddzhocl9OdLCRT7lNyD0yTFSCF7BRwMbG5fRbPwWXBfaRwgxlX9Q7EZm28JOwSCqaawRPinID s8GI34982bqnJX9ckDvA6YrVh0rvId8MnL9V+wJ20lq9o9OoqwmWhjjArSs8N2bncDSrrSNJg80eX AMZLQ0j7Njo6yq726ODN7qpH5F9n5W9JDwkdOPeD3Ardb3sj7WQxe/DckzhctvoKy3uPS2CZgMM6g ZIxCLuafQcwkgnD/cEZVbCze0i8E28UOAsFtgmgv62YY5n5Y1lh3ALAGiaVASf2PBWAh5gecDo2lm yUQKUegwqoJSfJtCgU9Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx7-0004xf-Q1; Tue, 18 Jun 2019 10:02:57 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx3-0004uv-KD for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 10:02:55 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5I9ug4W007561; Tue, 18 Jun 2019 12:02:37 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=h01JWVwcjqILFh4YSO7W65sajs6sEQaVQ79mN3RX8qQ=; b=QLNmM8Ym6XwFgwWEWHrCnihEcWc1VtywI4qxDJ1y07gq6pLzS6LqMBnyj+bx4Bz4vXzd /TauvCyjVPOhiJO1QvGhcOV9gNzPdMDgl/GxNPp4z5LOLi4df/L7Z1FttIduxDTgwc/5 +rvAI7NUxvqoGC+yZ9akFbW1Mqqn3IAsKFMW42TK/ijPpv/W9zYZW5UtN1QbZr82blPr ecRstm6j6+unZ/8cvQeAe/NkKYJVT5fy9fmxLvP5GitcPz3ZfWMEkMcjagxZRRWcyzpD xQop4ni9R2rTwxlJiJRvhUxq6sRrqRYCZYrkiR7qtt/S4V3reILsXQ6wTStX/5lhAhy1 8Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2t4nt883jd-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 18 Jun 2019 12:02:37 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7A74438; Tue, 18 Jun 2019 10:02:36 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 59DB025D7; Tue, 18 Jun 2019 10:02:36 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:36 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:35 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" Subject: [PATCH 2/5] serial: stm32: update PIO transmission Date: Tue, 18 Jun 2019 12:02:23 +0200 Message-ID: <1560852146-3393-3-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560852146-3393-1-git-send-email-erwan.leray@st.com> References: <1560852146-3393-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_05:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_030253_971244_7805B6A4 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Erwan Le Ray , linux-serial@vger.kernel.org, Fabrice Gasnier , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Improves PIO transmission: - Replaces the FIFO filling per character by a filling per blocks of characters, which provides better performances - Replaces the active waiting loop by TX empty interrupt dynamic handling. TXE interrupt is now enabled when data has to be sent (ie when uart_circ is not empty), and inhibited when there is no more data to send (ie when uart_circ is empty). Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index e1cfb1e..8316e19 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -303,27 +303,26 @@ static void stm32_transmit_chars_pio(struct uart_port *port) struct stm32_port *stm32_port = to_stm32_port(port); struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; struct circ_buf *xmit = &port->state->xmit; - unsigned int isr; - int ret; if (stm32_port->tx_dma_busy) { stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT); stm32_port->tx_dma_busy = false; } - ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr, - isr, - (isr & USART_SR_TXE), - 10, 100000); - - if (ret) - dev_err(port->dev, "tx empty not set\n"); - - stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); + while (!uart_circ_empty(xmit)) { + /* Check that TDR is empty before filling FIFO */ + if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE)) + break; + writel_relaxed(xmit->buf[xmit->tail], port->membase + ofs->tdr); + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + port->icount.tx++; + } - writel_relaxed(xmit->buf[xmit->tail], port->membase + ofs->tdr); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; + /* rely on TXE irq (mask or unmask) for sending remaining data */ + if (uart_circ_empty(xmit)) + stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); + else + stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); } static void stm32_transmit_chars_dma(struct uart_port *port) From patchwork Tue Jun 18 10:02:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 11001347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CEC7314BB for ; Tue, 18 Jun 2019 10:03:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC45428A1D for ; Tue, 18 Jun 2019 10:03:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B03E028A27; Tue, 18 Jun 2019 10:03:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2211328A1D for ; Tue, 18 Jun 2019 10:03:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/nS9y9kBesqid+lmuGGE74OPOdPmsTdnoumXtOYAO/o=; b=EIVLtiF45Euvdz yLTzyFfaKvXQoO4Vd0/ftrxt3peYZotTe5DiISaGu7plsSRg7ZXQjVComWSUzbQafNrvJdbalRkbw 43PLCndxQfYBEcoX7100uPbvt5qQALWOk26AHN8XYQl3rnp0F+3dbYaHPXVGwONEEVFGL66MLy+Ax CW6/xuZV82l0gEwg0qgYPNupPfmahTEh3g2oceJMeZuiAXMZpuUD/1itFEDl2OZSZQXyHotFsvjxf EpH6k0xXMjAI8KKkdBGnjjKS3Hwo+1+Qa0HxYLBBGoEpvk1+7jNG4+Vn8Ahv43chn8dvhYhJ1ZeUJ F/mbpraKK4J4MoNUDaTg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdAxI-00057b-Ug; Tue, 18 Jun 2019 10:03:08 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx3-0004w5-SW for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 10:02:55 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5IA2pAE007240; Tue, 18 Jun 2019 12:02:52 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=KyPIftAgE9NM9O+rf5bz9aF47OIgAwyV9NGcZI0jZxs=; b=x2LnvwY6EzQJJLZ5fD2I/0Wn4qSkdaJ1VktYw/OpvGEntaedT8O0UzvaY2W4E38Tn+dA 91IrN1IAJ9oAV3OIbZKLlyU9PJHoPl+j14VLeuMmcQ1INx8/7mIubfAFYQQCJN/cnpmf 7Gq9q4YZD62HXwubKSgNnsjVE/74sPVQZ0F5mFl95OajjkQdi8xxBX+WDaLUSzSW7e8k dVE6QMRie9lOFbMCIUorKg5+nRgYFaoDAq2W7ywsZLq0nOBIPbcqpLYcQ2o0bh0v3WVU hompfFdCeFwkWU3T+zeRGQTgP8gKnk0/y9AiNJMr/Z28J4+eVqpWCYHuHetNcAmwUoaP nw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t4peu7myn-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 18 Jun 2019 12:02:51 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8819234; Tue, 18 Jun 2019 10:02:41 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 662AC25DD; Tue, 18 Jun 2019 10:02:41 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:41 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:40 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" Subject: [PATCH 3/5] serial: stm32: add support of TX FIFO threshold Date: Tue, 18 Jun 2019 12:02:24 +0200 Message-ID: <1560852146-3393-4-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560852146-3393-1-git-send-email-erwan.leray@st.com> References: <1560852146-3393-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_05:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_030254_213807_B8B1A33E X-CRM114-Status: GOOD ( 16.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Erwan Le Ray , linux-serial@vger.kernel.org, Fabrice Gasnier , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Adds the support of TX FIFO threshold in order to improve the TX FIFO management: - TX FIFO threshold irq enabling (instead of relying on tx empty / fifo not full irq that generates one irq/char) - TXCFG is set to half fifo size (e.g. 16/2 = 8 data for a 16 data depth FIFO) - irq rate may be reduced by up to 1/TXCFG, e.g. 1 over 8 with current TXCFG setting. Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 8316e19..397d86d 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -298,6 +298,32 @@ static void stm32_tx_dma_complete(void *arg) stm32_transmit_chars(port); } +static void stm32_tx_interrupt_enable(struct uart_port *port) +{ + struct stm32_port *stm32_port = to_stm32_port(port); + struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; + + /* + * Enables TX FIFO threashold irq when FIFO is enabled, + * or TX empty irq when FIFO is disabled + */ + if (stm32_port->fifoen) + stm32_set_bits(port, ofs->cr3, USART_CR3_TXFTIE); + else + stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); +} + +static void stm32_tx_interrupt_disable(struct uart_port *port) +{ + struct stm32_port *stm32_port = to_stm32_port(port); + struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; + + if (stm32_port->fifoen) + stm32_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE); + else + stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); +} + static void stm32_transmit_chars_pio(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); @@ -320,9 +346,9 @@ static void stm32_transmit_chars_pio(struct uart_port *port) /* rely on TXE irq (mask or unmask) for sending remaining data */ if (uart_circ_empty(xmit)) - stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); + stm32_tx_interrupt_disable(port); else - stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); + stm32_tx_interrupt_enable(port); } static void stm32_transmit_chars_dma(struct uart_port *port) @@ -404,7 +430,7 @@ static void stm32_transmit_chars(struct uart_port *port) } if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); + stm32_tx_interrupt_disable(port); return; } @@ -422,7 +448,7 @@ static void stm32_transmit_chars(struct uart_port *port) uart_write_wakeup(port); if (uart_circ_empty(xmit)) - stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); + stm32_tx_interrupt_disable(port); } static irqreturn_t stm32_interrupt(int irq, void *ptr) @@ -501,10 +527,7 @@ static unsigned int stm32_get_mctrl(struct uart_port *port) /* Transmit stop */ static void stm32_stop_tx(struct uart_port *port) { - struct stm32_port *stm32_port = to_stm32_port(port); - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; - - stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); + stm32_tx_interrupt_disable(port); } /* There are probably characters waiting to be transmitted. */ @@ -575,6 +598,13 @@ static int stm32_startup(struct uart_port *port) val |= USART_CR1_FIFOEN; stm32_set_bits(port, ofs->cr1, val); + if (stm32_port->fifoen) { + val = readl_relaxed(port->membase + ofs->cr3); + val &= ~USART_CR3_TXFTCFG_MASK; + val |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT; + writel_relaxed(val, port->membase + ofs->cr3); + } + return 0; } @@ -662,7 +692,9 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, if (stm32_port->fifoen) cr1 |= USART_CR1_FIFOEN; cr2 = 0; - cr3 = 0; + cr3 = readl_relaxed(port->membase + ofs->cr3); + cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG | USART_CR3_RXFTIE + | USART_CR3_TXFTCFG_MASK; if (cflag & CSTOPB) cr2 |= USART_CR2_STOP_2B; @@ -869,6 +901,7 @@ static int stm32_init_port(struct stm32_port *stm32port, port->flags = UPF_BOOT_AUTOCONF; port->ops = &stm32_uart_ops; port->dev = &pdev->dev; + port->fifosize = stm32port->info->cfg.fifosize; ret = platform_get_irq(pdev, 0); if (ret <= 0) { diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index fcd01fe..a598446 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -27,6 +27,7 @@ struct stm32_usart_config { bool has_7bits_data; bool has_wakeup; bool has_fifo; + int fifosize; }; struct stm32_usart_info { @@ -54,6 +55,7 @@ struct stm32_usart_info stm32f4_info = { .cfg = { .uart_enable_bit = 13, .has_7bits_data = false, + .fifosize = 1, } }; @@ -74,6 +76,7 @@ struct stm32_usart_info stm32f7_info = { .cfg = { .uart_enable_bit = 0, .has_7bits_data = true, + .fifosize = 1, } }; @@ -96,6 +99,7 @@ struct stm32_usart_info stm32h7_info = { .has_7bits_data = true, .has_wakeup = true, .has_fifo = true, + .fifosize = 16, } }; @@ -204,6 +208,15 @@ struct stm32_usart_info stm32h7_info = { #define USART_CR3_WUS_MASK GENMASK(21, 20) /* H7 */ #define USART_CR3_WUS_START_BIT BIT(21) /* H7 */ #define USART_CR3_WUFIE BIT(22) /* H7 */ +#define USART_CR3_TXFTIE BIT(23) /* H7 */ +#define USART_CR3_TCBGTIE BIT(24) /* H7 */ +#define USART_CR3_RXFTCFG GENMASK(27, 25) /* H7 */ +#define USART_CR3_RXFTIE BIT(28) /* H7 */ +#define USART_CR3_TXFTCFG_MASK GENMASK(31, 29) /* H7 */ +#define USART_CR3_TXFTCFG_SHIFT 29 /* H7 */ + +/* TX FIFO threashold set to half of its depth */ +#define USART_CR3_TXFTCFG_HALF 0x2 /* USART_GTPR */ #define USART_GTPR_PSC_MASK GENMASK(7, 0) From patchwork Tue Jun 18 10:02:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 11001355 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15E24924 for ; Tue, 18 Jun 2019 10:04:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 02F4F28A27 for ; Tue, 18 Jun 2019 10:04:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB69128A29; Tue, 18 Jun 2019 10:04:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 716AC28A27 for ; Tue, 18 Jun 2019 10:04:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YJ0oKEj9Xq+gMcPG4VcaXh7BDV9cik8T/Duhnz+8Up8=; b=nDjPQ1ak1pn15Q yjkmZg7zM0ndaij01+V9WSbfuLNIcPAfmAWrv1EZPG5Xn1J+JHqcOPo3Rp6cG6u0ziqDIVqYPK3Xj NCMcgJZEr1Z3qyIcqPvZosiEw/6Pub1hZrFpzxiJn4Voz9Z1yswd+TOxC0+ZYg2Cxcy8Jpu2FH96N phRmuL3C4HKUZ4N7um9z2VxuW7LcAvEl0XNnKoaABuFa9f2jPVLHwjDHthiUvTs7WxSER1Hyd1Cit BoHvJbVfDaPzYuTzRup9IUb52Ww9ogjHP+z/QYnvT4ab9saDOp39kQv8nUEuN1bRhPUUSYmFI+4+2 d/gKq5h/XdTyta0o4ofw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdAyW-0006Vt-SB; Tue, 18 Jun 2019 10:04:24 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx9-0004vN-V9 for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 10:03:02 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5IA1k9d030829; Tue, 18 Jun 2019 12:02:43 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=Z42l/er6av5f1snpxyojUBAWUdIxDz7JA7iDhJQHpuU=; b=eUVMYnKoUvAm+F86HXEetOou9H/SsPwQcTj1OD9rJ6Z65p176NxdFstUI/E5T3yJYVcY VEPVkRDix8zqfuR3UdNA3cR09jyOcs2ZR5e/M++sE+car9/c6z+ZTBKq72S7LmmZQDj9 pW9Pjx45EDcmya/baNQ8peZc0CfDCv+N3GH5qjTCMZiQnSk0RcYn5ma8885BU81wmzuT r+iRX5mmBHNpS7a2WRSOX1z5/xzs+44WPLFKjFFTEouT63Nb+vVgfCM7f6lcK4XA9kJc PhbwntXbx9WnZE3YAIL3kcPA2d+2gl4Cz3mmpQoMqx+7/WW3/UW7pL57S1HFzVY8tuzk 0w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t68n3nv0a-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 18 Jun 2019 12:02:43 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A81223A; Tue, 18 Jun 2019 10:02:42 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7F25F25DD; Tue, 18 Jun 2019 10:02:42 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas22.st.com (10.75.90.92) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:42 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:42 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" Subject: [PATCH 4/5] serial: stm32: add support of RX FIFO threshold Date: Tue, 18 Jun 2019 12:02:25 +0200 Message-ID: <1560852146-3393-5-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560852146-3393-1-git-send-email-erwan.leray@st.com> References: <1560852146-3393-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_05:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_030300_399947_FC94635E X-CRM114-Status: GOOD ( 14.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Erwan Le Ray , linux-serial@vger.kernel.org, Fabrice Gasnier , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Adds the support of RX FIFO threshold in order to improve the RX FIFO management. This is done by enabling fifo threshold interrupt, instead of relying on rx empty/fifo not full irq. That basically generates one irq/char currently. With this patch: - RXCFG is set to half fifo size (e.g. 16/2 = 8 data for a 16 data depth FIFO) - irq rate may be reduced by up to 1/RXCFG, e.g. 1 over 8 with current RXCFG setting. - Receiver timeout is used to gather chars when FIFO threshold isn't reached. Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 397d86d..4083145 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -550,6 +550,9 @@ static void stm32_throttle(struct uart_port *port) spin_lock_irqsave(&port->lock, flags); stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); + if (stm32_port->cr3_irq) + stm32_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); + spin_unlock_irqrestore(&port->lock, flags); } @@ -562,6 +565,9 @@ static void stm32_unthrottle(struct uart_port *port) spin_lock_irqsave(&port->lock, flags); stm32_set_bits(port, ofs->cr1, stm32_port->cr1_irq); + if (stm32_port->cr3_irq) + stm32_set_bits(port, ofs->cr3, stm32_port->cr3_irq); + spin_unlock_irqrestore(&port->lock, flags); } @@ -572,6 +578,9 @@ static void stm32_stop_rx(struct uart_port *port) struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); + if (stm32_port->cr3_irq) + stm32_clr_bits(port, ofs->cr3, stm32_port->cr3_irq); + } /* Handle breaks - ignored by us */ @@ -600,8 +609,9 @@ static int stm32_startup(struct uart_port *port) if (stm32_port->fifoen) { val = readl_relaxed(port->membase + ofs->cr3); - val &= ~USART_CR3_TXFTCFG_MASK; + val &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK); val |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT; + val |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT; writel_relaxed(val, port->membase + ofs->cr3); } @@ -693,7 +703,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, cr1 |= USART_CR1_FIFOEN; cr2 = 0; cr3 = readl_relaxed(port->membase + ofs->cr3); - cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG | USART_CR3_RXFTIE + cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE | USART_CR3_TXFTCFG_MASK; if (cflag & CSTOPB) @@ -733,8 +743,14 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, stm32_port->cr1_irq = USART_CR1_RTOIE; writel_relaxed(bits, port->membase + ofs->rtor); cr2 |= USART_CR2_RTOEN; + /* Not using dma, enable fifo threshold irq */ + if (!stm32_port->rx_ch) + stm32_port->cr3_irq = USART_CR3_RXFTIE; } + cr1 |= stm32_port->cr1_irq; + cr3 |= stm32_port->cr3_irq; + if (cflag & PARODD) cr1 |= USART_CR1_PS; @@ -976,6 +992,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev) "st,hw-flow-ctrl"); stm32_ports[id].port.line = id; stm32_ports[id].cr1_irq = USART_CR1_RXNEIE; + stm32_ports[id].cr3_irq = 0; stm32_ports[id].last_res = RX_BUF_L; return &stm32_ports[id]; } diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index a598446..a175c10 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -210,7 +210,8 @@ struct stm32_usart_info stm32h7_info = { #define USART_CR3_WUFIE BIT(22) /* H7 */ #define USART_CR3_TXFTIE BIT(23) /* H7 */ #define USART_CR3_TCBGTIE BIT(24) /* H7 */ -#define USART_CR3_RXFTCFG GENMASK(27, 25) /* H7 */ +#define USART_CR3_RXFTCFG_MASK GENMASK(27, 25) /* H7 */ +#define USART_CR3_RXFTCFG_SHIFT 25 /* H7 */ #define USART_CR3_RXFTIE BIT(28) /* H7 */ #define USART_CR3_TXFTCFG_MASK GENMASK(31, 29) /* H7 */ #define USART_CR3_TXFTCFG_SHIFT 29 /* H7 */ @@ -218,6 +219,9 @@ struct stm32_usart_info stm32h7_info = { /* TX FIFO threashold set to half of its depth */ #define USART_CR3_TXFTCFG_HALF 0x2 +/* RX FIFO threashold set to half of its depth */ +#define USART_CR3_RXFTCFG_HALF 0x2 + /* USART_GTPR */ #define USART_GTPR_PSC_MASK GENMASK(7, 0) #define USART_GTPR_GT_MASK GENMASK(15, 8) @@ -263,6 +267,7 @@ struct stm32_port { dma_addr_t tx_dma_buf; /* dma tx buffer bus address */ unsigned char *tx_buf; /* dma tx buffer cpu address */ u32 cr1_irq; /* USART_CR1_RXNEIE or RTOIE */ + u32 cr3_irq; /* USART_CR3_RXFTIE */ int last_res; bool tx_dma_busy; /* dma tx busy */ bool hw_flow_control; From patchwork Tue Jun 18 10:02:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 11001351 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CCB0E14BB for ; Tue, 18 Jun 2019 10:03:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B9CCB28A27 for ; Tue, 18 Jun 2019 10:03:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AE58D28A29; Tue, 18 Jun 2019 10:03:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4EA5728A27 for ; Tue, 18 Jun 2019 10:03:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hWNMo2nP0QXHUrM7nSt8diifqk5ex9tk0UF9RE806uk=; b=CWxvnOnDVFoGaf kwEsCjVbf32V6IzLSwwrIcnJsR/Y4BlnDbcNbHqJWAT1RwZEiooJPn1nekLlvoAKAZ/ZMdlEw0XqL DJjeprV3w0HZdN+y+IhPIiUCen95gwUasBGJaKpGR+nCVMJ9RXp5p5LxyBJZtIAc8V9Besx4cPLpt W5NJNm9vhPbBR8fo3A7rB/nUPtQm6yr3ClWQ/xNjl7k0dHG9HLkYhilJLYVV/ba/paQJutyeDv07V bduPvLSKFX4xwhHrvwA8OCuj83yn6y2As42dJSGWRIJD2NfY50yXMcdn12L0pHPHvrB2F1gfy66db 7BnWg+varh9PJxIqJorA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hdAxy-0005tt-Vz; Tue, 18 Jun 2019 10:03:50 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hdAx4-0004vZ-L4 for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2019 10:02:56 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5IA1kqT030835; Tue, 18 Jun 2019 12:02:45 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=ZNwrI9/E19QXLogxcwXLV+/wtFzsSvuPA6hnm0JPcRM=; b=pKMdFCu6z9l+iNvnnuFWzm/ITOJ4O7pD3VwiAG1XRPj/EB74vBLEw9mGVCi62jp2V5X5 RjADxoXBtw/U9b/GCXEAfxfHiMYwkJXGI5Gn6qLPyYbpQc+I0Qo6stg4MqxSDer2tBN5 L4mqGeMTarLq8Kl/+5adGTt4SDB9/1dBIKMgdYNmSS870lUw+A8L2npVXeztPIxUIRmp 1cAEHe/3YSBft1VMmwYslw9wRl3BTvDm25TYlOGgdzrrYZGmU9CmzZs6zsFXvgM4Ec9x TIpUF7DcIxoi1jwFxLdZ1vc8OlxFpsDDMs5FplvHeTTLvb5lpfNAHiRdaXy4EmSC+oy3 HA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t68n3nv0e-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 18 Jun 2019 12:02:45 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C84553A; Tue, 18 Jun 2019 10:02:43 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A704725DD; Tue, 18 Jun 2019 10:02:43 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:43 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 18 Jun 2019 12:02:43 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" Subject: [PATCH 5/5] serial: stm32: add RX and TX FIFO flush Date: Tue, 18 Jun 2019 12:02:26 +0200 Message-ID: <1560852146-3393-6-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560852146-3393-1-git-send-email-erwan.leray@st.com> References: <1560852146-3393-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-18_05:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_030254_991542_DD0BC9BA X-CRM114-Status: GOOD ( 14.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Erwan Le Ray , linux-serial@vger.kernel.org, Fabrice Gasnier , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Adds a flush of RX and TX FIFOs, and fixes some errors: - adds RX FIFO flush in startup fonction - removes the useless transmitter enabling in startup fonction (e.g. receiver only, see Documentation/serial/driver) - configures FIFO threshold before enabling it, rather than after - flushes both TX and RX in set_termios function Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 4083145..21dc380 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -602,11 +602,11 @@ static int stm32_startup(struct uart_port *port) if (ret) return ret; - val = stm32_port->cr1_irq | USART_CR1_TE | USART_CR1_RE; - if (stm32_port->fifoen) - val |= USART_CR1_FIFOEN; - stm32_set_bits(port, ofs->cr1, val); + /* RX FIFO Flush */ + if (ofs->rqr != UNDEF_REG) + stm32_set_bits(port, ofs->rqr, USART_RQR_RXFRQ); + /* Tx and RX FIFO configuration */ if (stm32_port->fifoen) { val = readl_relaxed(port->membase + ofs->cr3); val &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK); @@ -615,6 +615,12 @@ static int stm32_startup(struct uart_port *port) writel_relaxed(val, port->membase + ofs->cr3); } + /* RX FIFO enabling */ + val = stm32_port->cr1_irq | USART_CR1_RE; + if (stm32_port->fifoen) + val |= USART_CR1_FIFOEN; + stm32_set_bits(port, ofs->cr1, val); + return 0; } @@ -697,8 +703,12 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, /* Stop serial port and reset value */ writel_relaxed(0, port->membase + ofs->cr1); - cr1 = USART_CR1_TE | USART_CR1_RE; + /* flush RX & TX FIFO */ + if (ofs->rqr != UNDEF_REG) + stm32_set_bits(port, ofs->rqr, + USART_RQR_TXFRQ | USART_RQR_RXFRQ); + cr1 = USART_CR1_TE | USART_CR1_RE; if (stm32_port->fifoen) cr1 |= USART_CR1_FIFOEN; cr2 = 0;