From patchwork Mon Jun 24 14:42:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sreekanth Reddy X-Patchwork-Id: 11013565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF932112C for ; Mon, 24 Jun 2019 14:43:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D122C28899 for ; Mon, 24 Jun 2019 14:43:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C514028BF3; Mon, 24 Jun 2019 14:43:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6C55A28C00 for ; Mon, 24 Jun 2019 14:43:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730237AbfFXOnM (ORCPT ); Mon, 24 Jun 2019 10:43:12 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:35367 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727641AbfFXOnM (ORCPT ); Mon, 24 Jun 2019 10:43:12 -0400 Received: by mail-pg1-f194.google.com with SMTP id s27so7248544pgl.2 for ; Mon, 24 Jun 2019 07:43:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=urA4pdWuWd6tf9IQ2Z5lWYjHQew0QaOk1+ndmni+EOE=; b=HPOC5OVy+mxVENgqavAlzWuiFuwqRRro+l0NjraqjlnwN8Zvb9cNGvw5boW+v+Zpan Zto6U1ClJUY3cEwp3lQqXQLw0TWHTLD2GpPy6H0Nicz76s/3tBkFkBujljbSTG/eyJSo MAiQZTOSoA57ZTjxLi7fs1isJN8SSltKi+kiI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=urA4pdWuWd6tf9IQ2Z5lWYjHQew0QaOk1+ndmni+EOE=; b=aNM1qrN471zf0RfUVkJ2CcKf+7b0cwGVpDrGQxfnyvIKMw+aRf6oa0KJjjbkIAEB/g jK7AJzJ8/ODU7lVz/M0VQWYZP3CcGyEAQhqL7C+Mbheam5nGJTTxmF+OUpCs4us4k2cm zewFC/p3Yt0D6VH4UxWMG+ACxw7IOj0J7+sKffwYUTuiQtRVv+i5RBGBz8bO96ic657T a36w4y3Q7SfFClag4xD8W26dpWeMRNahpWvgy8PAxV4sskbO1OkaRmFC3I/KV3ykteJf fPYN1WrEj/FLwJUA8dYM8cItYXsBXXdl2pp7Yxzi1r6SiomegX2ktCsD3bPXFtFui75Z aFdw== X-Gm-Message-State: APjAAAU2z1727PIStrdYB1oeSZQVOLRXAe4w5L9wt/TWzoCWWx1l5Td5 zwinL9G466cScfbpvM1phzDRNg== X-Google-Smtp-Source: APXvYqyNcNl1HsJQpfGHp6gn51hQmovZnp4CvA0iz3lV5hXVIc97Ee4PhLyBHJ0fs/WKxPI9+y1mXA== X-Received: by 2002:a17:90a:350c:: with SMTP id q12mr25431859pjb.46.1561387391367; Mon, 24 Jun 2019 07:43:11 -0700 (PDT) Received: from dhcp-10-123-20-15.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id k197sm12991799pgc.22.2019.06.24.07.43.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Jun 2019 07:43:10 -0700 (PDT) From: Sreekanth Reddy To: martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, suganath-prabu.subramani@broadcom.com, sathya.prakash@broadcom.com, Sreekanth Reddy Subject: [PATCH 1/4] mpt3sas: Remove CPU arch check to determine perf_mode Date: Mon, 24 Jun 2019 10:42:53 -0400 Message-Id: <1561387376-28323-2-git-send-email-sreekanth.reddy@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> References: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently default perf_mode is set to 'balanced' on Intel architecture machines and on other machines default perf_mode is set to 'latency' mode. Now this CPU architecture check is removed while determining the perf_mode. And default perf_mode mode is set to 'balanced' mode on all machines. User can choose the required performance mode using perf_mode module parameter. Signed-off-by: Sreekanth Reddy --- drivers/scsi/mpt3sas/mpt3sas_base.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index cae7441..d55f134 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -113,8 +113,7 @@ MODULE_PARM_DESC(perf_mode, "interrupt coalescing is enabled on all queues,\n\t\t" "2 - latency: high iops mode is disabled &\n\t\t" "interrupt coalescing is enabled on all queues with timeout value 0xA,\n" - "\t\tdefault - on Intel architecture, default perf_mode is\n\t\t" - " 'balanced' and in others architectures the default mode is 'latency'" + "\t\tdefault - default perf_mode is 'balanced'" ); enum mpt3sas_perf_mode { @@ -2990,19 +2989,6 @@ _base_check_and_enable_high_iops_queues(struct MPT3SAS_ADAPTER *ioc, if (perf_mode == MPT_PERF_MODE_DEFAULT) { -#if defined(CONFIG_X86) - /* - * Use global variable boot_cpu_data.x86_vendor to - * determine whether the architecture is Intel or not. - */ - if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { - ioc->high_iops_queues = 0; - return; - } -#else - ioc->high_iops_queues = 0; - return; -#endif speed = pcie_get_speed_cap(ioc->pdev); dev_info(&ioc->pdev->dev, "PCIe device speed is %s\n", speed == PCIE_SPEED_2_5GT ? "2.5GHz" : From patchwork Mon Jun 24 14:42:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sreekanth Reddy X-Patchwork-Id: 11013563 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A920A924 for ; Mon, 24 Jun 2019 14:43:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B1FE28C03 for ; Mon, 24 Jun 2019 14:43:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8FD0328C0A; Mon, 24 Jun 2019 14:43:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 26C3628BF3 for ; Mon, 24 Jun 2019 14:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730279AbfFXOnO (ORCPT ); Mon, 24 Jun 2019 10:43:14 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:42292 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730259AbfFXOnO (ORCPT ); Mon, 24 Jun 2019 10:43:14 -0400 Received: by mail-pl1-f194.google.com with SMTP id ay6so6980878plb.9 for ; Mon, 24 Jun 2019 07:43:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7iZ9ehHlIvmBorBohkBuydVhwFmdpy7sDBaqRwPxVwo=; b=AO42MT7hPkzLjlOYcOSux7wPabHyIRs+B7SIHpGPBEjLp02XQuBc5/8oRG4G7b0N7t yj7SUid5XkRPwEcaERXWELqdqjp3VuC+KerwjpQsN9ZBa5JG5qVaDvZnrNotBA8WVzhk G/fHYVkRqPo42K/SBGOUwUkfZmFy84ASf9P7w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7iZ9ehHlIvmBorBohkBuydVhwFmdpy7sDBaqRwPxVwo=; b=SqGER4QqD6pF+rdMNx//X3pAT022wtaDqMbGD/xyi8Ysz5izl44eYe9ckLwCgKAqT/ 9/Je+4CREyfxSyn2yhB4YLXSNd7PL8T8ya9pemdeahhFiBlI3qXrBaZRat1sxEp/b1kr 7/enDHSiO6C1j1+Cr7uTrmp/rRAa+saosXsTSQ5zJHc0dDwZX3k9r5t+JWXEChS6Nqjw bai3UhLdskeIEHY67RBVLadsr9cRzd3Kpv+6l7O9+JsyOSI7GnLD16Lv8AaBxpFyQyCt CsCQ17n3TXOs5oB3GXatlRLVk9fv/tZ813zgCq1vYxROfTuAHZTa602NjRm4dWP4fMRq picA== X-Gm-Message-State: APjAAAWvEprO/C7EjdPv1coOxEJYXV+icJa2eki024QXtnmCZFshWOgd dxHgURVvSUmVtwvSQzVm9FebYg== X-Google-Smtp-Source: APXvYqzAxQsriwWr74oQS1WPtJD7POvTqyNBKz066dgBgXk2z1ISXTFvk1gWYYP67aZfRjOEwYjfRQ== X-Received: by 2002:a17:902:2862:: with SMTP id e89mr13602561plb.258.1561387393478; Mon, 24 Jun 2019 07:43:13 -0700 (PDT) Received: from dhcp-10-123-20-15.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id k197sm12991799pgc.22.2019.06.24.07.43.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Jun 2019 07:43:12 -0700 (PDT) From: Sreekanth Reddy To: martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, suganath-prabu.subramani@broadcom.com, sathya.prakash@broadcom.com, Sreekanth Reddy Subject: [PATCH 2/4] mpt3sas: Fix look configured PCIe link speed not cap Date: Mon, 24 Jun 2019 10:42:54 -0400 Message-Id: <1561387376-28323-3-git-send-email-sreekanth.reddy@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> References: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP While enabling high iops queues driver should look for HBA's configured PCIe link speed instead of looking for HBA's max capacity link speed. i.e. Enable high iops queues only if Aero/Sea HBA's configured PCIe link speed is set to 16GT/s speed. Signed-off-by: Sreekanth Reddy --- drivers/scsi/mpt3sas/mpt3sas_base.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index d55f134..8a47e02 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -2979,7 +2979,7 @@ static void _base_check_and_enable_high_iops_queues(struct MPT3SAS_ADAPTER *ioc, int hba_msix_vector_count) { - enum pci_bus_speed speed = PCI_SPEED_UNKNOWN; + u16 lnksta, speed; if (perf_mode == MPT_PERF_MODE_IOPS || perf_mode == MPT_PERF_MODE_LATENCY) { @@ -2989,15 +2989,10 @@ _base_check_and_enable_high_iops_queues(struct MPT3SAS_ADAPTER *ioc, if (perf_mode == MPT_PERF_MODE_DEFAULT) { - speed = pcie_get_speed_cap(ioc->pdev); - dev_info(&ioc->pdev->dev, "PCIe device speed is %s\n", - speed == PCIE_SPEED_2_5GT ? "2.5GHz" : - speed == PCIE_SPEED_5_0GT ? "5.0GHz" : - speed == PCIE_SPEED_8_0GT ? "8.0GHz" : - speed == PCIE_SPEED_16_0GT ? "16.0GHz" : - "Unknown"); + pcie_capability_read_word(ioc->pdev, PCI_EXP_LNKSTA, &lnksta); + speed = lnksta & PCI_EXP_LNKSTA_CLS; - if (speed < PCIE_SPEED_16_0GT) { + if (speed < 0x4) { ioc->high_iops_queues = 0; return; } From patchwork Mon Jun 24 14:42:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sreekanth Reddy X-Patchwork-Id: 11013567 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DC2F112C for ; Mon, 24 Jun 2019 14:43:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F327228448 for ; Mon, 24 Jun 2019 14:43:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F118E28C0A; Mon, 24 Jun 2019 14:43:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 824FC28958 for ; Mon, 24 Jun 2019 14:43:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730283AbfFXOnR (ORCPT ); Mon, 24 Jun 2019 10:43:17 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:37302 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730259AbfFXOnQ (ORCPT ); Mon, 24 Jun 2019 10:43:16 -0400 Received: by mail-pf1-f195.google.com with SMTP id 19so7636037pfa.4 for ; Mon, 24 Jun 2019 07:43:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TboHE8Qaeh99MtheYp4ZuAw9gzWEwuaNtLXGMcwzoCg=; b=BbLBWD+2HQql03rH91swhNfVPoDC+4iZhkRFPtR4oPE0dtYZWo4UIOoif7m6Jd6AKh 6xSvSXb/pY/KH0+NsAy0PnR/c+Uf2Ko3582v/3NheDBMX4Hay4qr/Ats8ME9GxDkkOAR op6LyiBy4KC7S8RVs61u4CPaxhbbYOTatNOS0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TboHE8Qaeh99MtheYp4ZuAw9gzWEwuaNtLXGMcwzoCg=; b=jZmJZXyYlkFcEUyKKnBtOJd+Ew0WMW4m5p9en6jVYCN4RtRXlAnc2NqusJDLdvY1QN 242j9HIwJVGxITJvCXpHcH7OqiFVckixKfPHsPAeAwF6dnNQKlLkODs6TG6C3mCcjbn/ EMZM71xtShaxySKXW8r7va/51zpGeH/NHNjtsGAf9wDPLUDl7jMfJWVvVdyOORQjLdF3 VhadWr+IRts+OCTHVBM+U/ZGO5XeOoTC/s2PBdekpzNpYGm8Dj+L8GfwtmhRrumk69Zx DvhbHvxDZdHIYxY0WdH9YLGVlrIlwFaAc3rbnFiS6ACqHdKKWii00ckVJBA6NpUhC76h KpCg== X-Gm-Message-State: APjAAAWbxeU+e9JfLTtO4KESZRm1Ipu6CnF0o+LOyv4CERYTT8f+/U+L P1mNRTn0vlXo4cNHl3QMwmz8Gg== X-Google-Smtp-Source: APXvYqxxKUoPyj1GbnNLoPMdjzaj9KMrwab0s4xIla+bVf8OdhG2STzvzimbm6JnUgpVugfRe/oqaQ== X-Received: by 2002:a63:fc15:: with SMTP id j21mr33106958pgi.217.1561387395583; Mon, 24 Jun 2019 07:43:15 -0700 (PDT) Received: from dhcp-10-123-20-15.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id k197sm12991799pgc.22.2019.06.24.07.43.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Jun 2019 07:43:15 -0700 (PDT) From: Sreekanth Reddy To: martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, suganath-prabu.subramani@broadcom.com, sathya.prakash@broadcom.com, Sreekanth Reddy Subject: [PATCH 3/4] mpt3sas: Fix determine smp affinity on per HBA basis Date: Mon, 24 Jun 2019 10:42:55 -0400 Message-Id: <1561387376-28323-4-git-send-email-sreekanth.reddy@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> References: <1561387376-28323-1-git-send-email-sreekanth.reddy@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Even though 'smp_affinity_enable' module parameter is enabled, if the number of online CPUs are more than then the number of msix vectors enabled on that HBA then smp affinity settings should be disabled only for this HBA. But currently this smp affinity setting is disabled globally and hence smp affinity will be disabled for the subsequent HBAs even though number of msix vectors enabled for this HBA matches with number of online CPU. To fix this, defined a per HBA variable smp_affinity_enable. Initially this variable is initialized with smp_affinity_enable module parameter value. If this HBA has less number of msix vectors configured when compare to number of online cpus then only this HBA's variable smp_affinity_enable is set to zero. Signed-off-by: Sreekanth Reddy --- drivers/scsi/mpt3sas/mpt3sas_base.c | 10 ++++++---- drivers/scsi/mpt3sas/mpt3sas_base.h | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 8a47e02..722599a 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -2813,7 +2813,7 @@ _base_free_irq(struct MPT3SAS_ADAPTER *ioc) list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { list_del(&reply_q->list); - if (smp_affinity_enable) + if (ioc->smp_affinity_enable) irq_set_affinity_hint(pci_irq_vector(ioc->pdev, reply_q->msix_index), NULL); free_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index), @@ -2898,7 +2898,7 @@ _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc) if (!nr_msix) return; - if (smp_affinity_enable) { + if (ioc->smp_affinity_enable) { /* * set irq affinity to local numa node for those irqs @@ -3033,7 +3033,7 @@ _base_alloc_irq_vectors(struct MPT3SAS_ADAPTER *ioc) struct irq_affinity desc = { .pre_vectors = ioc->high_iops_queues }; struct irq_affinity *descp = &desc; - if (smp_affinity_enable) + if (ioc->smp_affinity_enable) irq_flags |= PCI_IRQ_AFFINITY; else descp = NULL; @@ -3091,7 +3091,7 @@ _base_enable_msix(struct MPT3SAS_ADAPTER *ioc) goto try_ioapic; if (ioc->msix_vector_count < ioc->cpu_count) - smp_affinity_enable = 0; + ioc->smp_affinity_enable = 0; r = _base_alloc_irq_vectors(ioc); if (r < 0) { @@ -6897,6 +6897,8 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc) } } + ioc->smp_affinity_enable = smp_affinity_enable; + ioc->rdpq_array_enable_assigned = 0; ioc->dma_mask = 0; if (ioc->is_aero_ioc) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index 44b8a23..6afbdb0 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -1405,6 +1405,7 @@ struct MPT3SAS_ADAPTER { u8 combined_reply_queue; u8 combined_reply_index_count; + u8 smp_affinity_enable; /* reply post register index */ resource_size_t **replyPostRegisterIndex; From patchwork Mon Jun 24 14:42:56 2019 Content-Type: text/plain; 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Earlier msix load balance used to enable if the number of online cpus are greater than the number of MSIX vectors enabled on the HBA. Combined reply queue mode will be disabled only on those HBA which works in shared resources mode. i.e. on SAS3 HBAs it will be <= 8 and on SAS35 HBA devices it will be <= 16. - Before this patch if system has 256 logical CPU and HBA expose 128 MSIx vector, driver will enable msix load balance. - After this patch if system has 256 logical CPU and HBA expose 128 MSIx vector, driver will disable msix load balance. - After this patch if system has 256 logical CPU and HBA expose 16 MSIx vector (due to combined reply queue mode is off in HW), driver will enable msix load balance. Signed-off-by: Sreekanth Reddy --- drivers/scsi/mpt3sas/mpt3sas_base.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 722599a..89418b1 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -2884,11 +2884,9 @@ _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc) if (!_base_is_controller_msix_enabled(ioc)) return; - ioc->msix_load_balance = false; - if (ioc->reply_queue_count < num_online_cpus()) { - ioc->msix_load_balance = true; + + if (ioc->msix_load_balance) return; - } memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); @@ -3060,6 +3058,8 @@ _base_enable_msix(struct MPT3SAS_ADAPTER *ioc) int i, local_max_msix_vectors; u8 try_msix = 0; + ioc->msix_load_balance = false; + if (msix_disable == -1 || msix_disable == 0) try_msix = 1; @@ -3090,7 +3090,20 @@ _base_enable_msix(struct MPT3SAS_ADAPTER *ioc) else if (local_max_msix_vectors == 0) goto try_ioapic; - if (ioc->msix_vector_count < ioc->cpu_count) + /* + * Enable msix_load_balance only if combined reply queue mode is + * disabled on SAS3 & above generation HBA devices. + */ + if (!ioc->combined_reply_queue && + ioc->hba_mpi_version_belonged != MPI2_VERSION) { + ioc->msix_load_balance = true; + } + + /* + * smp affinity setting is not need when msix load balance + * is enabled. + */ + if (ioc->msix_load_balance) ioc->smp_affinity_enable = 0; r = _base_alloc_irq_vectors(ioc);