From patchwork Wed Jun 26 13:24:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin King X-Patchwork-Id: 11017861 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9FC6613B4 for ; Wed, 26 Jun 2019 13:24:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DEBB28438 for ; Wed, 26 Jun 2019 13:24:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C1E428847; Wed, 26 Jun 2019 13:24:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 37A7928438 for ; Wed, 26 Jun 2019 13:24:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C613891E7; Wed, 26 Jun 2019 13:24:33 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from youngberry.canonical.com (youngberry.canonical.com [91.189.89.112]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2B396891E7; Wed, 26 Jun 2019 13:24:31 +0000 (UTC) Received: from 1.general.cking.uk.vpn ([10.172.193.212] helo=localhost) by youngberry.canonical.com with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1hg7uW-0008DR-43; Wed, 26 Jun 2019 13:24:28 +0000 From: Colin King To: Harry Wentland , Leo Li , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Zhou , David Airlie , Daniel Vetter , Nikola Cornij , Wenjing Liu , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH][next[ drm/amd/display: fix a couple of spelling mistakes Date: Wed, 26 Jun 2019 14:24:27 +0100 Message-Id: <20190626132427.12615-1-colin.king@canonical.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Colin Ian King There are a couple of spelling mistakes in dm_error messages and a comment. Fix these. Signed-off-by: Colin Ian King --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c index be49fc7f4abe..ffd0014ec3b5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c @@ -126,7 +126,7 @@ static void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock /* Maximum total throughput with all the slices combined. This is different from how DP spec specifies it. * Our decoder's total throughput in Pix/s is equal to DISPCLK. This is then shared between slices. - * The value below is the absolute maximum value. The actual througput may be lower, but it'll always + * The value below is the absolute maximum value. The actual throughput may be lower, but it'll always * be sufficient to process the input pixel rate fed into a single DSC engine. */ dsc_enc_caps->max_total_throughput_mps = DCN20_MAX_DISPLAY_CLOCK_Mhz; diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c index 77e7a0f8a527..ef5f84a144c3 100644 --- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c @@ -47,7 +47,7 @@ static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_bl *buff_block_size = 64 * 1024; break; default: { - dm_error("%s: DPCD DSC buffer size not recoginzed.\n", __func__); + dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); return false; } } @@ -63,7 +63,7 @@ static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *lin else if (dpcd_line_buff_bit_depth == 8) *line_buff_bit_depth = 8; else { - dm_error("%s: DPCD DSC buffer depth not recoginzed.\n", __func__); + dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__); return false; } @@ -123,7 +123,7 @@ static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput) *throughput = 1000; break; default: { - dm_error("%s: DPCD DSC througput mode not recoginzed.\n", __func__); + dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__); return false; } } @@ -152,7 +152,7 @@ static bool dsc_bpp_increment_div_from_dpcd(int bpp_increment_dpcd, uint32_t *bp *bpp_increment_div = 1; break; default: { - dm_error("%s: DPCD DSC bits-per-pixel increment not recoginzed.\n", __func__); + dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__); return false; } }