From patchwork Mon Jul 1 20:45:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Sierra X-Patchwork-Id: 11026695 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ECF09138B for ; Mon, 1 Jul 2019 20:45:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E356022AFC for ; Mon, 1 Jul 2019 20:45:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB78E26C9B; Mon, 1 Jul 2019 20:45:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,URIBL_BLACK autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 54AA0260CD for ; Mon, 1 Jul 2019 20:45:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726678AbfGAUpR (ORCPT ); Mon, 1 Jul 2019 16:45:17 -0400 Received: from xes-mad.com ([162.248.234.2]:52385 "EHLO mail.xes-mad.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726586AbfGAUpR (ORCPT ); Mon, 1 Jul 2019 16:45:17 -0400 Received: from asierra1.xes-mad.com (asierra1.xes-mad.com [10.52.16.65]) by mail.xes-mad.com (Postfix) with ESMTP id 17D582035F; Mon, 1 Jul 2019 15:45:16 -0500 (CDT) From: Aaron Sierra To: linux-pci@vger.kernel.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v4 3/3] PCI/ACPI: Refactor _OSC request bit setting Date: Mon, 1 Jul 2019 15:45:15 -0500 Message-Id: <20190701204515.23374-4-asierra@xes-inc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190701204515.23374-1-asierra@xes-inc.com> References: <20190213213242.21920-1-git-send-email-asierra@xes-inc.com> <20190701204515.23374-1-asierra@xes-inc.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Provide an inline function for each feature (ASPM, PCIe hotplug, SHPC hotplug, and AER) to set its _OSC requests after performing any sanity checks that it needs. This is intended to improve readability/maintenance. Signed-off-by: Aaron Sierra --- drivers/acpi/pci_root.c | 75 ++++++++++++++++++++++++++++++----------- 1 file changed, 55 insertions(+), 20 deletions(-) diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index 9b8a44391ea0..4e499bb23352 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -431,6 +431,54 @@ static inline bool osc_have_support(u32 support, u32 required) return ((support & required) == required); } +static inline u32 osc_get_aspm_control_bits(struct acpi_pci_root *root, + u32 support) +{ + if (osc_have_support(support, ACPI_PCIE_ASPM_SUPPORT)) + return OSC_CONTROL_BITS_ASPM; + + return 0; +} + +static inline u32 osc_get_pciehp_control_bits(struct acpi_pci_root *root, + u32 support) +{ + if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE) && + osc_have_support(support, ACPI_PCIE_REQ_SUPPORT)) { + return OSC_PCI_EXPRESS_CAPABILITY_CONTROL | + OSC_PCI_EXPRESS_NATIVE_HP_CONTROL; + } + + return 0; +} + +static inline u32 osc_get_shpchp_control_bits(struct acpi_pci_root *root, + u32 support) +{ + if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC) && + osc_have_support(support, ACPI_PCIE_REQ_SUPPORT)) { + return OSC_PCI_EXPRESS_CAPABILITY_CONTROL | + OSC_PCI_SHPC_NATIVE_HP_CONTROL; + } + + return 0; +} + +static inline u32 osc_get_aer_control_bits(struct acpi_pci_root *root, + u32 support) +{ + if (!pci_aer_available() || + !osc_have_support(support, ACPI_PCIE_REQ_SUPPORT)) + return 0; + + if (aer_acpi_firmware_first()) { + dev_info(&root->device->dev, "PCIe AER handled by firmware\n"); + return 0; + } + + return OSC_PCI_EXPRESS_CAPABILITY_CONTROL | OSC_PCI_EXPRESS_AER_CONTROL; +} + static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm, bool is_pcie) { @@ -494,29 +542,16 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm, return; } - control = 0; - - if (osc_have_support(support, ACPI_PCIE_ASPM_SUPPORT)) - control |= OSC_CONTROL_BITS_ASPM; - + control = osc_get_aspm_control_bits(root, support); if (!control) *no_aspm = 1; - if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) - control |= OSC_PCI_EXPRESS_CAPABILITY_CONTROL | - OSC_PCI_EXPRESS_NATIVE_HP_CONTROL; - - if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC)) - control |= OSC_PCI_EXPRESS_CAPABILITY_CONTROL | - OSC_PCI_SHPC_NATIVE_HP_CONTROL; - - if (pci_aer_available()) { - if (aer_acpi_firmware_first()) - dev_info(&device->dev, - "PCIe AER handled by firmware\n"); - else - control |= OSC_PCI_EXPRESS_CAPABILITY_CONTROL | - OSC_PCI_EXPRESS_AER_CONTROL; + control |= osc_get_pciehp_control_bits(root, support); + control |= osc_get_shpchp_control_bits(root, support); + control |= osc_get_aer_control_bits(root, support); + if (!control) { + dev_info(&device->dev, "_OSC: not requesting OS control\n"); + return; } requested = control;