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Mon, 3 Sep 2018 06:23:38 +0000 Date: Mon, 3 Sep 2018 14:23:17 +0800 From: Haibo.Xu To: , , , Subject: [PATCH] arm64/ptrace: add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support Message-ID: <20180903062310.GA4524@haibo-VirtualBox> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.24 (2015-08-30) X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:40.67.248.234; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(136003)(376002)(346002)(39850400004)(396003)(2980300002)(438002)(199004)(189003)(40434004)(106002)(110136005)(33716001)(58126008)(54906003)(4326008)(46406003)(33896004)(50466002)(2201001)(478600001)(68736007)(2906002)(14444005)(72206003)(5024004)(86362001)(97736004)(47776003)(8936002)(316002)(8746002)(81166006)(81156014)(33656002)(1076002)(97756001)(426003)(186003)(336012)(1857600001)(23726003)(77096007)(55016002)(8676002)(9686003)(6666003)(53936002)(476003)(486006)(5660300001)(126002)(106466001)(356003)(305945005)(26005)(18370500001)(107986001)(2101003); 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Ip=[40.67.248.234]; Helo=[nebula.arm.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR08MB3388 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180902_232400_715446_CD61C435 X-CRM114-Status: GOOD ( 10.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nd@arm.com, haibo.xu@arm.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64. This copies the x86 semantics for invoking ptrace hooks, and have been verified on ARM64 machine. Signed-off-by: Haibo.Xu Signed-off-by: Bin.Lu --- arch/arm64/include/asm/thread_info.h | 5 ++++- arch/arm64/include/uapi/asm/ptrace.h | 2 ++ arch/arm64/kernel/ptrace.c | 17 +++++++++++++++++ 3 files changed, 23 insertions(+), 1 deletion(-) -- 2.7.4 IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 46c3b93..5060d2d 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -75,6 +75,7 @@ struct thread_info { * TIF_SYSCALL_TRACE - syscall trace active * TIF_SYSCALL_TRACEPOINT - syscall tracepoint for ftrace * TIF_SYSCALL_AUDIT - syscall auditing + * TIF_SYSCALL_EMU - syscall emulation active * TIF_SECOMP - syscall secure computing * TIF_SIGPENDING - signal pending * TIF_NEED_RESCHED - rescheduling necessary @@ -91,6 +92,7 @@ struct thread_info { #define TIF_SYSCALL_AUDIT 9 #define TIF_SYSCALL_TRACEPOINT 10 #define TIF_SECCOMP 11 +#define TIF_SYSCALL_EMU 12 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define TIF_FREEZE 19 #define TIF_RESTORE_SIGMASK 20 @@ -106,6 +108,7 @@ struct thread_info { #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_SECCOMP (1 << TIF_SECCOMP) +#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) #define _TIF_UPROBE (1 << TIF_UPROBE) #define _TIF_32BIT (1 << TIF_32BIT) @@ -115,7 +118,7 @@ struct thread_info { #define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ - _TIF_NOHZ) + _TIF_NOHZ | _TIF_SYSCALL_EMU) #endif /* __KERNEL__ */ #endif /* __ASM_THREAD_INFO_H */ diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h index b5c3933..04ab06f 100644 --- a/arch/arm64/include/uapi/asm/ptrace.h +++ b/arch/arm64/include/uapi/asm/ptrace.h @@ -23,6 +23,8 @@ #include +#define PTRACE_SYSEMU 31 +#define PTRACE_SYSEMU_SINGLESTEP 32 /* * PSR bits diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index fc35e06..ff3e322 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -165,6 +165,9 @@ void ptrace_disable(struct task_struct *child) * is likely to cause regressions on obscure architectures. */ user_disable_single_step(child); +#ifdef TIF_SYSCALL_EMU + clear_tsk_thread_flag(child, TIF_SYSCALL_EMU); +#endif } #ifdef CONFIG_HAVE_HW_BREAKPOINT @@ -1351,6 +1354,11 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs) if (test_thread_flag(TIF_SYSCALL_TRACE)) tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); + if (test_thread_flag(TIF_SYSCALL_EMU)) { + tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); + return -1; + } + /* Do the secure computing after ptrace; failures should be fast. */ if (secure_computing(NULL) == -1) return -1; @@ -1373,6 +1381,15 @@ asmlinkage void syscall_trace_exit(struct pt_regs *regs) if (test_thread_flag(TIF_SYSCALL_TRACE)) tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT); + + /* + * We only get here because of TIF_SINGLESTEP, + * for PTRACE_SYSEMU_SINGLESTEP, we already reported + * the syscall instruction in syscall_trace_enter(). + */ + if (test_thread_flag(TIF_SINGLESTEP) && + !test_thread_flag(TIF_SYSCALL_EMU)) + tracehook_report_syscall_exit(regs, 1); } /*