From patchwork Mon Jul 8 14:11:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11035183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0B3DC17EF for ; Mon, 8 Jul 2019 14:12:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF153285C9 for ; Mon, 8 Jul 2019 14:12:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ECDFF284C9; Mon, 8 Jul 2019 14:12:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B83C285C9 for ; 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Mon, 8 Jul 2019 14:11:58 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Bartlomiej Zolnierkiewicz , Marek Szyprowski , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/3] opp: core: add regulators enable and disable Date: Mon, 8 Jul 2019 16:11:38 +0200 Message-Id: <20190708141140.24379-2-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190708141140.24379-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SeyyVcRjH+72X877UsddheRa6HOsPmk5abb+tVIp1tta6/1MTb7yhnMPO QdQKXYiNLhROjTRGKNeQyvXEGpFsSNNOncq6GaOhyem8563Vf5/n+zzf3/N8tx9LKkbpZWyE NkbQaflIpcyequ+c6/VW7fEIXFfe5o2rcytpPDQ9RuMCYy+NM5stCF8xfyVxX18Vg1+c/8bg GvMgjQeabsvwVIYR4dy+ZgLfN44yuHion8Bvkktl+NvsCwJfempk8MJgNYVrTZ2ybQp1RX4F UteUpcnUtUWJ6rbxJ4Q6s64MqbuGGwj1VM3yvcxh+82hQmREnKBTbQm2D39f8oyIHlwcf2My W5aE3tmlIzsWuA3QkzGJ0pE9q+BKEYzOfiKkYhpBQYWBkoopBN/7J2R/LfUZI0hkBVeC4O0v XmKrozJFLrKMWw11uZ8ZkZ05D8h6m0OKD5HcHAVVA9W2hhPnB1lJT2mRKathNO+alVlWzvlD +dXt0q4VkNb4mBLZjgsAoznftlfOOcLzvA82nbTOXHh4y/Y+cD8YeD07Q0pmf2gZavxztBN8 6apjJHYDy6MCQuJT8LEwk5HMFxGYUicpqbEJOrr6bQeRnCdUNqkk2Q/MaR2EKAPnAMPfHaUb HOB6vZhRlOVwOUUhTXtDvqWHltgV0i0P/rAacqzJr6JVhv/SGP5LY/i39w4iy5CLEKvXhAn6 9Vrh1Fo9r9HHasPWhkRpapD103UvdE03oqb5Y+2IY5FyiZxdrgxU0HycPkHTjoAllc7y5p0e gQp5KJ9wWtBFBeliIwV9O3JlKaWL/Mwi0xEFF8bHCCcFIVrQ/e0SrN2yJBTZqCo99N5PdffV 0nLH4pDE7KCgka1F+9PvPz5bW3LUtG/3idLEO72p5+d3z3nNlS0YfCHHrB2AgI9an9bgQneL b86al+EtRR2qiZ/m7uID8VX33AJGLpncAgvjSvIT2maWjvvSTis1PzRbyeTWsZ3R7qG7DiZu 9GQbzDtuHj/HeyopfTjv40Xq9PxvirXbMnADAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7r6/sqxBvv2MVpsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQy3i0/ChTwTXuiqkfp7A1MD7k7GLk5JAQMJHY1nuLsYuRi0NIYCmjRMv6 V8wQCWmJxtOrmSBsYYk/17rYIIo+MUqc/72EBSTBJqAqsWXGS3YQW0RAWWLyvenMIEXMAp2s EiueHGEDSQgLOEpMbtjLCmKzADXcnTkRyObg4BVwkVg9wQligbxE547dYDM5BVwljjyexwhi CwGVrLs8BewIXgFBiZMzn4DVMAPVN2+dzTyBUWAWktQsJKkFjEyrGEVSS4tz03OLjfSKE3OL S/PS9ZLzczcxAqNy27GfW3Ywdr0LPsQowMGoxMPLIacUK8SaWFZcmXuIUYKDWUmEd5+7cqwQ b0piZVVqUX58UWlOavEhRlOgHyYyS4km5wMTRl5JvKGpobmFpaG5sbmxmYWSOG+HwMEYIYH0 xJLU7NTUgtQimD4mDk6pBsaqG6o+aov5H/eGOu2PPPffwPa3hV7shh+vqiy+R/ysfeEX/Clg T2EBl3r0nG1HuXb//PLvcfULO/7lO/5nNjz+PDNS2GNffJytUzD79hdsJU5zP+42FNsfa+Xw vPTImr8H+bwfvz3Y47w84sZ8FdPyAz9d7Case79XttfC7rfsBMGdzWIba+qVWIozEg21mIuK EwGIHphj4AIAAA== X-CMS-MailID: 20190708141159eucas1p1751506975ff96a436e14940916623722 X-Msg-Generator: CA X-RootMTR: 20190708141159eucas1p1751506975ff96a436e14940916623722 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190708141159eucas1p1751506975ff96a436e14940916623722 References: <20190708141140.24379-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kamil Konieczny Add enable regulators to dev_pm_opp_set_regulators() and disable regulators to dev_pm_opp_put_regulators(). This prepares for converting exynos-bus devfreq driver to use dev_pm_opp_set_rate(). Signed-off-by: Kamil Konieczny Acked-by: Krzysztof Kozlowski --- drivers/opp/core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index 0e7703fe733f..947cac452854 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -1580,8 +1580,19 @@ struct opp_table *dev_pm_opp_set_regulators(struct device *dev, if (ret) goto free_regulators; + for (i = 0; i < opp_table->regulator_count; i++) { + ret = regulator_enable(opp_table->regulators[i]); + if (ret < 0) + goto disable; + } + return opp_table; +disable: + while (i != 0) + regulator_disable(opp_table->regulators[--i]); + + i = opp_table->regulator_count; free_regulators: while (i != 0) regulator_put(opp_table->regulators[--i]); @@ -1609,6 +1620,8 @@ void dev_pm_opp_put_regulators(struct opp_table *opp_table) /* Make sure there are no concurrent readers while updating opp_table */ WARN_ON(!list_empty(&opp_table->opp_list)); + for (i = opp_table->regulator_count - 1; i >= 0; i--) + regulator_disable(opp_table->regulators[i]); for (i = opp_table->regulator_count - 1; i >= 0; i--) regulator_put(opp_table->regulators[i]); From patchwork Mon Jul 8 14:11:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11035179 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3E45F138B for ; Mon, 8 Jul 2019 14:12:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2CB742847B for ; Mon, 8 Jul 2019 14:12:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29EAB285C9; Mon, 8 Jul 2019 14:12:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C30E21FAC for ; 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Mon, 8 Jul 2019 14:11:59 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Bartlomiej Zolnierkiewicz , Marek Szyprowski , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 2/3] devfreq: exynos-bus: convert to use dev_pm_opp_set_rate() Date: Mon, 8 Jul 2019 16:11:39 +0200 Message-Id: <20190708141140.24379-3-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190708141140.24379-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa1BMYRj2nXuNbU4nl7eL20ZGyCo/vpliNBhnJrc//mQaNp1JdGFXEhNJ F4q2iRkJK9ealGpL7YQdalm3SsxUM0gsgxSyTJfJZrdT9O95n8v3vO/Mx5HCW9qLi4nfK2ni 1bFKxpWqfTjYvFi10TdC9f5OEK4qqKBx+69PNL5obqZxrmkEYZ31K4lbWipZ3JTWw2KDtY3G L+vPM9h20oxwQYuJwOXmNyy+1t5K4FdHShjcM9BE4Iy7Zhbb26ooXN31kFkpiGX6MiQaSo8z YvXVw+L9b3cIMbemFImWjjpCtBlmbmLDXUOipNiYfZJmyYptrjvymlS7r4ftr9efZVLRYHA2 cuGAXwbdWeeJbOTKCXwJghePHiB5+IVAp8+g5cGGoOjCMDMeabz/nJWFYgTlz87R/yI3iq20 08Xw86Cm4AvrxFN4XzjVeYZ0mkh+kILKl1Wjgge/CazGK6PPUo5AZ52RdGIFvxr+dGXRct0s OG68TTmxC78GzFY9kj3u8Pjsh1GedHiO3jo3WgB8Hwv5p9+NhVdDYZaOlLEHdFtqWBn7wNNT JygZJ8HHS7msHE5H0JXVNyYEQ6Ol1fEQ52hYABX1S2Q6FCrS7lFOGng36Oh1l3dwg/xa55FO WgHHMgXZvRj0I8/GtvGG7JGbY1gEU1szk4fmFE64pnDCNYX/e4sQWYqmS4nauGhJGxQvJQVo 1XHaxPjogO0JcQbk+HZP7ZbfRmQajmxAPIeUkxWwSBkh0Op92uS4BgQcqZyiMK31jRAUUerk A5ImYasmMVbSNiBvjlJOVxyc1LVF4KPVe6VdkrRb0oyrBOfilYpmWwLsj8zfjet/5oQT/XZv QZci9ZPXZhkDB/yS9pTH2Kz5r4a8DjV13lqk8jdvCAs3hf5onB9pC/Tszfvdvq41Cveki8RQ hp+Hf/22yNcqz8CFc7tDclY1Zj5Zf3K534zLCVM/N0+rq7iw2dAb7RaxMwZ0LO5I8RHEsOpa ewGrpLQ71Ev9SY1W/RcYGyDOcgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7r6/sqxBt+WmltsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQy5hw1qBgmXfFrnkz2RoYf1p3MXJySAiYSBw+eIG9i5GLQ0hgKaPE/ubt rBAJaYnG06uZIGxhiT/Xutggij4xSrT3vGUGSbAJqEpsmfGSHcQWEVCWmHxvOjNIEbNAJ6vE iidH2EASwgJ+EouafoIVsQA13Nu+A6yZV8BF4u+Ddqht8hKdO3azgNicAq4SRx7PYwSxhYBq 1l2ewgRRLyhxcuYTsBpmoPrmrbOZJzAKzEKSmoUktYCRaRWjSGppcW56brGhXnFibnFpXrpe cn7uJkZgVG479nPzDsZLG4MPMQpwMCrx8HLIKcUKsSaWFVfmHmKU4GBWEuHd564cK8SbklhZ lVqUH19UmpNafIjRFOiJicxSosn5wISRVxJvaGpobmFpaG5sbmxmoSTO2yFwMEZIID2xJDU7 NbUgtQimj4mDU6qBMaLdIPjcUVNZgUsnFl+78OKTNzOL390fcaviHpeEq21n4/zl+Fm/30LS L2OO/UO1pQnPPy4+75a745zQPLnjUtcflhyYmFtyVaBAaLLP0lW7D09YUfYmLefBr1+7D/S4 /tt7bO6CRKs3F7a/krj2N29bS0Km7qLgfnuNNTc+zFGdH/5gK8d9nQNKLMUZiYZazEXFiQAS qmW64AIAAA== X-CMS-MailID: 20190708141200eucas1p144ca3b2a5b4019aaa5773d23c0236f31 X-Msg-Generator: CA X-RootMTR: 20190708141200eucas1p144ca3b2a5b4019aaa5773d23c0236f31 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190708141200eucas1p144ca3b2a5b4019aaa5773d23c0236f31 References: <20190708141140.24379-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kamil Konieczny Reuse opp core code for setting bus clock and voltage. As a side effect this allow useage of coupled regulators feature (required for boards using Exynos5422/5800 SoCs) because dev_pm_opp_set_rate() uses regulator_set_voltage_triplet() for setting regulator voltage while the old code used regulator_set_voltage_tol() with fixed tolerance. This patch also removes no longer needed parsing of DT property "exynos,voltage-tolerance" (no Exynos devfreq DT node uses it). Signed-off-by: Kamil Konieczny --- drivers/devfreq/exynos-bus.c | 172 ++++++++++++++--------------------- 1 file changed, 66 insertions(+), 106 deletions(-) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 486cc5b422f1..7fc4f76bd848 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -25,7 +25,6 @@ #include #define DEFAULT_SATURATION_RATIO 40 -#define DEFAULT_VOLTAGE_TOLERANCE 2 struct exynos_bus { struct device *dev; @@ -37,9 +36,9 @@ struct exynos_bus { unsigned long curr_freq; - struct regulator *regulator; + struct opp_table *opp_table; + struct clk *clk; - unsigned int voltage_tolerance; unsigned int ratio; }; @@ -99,56 +98,25 @@ static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) { struct exynos_bus *bus = dev_get_drvdata(dev); struct dev_pm_opp *new_opp; - unsigned long old_freq, new_freq, new_volt, tol; int ret = 0; - - /* Get new opp-bus instance according to new bus clock */ + /* + * New frequency for bus may not be exactly matched to opp, adjust + * *freq to correct value. + */ new_opp = devfreq_recommended_opp(dev, freq, flags); if (IS_ERR(new_opp)) { dev_err(dev, "failed to get recommended opp instance\n"); return PTR_ERR(new_opp); } - new_freq = dev_pm_opp_get_freq(new_opp); - new_volt = dev_pm_opp_get_voltage(new_opp); dev_pm_opp_put(new_opp); - old_freq = bus->curr_freq; - - if (old_freq == new_freq) - return 0; - tol = new_volt * bus->voltage_tolerance / 100; - /* Change voltage and frequency according to new OPP level */ mutex_lock(&bus->lock); + ret = dev_pm_opp_set_rate(dev, *freq); + if (!ret) + bus->curr_freq = *freq; - if (old_freq < new_freq) { - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); - if (ret < 0) { - dev_err(bus->dev, "failed to set voltage\n"); - goto out; - } - } - - ret = clk_set_rate(bus->clk, new_freq); - if (ret < 0) { - dev_err(dev, "failed to change clock of bus\n"); - clk_set_rate(bus->clk, old_freq); - goto out; - } - - if (old_freq > new_freq) { - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); - if (ret < 0) { - dev_err(bus->dev, "failed to set voltage\n"); - goto out; - } - } - bus->curr_freq = new_freq; - - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", - old_freq, new_freq, clk_get_rate(bus->clk)); -out: mutex_unlock(&bus->lock); return ret; @@ -194,10 +162,11 @@ static void exynos_bus_exit(struct device *dev) if (ret < 0) dev_warn(dev, "failed to disable the devfreq-event devices\n"); - if (bus->regulator) - regulator_disable(bus->regulator); + if (bus->opp_table) + dev_pm_opp_put_regulators(bus->opp_table); dev_pm_opp_of_remove_table(dev); + clk_disable_unprepare(bus->clk); } @@ -209,39 +178,26 @@ static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, { struct exynos_bus *bus = dev_get_drvdata(dev); struct dev_pm_opp *new_opp; - unsigned long old_freq, new_freq; - int ret = 0; + int ret; - /* Get new opp-bus instance according to new bus clock */ + /* + * New frequency for bus may not be exactly matched to opp, adjust + * *freq to correct value. + */ new_opp = devfreq_recommended_opp(dev, freq, flags); if (IS_ERR(new_opp)) { dev_err(dev, "failed to get recommended opp instance\n"); return PTR_ERR(new_opp); } - new_freq = dev_pm_opp_get_freq(new_opp); dev_pm_opp_put(new_opp); - old_freq = bus->curr_freq; - - if (old_freq == new_freq) - return 0; - /* Change the frequency according to new OPP level */ mutex_lock(&bus->lock); + ret = dev_pm_opp_set_rate(dev, *freq); + if (!ret) + bus->curr_freq = *freq; - ret = clk_set_rate(bus->clk, new_freq); - if (ret < 0) { - dev_err(dev, "failed to set the clock of bus\n"); - goto out; - } - - *freq = new_freq; - bus->curr_freq = new_freq; - - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", - old_freq, new_freq, clk_get_rate(bus->clk)); -out: mutex_unlock(&bus->lock); return ret; @@ -259,20 +215,7 @@ static int exynos_bus_parent_parse_of(struct device_node *np, struct exynos_bus *bus) { struct device *dev = bus->dev; - int i, ret, count, size; - - /* Get the regulator to provide each bus with the power */ - bus->regulator = devm_regulator_get(dev, "vdd"); - if (IS_ERR(bus->regulator)) { - dev_err(dev, "failed to get VDD regulator\n"); - return PTR_ERR(bus->regulator); - } - - ret = regulator_enable(bus->regulator); - if (ret < 0) { - dev_err(dev, "failed to enable VDD regulator\n"); - return ret; - } + int i, count, size; /* * Get the devfreq-event devices to get the current utilization of @@ -281,24 +224,20 @@ static int exynos_bus_parent_parse_of(struct device_node *np, count = devfreq_event_get_edev_count(dev); if (count < 0) { dev_err(dev, "failed to get the count of devfreq-event dev\n"); - ret = count; - goto err_regulator; + return count; } + bus->edev_count = count; size = sizeof(*bus->edev) * count; bus->edev = devm_kzalloc(dev, size, GFP_KERNEL); - if (!bus->edev) { - ret = -ENOMEM; - goto err_regulator; - } + if (!bus->edev) + return -ENOMEM; for (i = 0; i < count; i++) { bus->edev[i] = devfreq_event_get_edev_by_phandle(dev, i); - if (IS_ERR(bus->edev[i])) { - ret = -EPROBE_DEFER; - goto err_regulator; - } + if (IS_ERR(bus->edev[i])) + return -EPROBE_DEFER; } /* @@ -314,22 +253,15 @@ static int exynos_bus_parent_parse_of(struct device_node *np, if (of_property_read_u32(np, "exynos,saturation-ratio", &bus->ratio)) bus->ratio = DEFAULT_SATURATION_RATIO; - if (of_property_read_u32(np, "exynos,voltage-tolerance", - &bus->voltage_tolerance)) - bus->voltage_tolerance = DEFAULT_VOLTAGE_TOLERANCE; - return 0; - -err_regulator: - regulator_disable(bus->regulator); - - return ret; } static int exynos_bus_parse_of(struct device_node *np, - struct exynos_bus *bus) + struct exynos_bus *bus, bool passive) { struct device *dev = bus->dev; + struct opp_table *opp_table; + const char *vdd = "vdd"; struct dev_pm_opp *opp; unsigned long rate; int ret; @@ -347,11 +279,22 @@ static int exynos_bus_parse_of(struct device_node *np, return ret; } + if (!passive) { + opp_table = dev_pm_opp_set_regulators(dev, &vdd, 1); + if (IS_ERR(opp_table)) { + ret = PTR_ERR(opp_table); + dev_err(dev, "failed to set regulators %d\n", ret); + goto err_clk; + } + + bus->opp_table = opp_table; + } + /* Get the freq and voltage from OPP table to scale the bus freq */ ret = dev_pm_opp_of_add_table(dev); if (ret < 0) { dev_err(dev, "failed to get OPP table\n"); - goto err_clk; + goto err_regulator; } rate = clk_get_rate(bus->clk); @@ -362,6 +305,7 @@ static int exynos_bus_parse_of(struct device_node *np, ret = PTR_ERR(opp); goto err_opp; } + bus->curr_freq = dev_pm_opp_get_freq(opp); dev_pm_opp_put(opp); @@ -369,6 +313,13 @@ static int exynos_bus_parse_of(struct device_node *np, err_opp: dev_pm_opp_of_remove_table(dev); + +err_regulator: + if (bus->opp_table) { + dev_pm_opp_put_regulators(bus->opp_table); + bus->opp_table = NULL; + } + err_clk: clk_disable_unprepare(bus->clk); @@ -386,6 +337,7 @@ static int exynos_bus_probe(struct platform_device *pdev) struct exynos_bus *bus; int ret, max_state; unsigned long min_freq, max_freq; + bool passive = false; if (!np) { dev_err(dev, "failed to find devicetree node\n"); @@ -395,12 +347,18 @@ static int exynos_bus_probe(struct platform_device *pdev) bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); if (!bus) return -ENOMEM; + mutex_init(&bus->lock); bus->dev = &pdev->dev; platform_set_drvdata(pdev, bus); + node = of_parse_phandle(dev->of_node, "devfreq", 0); + if (node) { + of_node_put(node); + passive = true; + } /* Parse the device-tree to get the resource information */ - ret = exynos_bus_parse_of(np, bus); + ret = exynos_bus_parse_of(np, bus, passive); if (ret < 0) return ret; @@ -410,13 +368,10 @@ static int exynos_bus_probe(struct platform_device *pdev) goto err; } - node = of_parse_phandle(dev->of_node, "devfreq", 0); - if (node) { - of_node_put(node); + if (passive) goto passive; - } else { - ret = exynos_bus_parent_parse_of(np, bus); - } + + ret = exynos_bus_parent_parse_of(np, bus); if (ret < 0) goto err; @@ -509,6 +464,11 @@ static int exynos_bus_probe(struct platform_device *pdev) err: dev_pm_opp_of_remove_table(dev); + if (bus->opp_table) { + dev_pm_opp_put_regulators(bus->opp_table); + bus->opp_table = NULL; + } + clk_disable_unprepare(bus->clk); return ret; From patchwork Mon Jul 8 14:11:40 2019 Content-Type: text/plain; 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Mon, 8 Jul 2019 14:11:59 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 3/3] ARM: dts: exynos: add initial data for coupled regulators for Exynos5422/5800 Date: Mon, 8 Jul 2019 16:11:40 +0200 Message-Id: <20190708141140.24379-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190708141140.24379-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa1CMYRj1fvfSNl8bekZNxjaMSxfhxzs0hqbYfxnMMExY+lRsl9ntojJD RZTpMgxSKmba0aySbiRk1GrHpRtNJWFZKl2Qli6T1u5+ufw7z3nOec9zZl6OlBrohVx4ZIyg ilQoZYw9dbtpssXLN8gjeFXa0FxckVtO4y5TP42LdC00zqo3I5xtHCJxa+stFjenDLO40thJ 45d1Vxg8lqlDOLe1nsBlujcs1nS1E/h1cgmDhyeaCXzqgY7FM50VFK4yNDEbpfLSwlIkr9Sm M/Kq4uPyR1/uE/Ksai2S67vvEPKxSvet7G57vxBBGR4nqHw27LcPa+zIZqL71x/NvPOCPoFS vDOQHQf8WvjVlIsykD0n5UsQTAymk+JgQtDz8zojDmMIUqby0R/LlKacEhfXEbSVPSH+Wvq0 D0mriuGXQHXuZ9aK5/EecP7tJdu7JD9JwbO6VNq6cOZDIKdm0oYpi+GC/jtjxRI+AMZ6Mmgx bhGk196jrNiODwSdsRCJGid4cvmjjSctmtSafFsA8CMsFCZPs6I5AL6O60gRO8OgvnqWdwPz 3SJCxPHw6VoWK5pPIjCcHqXExXpo1LdbruAsCcuhvM5HpDfB54s3bDTwjtA94iTe4AjnbltL WmkJnEmTimovKDQ/n63iChnmm7NYDo1lpSgHLc77r03ef23y/uVeRaQWuQix6ohQQb06Uoj3 Visi1LGRod4HoyIqkeXfPZvRm2pR3fSBBsRzSOYg4dxlwVJaEadOiGhAwJGyeZL6LR7BUkmI IiFRUEXtU8UqBXUDcuUomYskaY5hj5QPVcQIRwQhWlD92RKc3cITKOide6/R57jSz3xjviFt nKnYVDJKmoI0YUtd2zY+/rBsZ6bD7t5XBeGBTqrLm58n/0hSRh/w3HWoYEeFR0fAuvcarWvm /b4+494Z8Nx77HD0ts3DpjiWXDNtl6UfGCka3eLgX0v61wxsrdK0j35NPOu5Mmf7VHtc8QK3 b0aKeOopk1HqMIXvClKlVvwGV/NZpHMDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsVy+t/xe7oG/sqxBmfPaVhsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQyzh8pZ+t4Ll1Re/2S6wNjE16XYycHBICJhK/lq5n6WLk4hASWMoosWLm XTaIhLRE4+nVTBC2sMSfa11sEEWfGCU+7znIDpJgE1CV2DLjJZgtIqAsMfnedGaQImaBTlaJ JZP+giWEBZIklt99xQJiswA1TD3+CWwDr4CLxOdbXawQG+QlOnfsBqvhFHCVOPJ4HiOILQRU s+7yFCaIekGJkzOfgNUwA9U3b53NPIFRYBaS1CwkqQWMTKsYRVJLi3PTc4uN9IoTc4tL89L1 kvNzNzEC43LbsZ9bdjB2vQs+xCjAwajEw8shpxQrxJpYVlyZe4hRgoNZSYR3n7tyrBBvSmJl VWpRfnxRaU5q8SFGU6AnJjJLiSbnA1NGXkm8oamhuYWlobmxubGZhZI4b4fAwRghgfTEktTs 1NSC1CKYPiYOTqkGxsQXii8ePtc5KPO/dh+HjYVEB3Ooo/lytgOf3neeXqXDc3Lizok2u9V1 3VksDa+VtRrnHBaM7D9f6vs4+ofMP9NJjeqvdD4taT+ROr3FtjjsZm+4sMHSu7/Uarb+iH/3 Z9O11MO2PqozJH6GGZTN2XCZg2tvbuC7YofuvlciX+Z4C62JUWReoMRSnJFoqMVcVJwIABy4 ZpThAgAA X-CMS-MailID: 20190708141200eucas1p12bf901a2589efe92b133b357d2cbc57e X-Msg-Generator: CA X-RootMTR: 20190708141200eucas1p12bf901a2589efe92b133b357d2cbc57e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190708141200eucas1p12bf901a2589efe92b133b357d2cbc57e References: <20190708141140.24379-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Szyprowski Declare Exynos5422/5800 voltage ranges for opp points for big cpu core and bus wcore and couple their voltage supllies as vdd_arm and vdd_int should be in 300mV range. Signed-off-by: Marek Szyprowski Signed-off-by: Kamil Konieczny --- arch/arm/boot/dts/exynos5420.dtsi | 34 +++++++++---------- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 4 +++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +++ arch/arm/boot/dts/exynos5800.dtsi | 32 ++++++++--------- 4 files changed, 41 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 5fb2326875dc..0cbf74750553 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -48,62 +48,62 @@ opp-shared; opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; clock-latency-ns = <140000>; }; opp-1700000000 { opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <1212500>; + opp-microvolt = <1212500 1212500 1500000>; clock-latency-ns = <140000>; }; opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <1175000>; + opp-microvolt = <1175000 1175000 1500000>; clock-latency-ns = <140000>; }; opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <1137500>; + opp-microvolt = <1137500 1137500 1500000>; clock-latency-ns = <140000>; }; opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; - opp-microvolt = <1112500>; + opp-microvolt = <1112500 1112500 1500000>; clock-latency-ns = <140000>; }; opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; - opp-microvolt = <1062500>; + opp-microvolt = <1062500 1062500 1500000>; clock-latency-ns = <140000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1037500>; + opp-microvolt = <1037500 1037500 1500000>; clock-latency-ns = <140000>; }; opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; - opp-microvolt = <1012500>; + opp-microvolt = <1012500 1012500 1500000>; clock-latency-ns = <140000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = < 987500>; + opp-microvolt = < 987500 987500 1500000>; clock-latency-ns = <140000>; }; opp-900000000 { opp-hz = /bits/ 64 <900000000>; - opp-microvolt = < 962500>; + opp-microvolt = < 962500 962500 1500000>; clock-latency-ns = <140000>; }; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = < 937500>; + opp-microvolt = < 937500 937500 1500000>; clock-latency-ns = <140000>; }; opp-700000000 { opp-hz = /bits/ 64 <700000000>; - opp-microvolt = < 912500>; + opp-microvolt = < 912500 912500 1500000>; clock-latency-ns = <140000>; }; }; @@ -1100,23 +1100,23 @@ opp00 { opp-hz = /bits/ 64 <84000000>; - opp-microvolt = <925000>; + opp-microvolt = <925000 925000 1400000>; }; opp01 { opp-hz = /bits/ 64 <111000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp02 { opp-hz = /bits/ 64 <222000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp03 { opp-hz = /bits/ 64 <333000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp04 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <987500>; + opp-microvolt = <987500 987500 1400000>; }; }; diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 25d95de15c9b..65d094256b54 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -428,6 +428,8 @@ regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; }; buck3_reg: BUCK3 { @@ -436,6 +438,8 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; }; buck4_reg: BUCK4 { diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index e0f470fe54c8..5c1e965ed7e9 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -257,6 +257,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; @@ -269,6 +271,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 57d3b319fd65..2a74735d161c 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -22,61 +22,61 @@ &cluster_a15_opp_table { opp-1700000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1600000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1500000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1400000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1300000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1200000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1100000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1000000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-900000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-800000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-700000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-400000000 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-300000000 { opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; };