From patchwork Thu Jul 18 08:01:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "zhiyong.tao" X-Patchwork-Id: 11048631 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6791417E0 for ; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A9C5287AE for ; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4DDD6287D4; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E57E3287C9 for ; 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Thu, 18 Jul 2019 16:01:24 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , , , Zhiyong Tao Subject: [PATCH v1 1/2] arm64: dts: mt8183: auxadc: add efuse information in device tree Date: Thu, 18 Jul 2019 16:01:18 +0800 Message-ID: <20190718080119.30707-2-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20190718080119.30707-1-zhiyong.tao@mediatek.com> References: <20190718080119.30707-1-zhiyong.tao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The commit add add efuse information in device tree Signed-off-by: Zhiyong Tao Signed-off-by: jg_poxu --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index c2749c4631bc..59b4f3d933b5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -261,6 +261,8 @@ clocks = <&infracfg CLK_INFRA_AUXADC>; clock-names = "main"; #io-channel-cells = <1>; + nvmem-cells = <&auxadc_calibration>; + nvmem-cell-names = "calibration-data"; status = "disabled"; }; @@ -382,6 +384,9 @@ compatible = "mediatek,mt8183-efuse", "mediatek,efuse"; reg = <0 0x11f10000 0 0x1000>; + auxadc_calibration: auxadccali@1b4 { + reg = <0x1b4 0x4>; + }; }; mfgcfg: syscon@13000000 { From patchwork Thu Jul 18 08:01:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "zhiyong.tao" X-Patchwork-Id: 11048629 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F00E912 for ; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40B98287CC for ; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3407E287CF; Thu, 18 Jul 2019 08:01:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C5174287AE for ; Thu, 18 Jul 2019 08:01:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389221AbfGRIBg (ORCPT ); Thu, 18 Jul 2019 04:01:36 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:40751 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2389321AbfGRIBf (ORCPT ); Thu, 18 Jul 2019 04:01:35 -0400 X-UUID: 4512913e817a4a958b64f5ef79152754-20190718 X-UUID: 4512913e817a4a958b64f5ef79152754-20190718 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 556583377; Thu, 18 Jul 2019 16:01:27 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 18 Jul 2019 16:01:26 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 18 Jul 2019 16:01:25 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , , , Zhiyong Tao Subject: [PATCH v1 2/2] auxadc: mediatek: support efuse calibration in auxadc driver Date: Thu, 18 Jul 2019 16:01:19 +0800 Message-ID: <20190718080119.30707-3-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20190718080119.30707-1-zhiyong.tao@mediatek.com> References: <20190718080119.30707-1-zhiyong.tao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch support efuse calibration in auxadc driver Signed-off-by: Zhiyong Tao Signed-off-by: jg_poxu --- drivers/iio/adc/mt6577_auxadc.c | 71 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c index 95d76abb64ec..e30d9736b1a5 100644 --- a/drivers/iio/adc/mt6577_auxadc.c +++ b/drivers/iio/adc/mt6577_auxadc.c @@ -17,12 +17,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include /* Register definitions */ #define MT6577_AUXADC_CON0 0x00 @@ -42,6 +44,13 @@ #define MT6577_AUXADC_POWER_READY_MS 1 #define MT6577_AUXADC_SAMPLE_READY_US 25 +#define ADC_GE_A_SHIFT 10 +#define ADC_GE_A_MASK (0x3ff << ADC_GE_A_SHIFT) +#define ADC_OE_A_SHIFT 0 +#define ADC_OE_A_MASK (0x3ff << ADC_OE_A_SHIFT) +#define ADC_CALI_EN_A_SHIFT 20 +#define ADC_CALI_EN_A_MASK (0x1 << ADC_CALI_EN_A_SHIFT) + struct mt6577_auxadc_device { void __iomem *reg_base; struct clk *adc_clk; @@ -74,6 +83,64 @@ static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = { MT6577_AUXADC_CHANNEL(15), }; +s32 cali_oe; +s32 cali_ge; +struct adc_cali_info { + u32 cali_ge_a; + u32 cali_oe_a; + u32 gain; +}; +static struct adc_cali_info adc_cali; + +static int mt6577_auxadc_update_cali(struct device *dev) +{ + struct nvmem_cell *cell; + u32 *buf; + size_t len; + int ret = 0; + + cali_oe = 0; + cali_ge = 0; + + cell = nvmem_cell_get(dev, "calibration-data"); + if (IS_ERR(cell)) { + if (PTR_ERR(cell) == -EPROBE_DEFER) + return PTR_ERR(cell); + return 0; + } + + buf = (u32 *)nvmem_cell_read(cell, &len); + + nvmem_cell_put(cell); + + if (IS_ERR(buf)) + return PTR_ERR(buf); + + if (len < sizeof(u32)) { + dev_warn(dev, "invalid calibration data\n"); + ret = -EINVAL; + goto out; + } + + if (((buf[0] & ADC_CALI_EN_A_MASK) >> ADC_CALI_EN_A_SHIFT) != 0) { + adc_cali.cali_oe_a = + (buf[0] & ADC_OE_A_MASK) >> ADC_OE_A_SHIFT; + adc_cali.cali_ge_a = + ((buf[0] & ADC_GE_A_MASK) >> ADC_GE_A_SHIFT); + + cali_ge = adc_cali.cali_ge_a - 512; + cali_oe = adc_cali.cali_oe_a - 512; + adc_cali.gain = 1 + cali_ge; + } else { + dev_info(dev, "Device not calibrated, using default calibration values\n"); + } + +out: + kfree(buf); + + return ret; +} + static inline void mt6577_auxadc_mod_reg(void __iomem *reg, u32 or_mask, u32 and_mask) { @@ -274,6 +341,10 @@ static int mt6577_auxadc_probe(struct platform_device *pdev) goto err_power_off; } + ret = mt6577_auxadc_update_cali(&pdev->dev); + if (ret) + return ret; + return 0; err_power_off: