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Thu, 18 Jul 2019 14:31:26 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 1/9] soc: samsung: Add exynos chipid driver support Date: Thu, 18 Jul 2019 16:30:36 +0200 Message-Id: <20190718143044.25066-2-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGKsWRmVeSWpSXmKPExsWy7djP87r7mwxiDVauU7LYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxvl/75gLZuhUbH/9 gKmBsUe1i5GTQ0LAROLE6VOMXYxcHEICKxgl1n36wgThfGGU6P7zkQ3C+cwosXzmP0aYlo1P V7JCJJYzSpxdfR+hpfXrBhaQKjYBQ4neo31gHSICwhL3li5nByliFrjHJHH66VkmkISwgJvE viVd7CA2i4CqxNzuE2BxXgFriat/VjJDrJOXWL3hAJjNKWAjcfjuU7BrJQSms0tMfXMMqshF YtHfW1D3CUu8Or6FHcKWkfi/cz4TREMzo0TP7tvsEM4ERon7xxdAdVhLHD5+EegjDqD7NCXW 79KHCDtK3DjxBCwsIcAnceOtIEiYGcictG06M0SYV6KjTQiiWkXi96rpTBC2lET3k/8sELaH RNOyJmg49jNKfF8whW0Co/wshGULGBlXMYqnlhbnpqcWG+ellusVJ+YWl+al6yXn525iBKaW 0/+Of93BuO9P0iFGAQ5GJR7egFyDWCHWxLLiytxDjBIczEoivLdf6scK8aYkVlalFuXHF5Xm pBYfYpTmYFES561meBAtJJCeWJKanZpakFoEk2Xi4JRqYDx1VsMi99e5/LzCZke5a59X6oU1 nDi/3JH7yuXflt2rr/PemSwjtDVPxO3Q0QM9/hVf06do1bBP25pctE5OtOhHQMSCNJ1P/Q5/ 2C62qoTWBxWyr5txcAdb4Y7LDzbssbC82W0cXFeownjw5NZ1S34pMzz//6L56dvF94xWFk1K 9vibvPf49hQlluKMREMt5qLiRACA0JtXKQMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsVy+t/xu7r7mgxiDZae1LHYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexvl/75gLZuhUbH/9gKmBsUe1i5GTQ0LARGLj05Ws XYxcHEICSxkltk86zdLFyAGUkJKY36IEUSMs8edaFxtEzSdGie/zO1lAEmwChhK9R/sYQWwR oKJ7S5ezgxQxC7xikrg97z8TSEJYwE1i35IudhCbRUBVYm73CbA4r4C1xNU/K5khNshLrN5w AMzmFLCROHz3KdhQIaCa2S+vMU5g5FvAyLCKUSS1tDg3PbfYSK84Mbe4NC9dLzk/dxMjMMi3 Hfu5ZQdj17vgQ4wCHIxKPLwBuQaxQqyJZcWVuYcYJTiYlUR4b7/UjxXiTUmsrEotyo8vKs1J LT7EaAp01ERmKdHkfGAE5pXEG5oamltYGpobmxubWSiJ83YIHIwREkhPLEnNTk0tSC2C6WPi 4JRqYGS9zVMh3vbkk47LtbmW8w3dpabNl5976t3d4HWHAzlt+U7Hs1bkze9bNl99f6u005db rT7rr7skVK+PuPkn1Nlgu9o+tYh3upcemnemMs5cmrftgLSIyrwFD1Y+23XtSuPtVMP0f0sW 2O9ksntxR6532pPHfxquc7CFJcgcXBLZl/Bz6vOGqd+UWIozEg21mIuKEwEE5n3GiAIAAA== X-CMS-MailID: 20190718143127eucas1p13b1e2c98d270140a87f09562ef46c9a3 X-Msg-Generator: CA X-RootMTR: 20190718143127eucas1p13b1e2c98d270140a87f09562ef46c9a3 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143127eucas1p13b1e2c98d270140a87f09562ef46c9a3 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space. This driver uses existing binding for exynos-chipid. Changes by Bartlomiej: - fixed return values on errors - removed bogus kfree_const() - added missing Exynos4210 EVT0 id - converted code to use EXYNOS_MASK define - fixed np use after of_node_put() - fixed too early use of dev_info() - made driver fail for unknown SoC-s - added SPDX tag - updated Copyrights Signed-off-by: Pankaj Dubey [m.szyprowski: for suggestion and code snippet of product_id_to_soc_id] Signed-off-by: Marek Szyprowski Signed-off-by: Bartlomiej Zolnierkiewicz [s.nawrocki: updated copyright date] Signed-off-by: Sylwester Nawrocki --- drivers/soc/samsung/Kconfig | 5 ++ drivers/soc/samsung/Makefile | 2 + drivers/soc/samsung/exynos-chipid.c | 111 ++++++++++++++++++++++++++++ 3 files changed, 118 insertions(+) create mode 100644 drivers/soc/samsung/exynos-chipid.c diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig index 2186285fda92..2905f5262197 100644 --- a/drivers/soc/samsung/Kconfig +++ b/drivers/soc/samsung/Kconfig @@ -7,6 +7,11 @@ menuconfig SOC_SAMSUNG if SOC_SAMSUNG +config EXYNOS_CHIPID + bool "Exynos Chipid controller driver" if COMPILE_TEST + depends on ARCH_EXYNOS || COMPILE_TEST + select SOC_BUS + config EXYNOS_PMU bool "Exynos PMU controller driver" if COMPILE_TEST depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST) diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile index 29f294baac6e..3b6a8797416c 100644 --- a/drivers/soc/samsung/Makefile +++ b/drivers/soc/samsung/Makefile @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_EXYNOS_CHIPID) += exynos-chipid.o obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS) += exynos3250-pmu.o exynos4-pmu.o \ diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c new file mode 100644 index 000000000000..78b123ee60c0 --- /dev/null +++ b/drivers/soc/samsung/exynos-chipid.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS - CHIP ID support + * Author: Pankaj Dubey + * Author: Bartlomiej Zolnierkiewicz + */ + +#include +#include +#include +#include +#include +#include +#include + +#define EXYNOS_SUBREV_MASK (0xF << 4) +#define EXYNOS_MAINREV_MASK (0xF << 0) +#define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK) +#define EXYNOS_MASK 0xFFFFF000 + +static const struct exynos_soc_id { + const char *name; + unsigned int id; +} soc_ids[] = { + { "EXYNOS3250", 0xE3472000 }, + { "EXYNOS4210", 0x43200000 }, /* EVT0 revision */ + { "EXYNOS4210", 0x43210000 }, + { "EXYNOS4212", 0x43220000 }, + { "EXYNOS4412", 0xE4412000 }, + { "EXYNOS5250", 0x43520000 }, + { "EXYNOS5260", 0xE5260000 }, + { "EXYNOS5410", 0xE5410000 }, + { "EXYNOS5420", 0xE5420000 }, + { "EXYNOS5440", 0xE5440000 }, + { "EXYNOS5800", 0xE5422000 }, + { "EXYNOS7420", 0xE7420000 }, + { "EXYNOS5433", 0xE5433000 }, +}; + +static const char * __init product_id_to_soc_id(unsigned int product_id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(soc_ids); i++) + if ((product_id & EXYNOS_MASK) == soc_ids[i].id) + return soc_ids[i].name; + return NULL; +} + +int __init exynos_chipid_early_init(void) +{ + struct soc_device_attribute *soc_dev_attr; + void __iomem *exynos_chipid_base; + struct soc_device *soc_dev; + struct device_node *root; + struct device_node *np; + u32 product_id; + u32 revision; + + /* look up for chipid node */ + np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-chipid"); + if (!np) + return -ENODEV; + + exynos_chipid_base = of_iomap(np, 0); + of_node_put(np); + + if (!exynos_chipid_base) { + pr_err("Failed to map SoC chipid\n"); + return -ENXIO; + } + + product_id = readl_relaxed(exynos_chipid_base); + revision = product_id & EXYNOS_REV_MASK; + iounmap(exynos_chipid_base); + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return -ENOMEM; + + soc_dev_attr->family = "Samsung Exynos"; + + root = of_find_node_by_path("/"); + of_property_read_string(root, "model", &soc_dev_attr->machine); + of_node_put(root); + + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision); + soc_dev_attr->soc_id = product_id_to_soc_id(product_id); + if (!soc_dev_attr->soc_id) { + pr_err("Unknown SoC\n"); + return -ENODEV; + } + + /* please note that the actual registration will be deferred */ + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr->revision); + kfree(soc_dev_attr); + return PTR_ERR(soc_dev); + } + + /* it is too early to use dev_info() here (soc_dev is NULL) */ + pr_info("soc soc0: Exynos: CPU[%s] PRO_ID[0x%x] REV[0x%x] Detected\n", + soc_dev_attr->soc_id, product_id, revision); + + return 0; +} +early_initcall(exynos_chipid_early_init); From patchwork Thu Jul 18 14:30:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E1BC213BD for ; Thu, 18 Jul 2019 14:32:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D1FBE204C4 for ; Thu, 18 Jul 2019 14:32:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C4F2A28806; Thu, 18 Jul 2019 14:32:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 483ED204C4 for ; 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Thu, 18 Jul 2019 14:31:27 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 2/9] soc: samsung: Convert exynos-chipid driver to use the regmap API Date: Thu, 18 Jul 2019 16:30:37 +0200 Message-Id: <20190718143044.25066-3-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKKsWRmVeSWpSXmKPExsWy7djPc7oHmwxiDZ5PErbYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxsu1H1kLjitX/D++ g72B8YdsFyMnh4SAicS0UweYuhi5OIQEVjBKrN97kBXC+cIo8fblfijnM1Bm0kZGmJYTLS2M EInljBIHVtxlg2u58WAOE0gVm4ChRO/RPrAOEQFhiXtLl7ODFDEL3GOSOP30LFiRsECUxMH+ RjCbRUBVoq/nO5jNK2AtcWDZFRaIdfISqzccYAaxOQVsJA7ffQq2WkJgOrvEji27mCGKXCT+ NfSwQ9jCEq+Ob4GyZSROT+5hgWhoZpTo2X2bHcKZwChx//gCqI+sJQ4fvwj0KgfQfZoS63fp Q4QdJTZ1dLCDhCUE+CRuvBUECTMDmZO2TWeGCPNKdLQJQVSrSPxeNZ0JwpaS6H7ynwWixEPi 4GZuSAD1M0osO9vNMoFRfhbCrgWMjKsYxVNLi3PTU4uN8lLL9YoTc4tL89L1kvNzNzECE8vp f8e/7GDc9SfpEKMAB6MSD29ArkGsEGtiWXFl7iFGCQ5mJRHe2y/1Y4V4UxIrq1KL8uOLSnNS iw8xSnOwKInzVjM8iBYSSE8sSc1OTS1ILYLJMnFwSjUwlhqe/vvpzbwWcZXE9C0e06xWPkxU W7Av/ydXdddM80CXBd77ZvWtv7W1+OWM9DvVb98brRFkv9d0rtHg5q2f13OvCx6ym3nQs/1I smVi/J8dZ6fbvm2Ryrp6wDXti4vjhzNxjzwOm4eKRX3U7P2SEq9YfP/C0mPxC6qK/txp7zBv 69p6bIL6diWW4oxEQy3mouJEAMNJijEoAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsVy+t/xu7oHmgxiDaZMU7TYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexsu1H1kLjitX/D++g72B8YdsFyMnh4SAicSJlhbG LkYuDiGBpYwSn15vY+pi5ABKSEnMb1GCqBGW+HOtiw3EFhL4xChxdaoriM0mYCjRe7SPEcQW Aaq5t3Q5O8gcZoFXTBK35/1nAkkIC0RIPJs/A6yZRUBVoq/nO1icV8Ba4sCyKywQC+QlVm84 wAxicwrYSBy++5QRYpm1xOyX1xgnMPItYGRYxSiSWlqcm55bbKhXnJhbXJqXrpecn7uJERji 24793LyD8dLG4EOMAhyMSjy8AbkGsUKsiWXFlbmHGCU4mJVEeG+/1I8V4k1JrKxKLcqPLyrN SS0+xGgKdNREZinR5Hxg/OWVxBuaGppbWBqaG5sbm1koifN2CByMERJITyxJzU5NLUgtgulj 4uCUamC00GUTUcpdv1zjm03Zeb2Ty98bF6zTlDkpEO5yWPLrLaXDLfHmv8xPKC4zmrJpeaJh x5OJWorle/aJm+RXJUpmX/VeUtlg/uPvEcE7W6OCFEqEPk5v1rMorn2QJfdEYAv/NZvLMdyX tldVN2x5p/3BbKbrq86D0i/31TXPMk7IqzJRrnHpv6bEUpyRaKjFXFScCAB9ejDLhwIAAA== X-CMS-MailID: 20190718143128eucas1p2677ae16d229dddcd9a0db8084f0da5cf X-Msg-Generator: CA X-RootMTR: 20190718143128eucas1p2677ae16d229dddcd9a0db8084f0da5cf X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143128eucas1p2677ae16d229dddcd9a0db8084f0da5cf References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the driver to use regmap API in order to allow other drivers, like ASV, to access the CHIPID registers. This patch adds definition of selected CHIPID register offsets and register bit fields for Exynos5422 SoC. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - new patch --- drivers/soc/samsung/exynos-chipid.c | 33 ++++++---------- include/linux/soc/samsung/exynos-chipid.h | 48 +++++++++++++++++++++++ 2 files changed, 61 insertions(+), 20 deletions(-) create mode 100644 include/linux/soc/samsung/exynos-chipid.h diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index 78b123ee60c0..594b00488013 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -9,18 +9,16 @@ */ #include +#include #include #include #include #include +#include #include +#include #include -#define EXYNOS_SUBREV_MASK (0xF << 4) -#define EXYNOS_MAINREV_MASK (0xF << 0) -#define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK) -#define EXYNOS_MASK 0xFFFFF000 - static const struct exynos_soc_id { const char *name; unsigned int id; @@ -53,29 +51,24 @@ static const char * __init product_id_to_soc_id(unsigned int product_id) int __init exynos_chipid_early_init(void) { struct soc_device_attribute *soc_dev_attr; - void __iomem *exynos_chipid_base; struct soc_device *soc_dev; struct device_node *root; - struct device_node *np; + struct regmap *regmap; u32 product_id; u32 revision; + int ret; - /* look up for chipid node */ - np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-chipid"); - if (!np) - return -ENODEV; - - exynos_chipid_base = of_iomap(np, 0); - of_node_put(np); - - if (!exynos_chipid_base) { - pr_err("Failed to map SoC chipid\n"); - return -ENXIO; + regmap = syscon_regmap_lookup_by_compatible("samsung,exynos4210-chipid"); + if (IS_ERR(regmap)) { + pr_err("%s: failed to get regmap\n", __func__); + return PTR_ERR(regmap); } - product_id = readl_relaxed(exynos_chipid_base); + ret = regmap_read(regmap, EXYNOS_CHIPID_REG_PRO_ID, &product_id); + if (ret < 0) + return ret; + revision = product_id & EXYNOS_REV_MASK; - iounmap(exynos_chipid_base); soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); if (!soc_dev_attr) diff --git a/include/linux/soc/samsung/exynos-chipid.h b/include/linux/soc/samsung/exynos-chipid.h new file mode 100644 index 000000000000..25359d70d617 --- /dev/null +++ b/include/linux/soc/samsung/exynos-chipid.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Exynos - CHIPID support + */ + +#define EXYNOS_CHIPID_REG_PRO_ID 0x00 + #define EXYNOS_SUBREV_MASK (0xf << 4) + #define EXYNOS_MAINREV_MASK (0xf << 0) + #define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | \ + EXYNOS_MAINREV_MASK) + #define EXYNOS_MASK 0xfffff000 + +#define EXYNOS_CHIPID_REG_PKG_ID 0x04 +/* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */ + #define EXYNOS5422_IDS_OFFSET 24 + #define EXYNOS5422_IDS_MASK 0xff + #define EXYNOS5422_USESG_OFFSET 3 + #define EXYNOS5422_USESG_MASK 0x01 + #define EXYNOS5422_SG_OFFSET 0 + #define EXYNOS5422_SG_MASK 0x07 + #define EXYNOS5422_TABLE_OFFSET 8 + #define EXYNOS5422_TABLE_MASK 0x03 + #define EXYNOS5422_SG_A_OFFSET 17 + #define EXYNOS5422_SG_A_MASK 0x0f + #define EXYNOS5422_SG_B_OFFSET 21 + #define EXYNOS5422_SG_B_MASK 0x03 + #define EXYNOS5422_SG_BSIGN_OFFSET 23 + #define EXYNOS5422_SG_BSIGN_MASK 0x01 + #define EXYNOS5422_BIN2_OFFSET 12 + #define EXYNOS5422_BIN2_MASK 0x01 + +#define EXYNOS_CHIPID_REG_LOT_ID 0x14 + +#define EXYNOS_CHIPID_REG_AUX_INFO 0x1c +/* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */ + #define EXYNOS5422_TMCB_OFFSET 0 + #define EXYNOS5422_TMCB_MASK 0x7f + #define EXYNOS5422_ARM_UP_OFFSET 8 + #define EXYNOS5422_ARM_UP_MASK 0x03 + #define EXYNOS5422_ARM_DN_OFFSET 10 + #define EXYNOS5422_ARM_DN_MASK 0x03 + #define EXYNOS5422_KFC_UP_OFFSET 12 + #define EXYNOS5422_KFC_UP_MASK 0x03 + #define EXYNOS5422_KFC_DN_OFFSET 14 + #define EXYNOS5422_KFC_DN_MASK 0x03 From patchwork Thu Jul 18 14:30:38 2019 Content-Type: text/plain; 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Thu, 18 Jul 2019 14:31:29 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 3/9] soc: samsung: Add Exynos Adaptive Supply Voltage driver Date: Thu, 18 Jul 2019 16:30:38 +0200 Message-Id: <20190718143044.25066-4-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprOKsWRmVeSWpSXmKPExsWy7djP87qHmgxiDW78NrbYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxuuHc1kLXk9jqvjR 38jawLjsLmMXIyeHhICJxMMjp9m6GLk4hARWMEq0PnnODuF8YZSYdH4JE4TzmVFi7a05zF2M HGAtf7dXQ8SXM0r09s9iRuiYM50FZC6bgKFE79E+sB0iAsIS95YuBxvLLHCPSeL007NMIAlh gUCJNxeOsIHYLAKqEqsmnQWzeQWsJT5vaGOGOFBeYvWGA2A2p4CNxOG7TxlBBkkITGeXWHyt mxWiyEVi2r+nUB8JS7w6voUdwpaROD25hwWioZlRomf3bXYIZwKjxP3jC6A6rCUOH7/ICvIc s4CmxPpd+hBhR4lj7f+YIH7mk7jxVhAkzAxkTto2HRoUvBIdbUIQ1SoSv1dNZ4KwpSS6n/xn gbA9JCZMOMsKCaF+RomTE08yTWCUn4WwbAEj4ypG8dTS4tz01GLDvNRyveLE3OLSvHS95Pzc TYzA5HL63/FPOxi/Xko6xCjAwajEwxuQaxArxJpYVlyZe4hRgoNZSYT39kv9WCHelMTKqtSi /Pii0pzU4kOM0hwsSuK81QwPooUE0hNLUrNTUwtSi2CyTBycUg2MG2aHXk+4kc/o+PXoxB/b dZVbbs1nL6u4/Pj0Oa62E6JvBW8tshJqzLx/797Hi3neBZ61tpI+b/rmFC3X4zw6aYp0YtoC xr6julx95do6gWuW3HijlOqgeeEUD1d+y4/PBbZnbyStZIypahTZ08q9qbHtzu39Ux5GRG+t rJulPPO2TU78w0uflViKMxINtZiLihMBfHa1KSoDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsVy+t/xu7qHmgxiDQ5HW2ycsZ7VYv6Rc6wW /Y9fM1ucP7+B3WLT42usFpd3zWGz+Nx7hNFixvl9TBZrj9xlt1i09Qu7ReveI+wWh9+0s1ps fnCMzYHXY9OqTjaPzUvqPfq2rGL0+LxJLoAlSs+mKL+0JFUhI7+4xFYp2tDCSM/Q0kLPyMRS z9DYPNbKyFRJ384mJTUnsyy1SN8uQS/j9cO5rAWvpzFV/OhvZG1gXHaXsYuRg0NCwETi7/bq LkYuDiGBpYwSB9ccY4WIS0nMb1HqYuQEMoUl/lzrYgOxhQQ+MUqsOiQKYrMJGEr0Hu1jBLFF gGruLV3ODjKHWeAVk8Ttef+ZQBLCAv4Sbc/egNksAqoSqyadBRvEK2At8XlDGzPEAnmJ1RsO gNmcAjYSh+8+ZYRYZi0x++U1xgmMfAsYGVYxiqSWFuem5xYb6hUn5haX5qXrJefnbmIEhvi2 Yz8372C8tDH4EKMAB6MSD29ArkGsEGtiWXFl7iFGCQ5mJRHe2y/1Y4V4UxIrq1KL8uOLSnNS iw8xmgIdNZFZSjQ5Hxh/eSXxhqaG5haWhubG5sZmFkrivB0CB2OEBNITS1KzU1MLUotg+pg4 OKUaGGOfa4uwbwhpKNDsDF/y89qHKQy5DpUch4S69my5MHeL9tzNIv+rijmnbcxQ37DbJ7Lw n/+Jsq+dDoFb1/07/+mp7qLeteqaM0O+Pd+x6HhMgWbt8+RPBYu6TxRWeq5jOOR79tdfuRvv 3fJXdbn66qXHblh+85eE2iWlS8szDkRyPvZ/4Si6/owSS3FGoqEWc1FxIgCH2Fv8hwIAAA== X-CMS-MailID: 20190718143130eucas1p26f2058f47eb2f4020e1ddbf1619d1ac8 X-Msg-Generator: CA X-RootMTR: 20190718143130eucas1p26f2058f47eb2f4020e1ddbf1619d1ac8 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143130eucas1p26f2058f47eb2f4020e1ddbf1619d1ac8 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Adaptive Supply Voltage (ASV) driver adjusts CPU cluster operating points depending on exact revision of an SoC retrieved from the CHIPID block or the OTP memory. This allows for some power saving as for some CPU clock frequencies we can lower CPU cluster supply voltage comparing to safe values common to the all chip revisions. This patch adds support for Exynos5422/5800 SoC, it is partially based on code from https://github.com/hardkernel/linux repository, branch odroidxu4-4.14.y, files: arch/arm/mach-exynos/exynos5422-asv.[ch]. Tested on Odroid XU3, XU4, XU3 Lite. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - removed code for parsing the ASV OPP tables from DT, the ASV OPP tables moved to the driver; - converted to use the regmap API; - converted to normal platform driver. --- drivers/soc/samsung/Kconfig | 11 + drivers/soc/samsung/Makefile | 3 + drivers/soc/samsung/exynos-asv.c | 185 ++++++++++ drivers/soc/samsung/exynos-asv.h | 82 +++++ drivers/soc/samsung/exynos5422-asv.c | 499 +++++++++++++++++++++++++++ drivers/soc/samsung/exynos5422-asv.h | 25 ++ 6 files changed, 805 insertions(+) create mode 100644 drivers/soc/samsung/exynos-asv.c create mode 100644 drivers/soc/samsung/exynos-asv.h create mode 100644 drivers/soc/samsung/exynos5422-asv.c create mode 100644 drivers/soc/samsung/exynos5422-asv.h diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig index 2905f5262197..539cd95dd176 100644 --- a/drivers/soc/samsung/Kconfig +++ b/drivers/soc/samsung/Kconfig @@ -7,6 +7,17 @@ menuconfig SOC_SAMSUNG if SOC_SAMSUNG +config EXYNOS_ASV + bool "Exynos Adaptive Supply Voltage support" if COMPILE_TEST + depends on ARCH_EXYNOS || COMPILE_TEST + depends on EXYNOS_CHIPID + select EXYNOS_ASV_ARM if ARM && ARCH_EXYNOS + +# There is no need to enable these drivers for ARMv8 +config EXYNOS_ASV_ARM + bool "Exynos ASV ARMv7-specific driver extensions" if COMPILE_TEST + depends on EXYNOS_ASV + config EXYNOS_CHIPID bool "Exynos Chipid controller driver" if COMPILE_TEST depends on ARCH_EXYNOS || COMPILE_TEST diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile index 3b6a8797416c..edd1d6ea064d 100644 --- a/drivers/soc/samsung/Makefile +++ b/drivers/soc/samsung/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_EXYNOS_ASV) += exynos-asv.o +obj-$(CONFIG_EXYNOS_ASV_ARM) += exynos5422-asv.o + obj-$(CONFIG_EXYNOS_CHIPID) += exynos-chipid.o obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o diff --git a/drivers/soc/samsung/exynos-asv.c b/drivers/soc/samsung/exynos-asv.c new file mode 100644 index 000000000000..b1a7e0ba8870 --- /dev/null +++ b/drivers/soc/samsung/exynos-asv.c @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * Author: Sylwester Nawrocki + * + * Samsung Exynos SoC Adaptive Supply Voltage support + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "exynos-asv.h" +#include "exynos5422-asv.h" + +#define MHZ 1000000U + +static int exynos_asv_update_cpu_opps(struct exynos_asv *asv, + struct device *cpu) +{ + struct exynos_asv_subsys *subsys = NULL; + struct dev_pm_opp *opp; + unsigned int opp_freq; + int i; + + for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) { + if (of_device_is_compatible(cpu->of_node, + asv->subsys[i].cpu_dt_compat)) { + subsys = &asv->subsys[i]; + break; + } + } + if (!subsys) + return -EINVAL; + + for (i = 0; i < subsys->table.num_rows; i++) { + unsigned int new_voltage; + unsigned int voltage; + int timeout = 1000; + int err; + + opp_freq = exynos_asv_opp_get_frequency(subsys, i); + + opp = dev_pm_opp_find_freq_exact(cpu, opp_freq * MHZ, true); + if (IS_ERR(opp)) { + dev_info(asv->dev, "cpu%d opp%d, freq: %u missing\n", + cpu->id, i, opp_freq); + + continue; + } + + voltage = dev_pm_opp_get_voltage(opp); + new_voltage = asv->opp_get_voltage(subsys, i, voltage); + dev_pm_opp_put(opp); + + opp_freq *= MHZ; + dev_pm_opp_remove(cpu, opp_freq); + + while (--timeout) { + opp = dev_pm_opp_find_freq_exact(cpu, opp_freq, true); + if (IS_ERR(opp)) + break; + dev_pm_opp_put(opp); + msleep(1); + } + + err = dev_pm_opp_add(cpu, opp_freq, new_voltage); + if (err < 0) + dev_err(asv->dev, + "Failed to add OPP %u Hz/%u uV for cpu%d\n", + opp_freq, new_voltage, cpu->id); + } + + return 0; +} + +static int exynos_asv_update_opps(struct exynos_asv *asv) +{ + struct opp_table *last_opp_table = NULL; + struct device *cpu; + int ret, cpuid; + + for_each_possible_cpu(cpuid) { + struct opp_table *opp_table; + + cpu = get_cpu_device(cpuid); + if (!cpu) + continue; + + opp_table = dev_pm_opp_get_opp_table(cpu); + if (IS_ERR(opp_table)) + continue; + + if (!last_opp_table || opp_table != last_opp_table) { + last_opp_table = opp_table; + + ret = exynos_asv_update_cpu_opps(asv, cpu); + if (ret < 0) + dev_err(asv->dev, "Couldn't udate OPPs for cpu%d\n", + cpuid); + } + + dev_pm_opp_put_opp_table(opp_table); + } + + return 0; +} + +static int exynos_asv_probe(struct platform_device *pdev) +{ + int (*probe_func)(struct exynos_asv *asv); + struct exynos_asv *asv; + struct device *cpu_dev; + u32 product_id = 0; + int ret, i; + + cpu_dev = get_cpu_device(0); + ret = dev_pm_opp_get_opp_count(cpu_dev); + if (ret < 0) + return -EPROBE_DEFER; + + asv = kcalloc(1, sizeof(*asv), GFP_KERNEL); + if (!asv) + return -ENOMEM; + + asv->chipid_regmap = syscon_node_to_regmap(pdev->dev.of_node); + if (IS_ERR(asv->chipid_regmap)) { + dev_err(&pdev->dev, "Could not find syscon regmap\n"); + return PTR_ERR(asv->chipid_regmap); + } + + regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID, &product_id); + + switch (product_id & EXYNOS_MASK) { + case 0xE5422000: + probe_func = exynos5422_asv_init; + break; + default: + dev_err(&pdev->dev, "Unsupported product ID: %#x", product_id); + return -ENODEV; + } + + ret = of_property_read_u32(pdev->dev.of_node, "samsung,asv-bin", + &asv->of_bin); + if (ret < 0) + asv->of_bin = -EINVAL; + + asv->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, asv); + + for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) + asv->subsys[i].asv = asv; + + ret = probe_func(asv); + if (ret < 0) + return ret; + + return exynos_asv_update_opps(asv); +} + +static const struct of_device_id exynos_asv_of_device_ids[] = { + { .compatible = "samsung,exynos4210-chipid" }, + {} +}; + +static struct platform_driver exynos_asv_driver = { + .driver = { + .name = "exynos-asv", + .of_match_table = exynos_asv_of_device_ids, + }, + .probe = exynos_asv_probe, +}; +module_platform_driver(exynos_asv_driver); diff --git a/drivers/soc/samsung/exynos-asv.h b/drivers/soc/samsung/exynos-asv.h new file mode 100644 index 000000000000..d0a5d603093d --- /dev/null +++ b/drivers/soc/samsung/exynos-asv.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * Author: Sylwester Nawrocki + * + * Samsung Exynos SoC Adaptive Supply Voltage support + */ +#ifndef _EXYNOS_ASV_H +#define _EXYNOS_ASV_H + +enum { + EXYNOS_ASV_SUBSYS_ID_ARM, + EXYNOS_ASV_SUBSYS_ID_EGL = EXYNOS_ASV_SUBSYS_ID_ARM, + EXYNOS_ASV_SUBSYS_ID_KFC, + EXYNOS_ASV_SUBSYS_ID_INT, + EXYNOS_ASV_SUBSYS_ID_MIF, + EXYNOS_ASV_SUBSYS_ID_G3D, + EXYNOS_ASV_SUBSYS_ID_CAM, + EXYNOS_ASV_SUBSYS_ID_MAX +}; + +struct regmap; + +/* HPM, IDS values to select target group */ +struct asv_limit_entry { + unsigned int hpm; + unsigned int ids; +}; + +struct exynos_asv_table { + unsigned int num_rows; + unsigned int num_cols; + u32 *buf; +}; + +struct exynos_asv_subsys { + struct exynos_asv *asv; + char *cpu_dt_compat; + int id; + struct exynos_asv_table table; + + unsigned int base_volt; + unsigned int offset_volt_h; + unsigned int offset_volt_l; +}; + +struct exynos_asv { + struct device *dev; + struct regmap *chipid_regmap; + struct exynos_asv_subsys subsys[2]; + + int (*opp_get_voltage)(struct exynos_asv_subsys *subs, int level, + unsigned int voltage); + unsigned int group; + unsigned int table; + + /* True if SG fields from PKG_ID register should be used */ + bool use_sg; + /* ASV bin read from DT */ + int of_bin; +}; + +static inline u32 __asv_get_table_entry(struct exynos_asv_table *table, + unsigned int row, unsigned int col) +{ + return table->buf[row * (table->num_cols) + col]; +} + +static inline u32 exynos_asv_opp_get_voltage(struct exynos_asv_subsys *subsys, + unsigned int level, unsigned int group) +{ + return __asv_get_table_entry(&subsys->table, level, group + 1); +} + +static inline u32 exynos_asv_opp_get_frequency(struct exynos_asv_subsys *subsys, + unsigned int level) +{ + return __asv_get_table_entry(&subsys->table, level, 0); +} + +#endif /* _EXYNOS_ASV_H */ diff --git a/drivers/soc/samsung/exynos5422-asv.c b/drivers/soc/samsung/exynos5422-asv.c new file mode 100644 index 000000000000..5fd673a6a733 --- /dev/null +++ b/drivers/soc/samsung/exynos5422-asv.c @@ -0,0 +1,499 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Samsung Exynos 5422 SoC Adaptive Supply Voltage support + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "exynos-asv.h" + +#define ASV_GROUPS_NUM 14 +#define ASV_ARM_DVFS_NUM 20 +#define ASV_ARM_BIN2_DVFS_NUM 17 +#define ASV_KFC_DVFS_NUM 14 +#define ASV_KFC_BIN2_DVFS_NUM 12 + +static const u32 asv_arm_table[][ASV_ARM_DVFS_NUM][ASV_GROUPS_NUM + 1] = { +{ + /* ARM 0, 1 */ + { 2100, 1362500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, + 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000 }, + { 2000, 1312500, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, + 1237500, 1225000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1900, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, + 1162500, 1150000, 1162500, 1150000, 1137500, 1125000, 1112500 }, + { 1800, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, + 1112500, 1100000, 1112500, 1100000, 1087500, 1075000, 1062500 }, + { 1700, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, + 1075000, 1062500, 1075000, 1062500, 1050000, 1037500, 1025000 }, + { 1600, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, + 1037500, 1025000, 1037500, 1025000, 1012500, 1000000, 987500 }, + { 1500, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, + 1000000, 987500, 1000000, 987500, 975000, 962500, 950000 }, + { 1400, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, + 975000, 962500, 975000, 962500, 950000, 937500, 925000 }, + { 1300, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, + 962500, 950000, 962500, 950000, 937500, 925000, 912500 }, + { 1200, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 937500, 925000, 912500, 900000, 900000 }, + { 1100, 1000000, 987500, 975000, 962500, 950000, 937500, 925000, + 912500, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 1000, 975000, 962500, 950000, 937500, 925000, 912500, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 900, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 800, 925000, 912500, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 700, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* ARM 2 */ + { 2100, 1362500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, + 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000 }, + { 2000, 1312500, 1312500, 1312500, 1300000, 1275000, 1262500, 1250000, + 1237500, 1225000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1900, 1262500, 1250000, 1250000, 1237500, 1212500, 1200000, 1187500, + 1175000, 1162500, 1175000, 1162500, 1150000, 1137500, 1125000 }, + { 1800, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, + 1125000, 1112500, 1125000, 1112500, 1100000, 1087500, 1075000 }, + { 1700, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, + 1087500, 1075000, 1087500, 1075000, 1062500, 1050000, 1037500 }, + { 1600, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, + 1050000, 1037500, 1050000, 1037500, 1025000, 1012500, 1000000 }, + { 1500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 1012500, 1000000, 987500, 975000, 962500 }, + { 1400, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, + 987500, 975000, 987500, 975000, 962500, 950000, 937500 }, + { 1300, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, + 962500, 950000, 962500, 950000, 937500, 925000, 912500 }, + { 1200, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 937500, 925000, 912500, 900000, 900000 }, + { 1100, 1000000, 987500, 975000, 962500, 950000, 937500, 925000, + 912500, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 1000, 975000, 962500, 950000, 937500, 925000, 912500, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 900, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 800, 925000, 912500, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 700, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* ARM 3 */ + { 2100, 1362500, 1362500, 1350000, 1337500, 1325000, 1312500, 1300000, + 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000 }, + { 2000, 1312500, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, + 1237500, 1225000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1900, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, + 1175000, 1162500, 1175000, 1162500, 1150000, 1137500, 1125000 }, + { 1800, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, + 1125000, 1112500, 1125000, 1112500, 1100000, 1087500, 1075000 }, + { 1700, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, + 1087500, 1075000, 1087500, 1075000, 1062500, 1050000, 1037500 }, + { 1600, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, + 1050000, 1037500, 1050000, 1037500, 1025000, 1012500, 1000000 }, + { 1500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 1012500, 1000000, 987500, 975000, 962500 }, + { 1400, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, + 987500, 975000, 987500, 975000, 962500, 950000, 937500 }, + { 1300, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, + 962500, 950000, 962500, 950000, 937500, 925000, 912500 }, + { 1200, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 937500, 925000, 912500, 900000, 900000 }, + { 1100, 1000000, 987500, 975000, 962500, 950000, 937500, 925000, + 912500, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 1000, 975000, 962500, 950000, 937500, 925000, 912500, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 900, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 800, 925000, 912500, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 700, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* ARM bin 2 */ + { 1800, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, + 1150000, 1137500, 1150000, 1137500, 1125000, 1112500, 1100000 }, + { 1700, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, + 1112500, 1100000, 1112500, 1100000, 1087500, 1075000, 1062500 }, + { 1600, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, + 1075000, 1062500, 1075000, 1062500, 1050000, 1037500, 1025000 }, + { 1500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, + 1037500, 1025000, 1037500, 1025000, 1012500, 1000000, 987500 }, + { 1400, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 1012500, 1000000, 987500, 975000, 962500 }, + { 1300, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, + 1000000, 987500, 1000000, 987500, 975000, 962500, 950000 }, + { 1200, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, + 975000, 962500, 975000, 962500, 950000, 937500, 925000 }, + { 1100, 1037500, 1025000, 1012500, 1000000, 987500, 975000, 962500, + 950000, 937500, 950000, 937500, 925000, 912500, 900000 }, + { 1000, 1012500, 1000000, 987500, 975000, 962500, 950000, 937500, + 925000, 912500, 925000, 912500, 900000, 900000, 900000 }, + { 900, 987500, 975000, 962500, 950000, 937500, 925000, 912500, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 800, 962500, 950000, 937500, 925000, 912500, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 700, 937500, 925000, 912500, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +} +}; + +static const u32 asv_kfc_table[][ASV_KFC_DVFS_NUM][ASV_GROUPS_NUM + 1] = { +{ + /* KFC 0, 1 */ + { 1500000, 1300000, 1300000, 1300000, 1287500, 1287500, 1287500, 1275000, + 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1400000, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, + 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500 }, + { 1300000, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, + 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500 }, + { 1200000, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, + 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500 }, + { 1100000, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, + 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000 }, + { 1000000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 987500, 975000, 962500, 950000, 937500 }, + { 900000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, + 975000, 962500, 950000, 937500, 925000, 912500, 900000 }, + { 800000, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 912500, 900000, 900000, 900000, 900000 }, + { 700000, 987500, 975000, 962500, 950000, 937500, 925000, 912500, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600000, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500000, 912500, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400000, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300000, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200000, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* KFC 2 */ + { 1500, 1300000, 1300000, 1300000, 1287500, 1287500, 1287500, 1275000, + 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1400, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, + 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500 }, + { 1300, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, + 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500 }, + { 1200, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, + 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500 }, + { 1100, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, + 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000 }, + { 1000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 987500, 975000, 962500, 950000, 937500 }, + { 900, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, + 975000, 962500, 950000, 937500, 925000, 912500, 900000 }, + { 800, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 912500, 900000, 900000, 900000, 900000 }, + { 700, 987500, 975000, 962500, 950000, 937500, 925000, 912500, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 912500, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* KFC 3 */ + { 1500, 1300000, 1300000, 1300000, 1287500, 1287500, 1287500, 1275000, + 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500 }, + { 1400, 1275000, 1262500, 1250000, 1237500, 1225000, 1212500, 1200000, + 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500 }, + { 1300, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, + 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500 }, + { 1200, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, + 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500 }, + { 1100, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, + 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000 }, + { 1000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, + 1012500, 1000000, 987500, 975000, 962500, 950000, 937500 }, + { 900, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, + 975000, 962500, 950000, 937500, 925000, 912500, 900000 }, + { 800, 1025000, 1012500, 1000000, 987500, 975000, 962500, 950000, + 937500, 925000, 912500, 900000, 900000, 900000, 900000 }, + { 700, 987500, 975000, 962500, 950000, 937500, 925000, 912500, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 600, 950000, 937500, 925000, 912500, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 912500, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +}, { + /* KFC bin 2 */ + { 1300, 1250000, 1237500, 1225000, 1212500, 1200000, 1187500, 1175000, + 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500 }, + { 1200, 1200000, 1187500, 1175000, 1162500, 1150000, 1137500, 1125000, + 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500 }, + { 1100, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1087500, + 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000 }, + { 1000, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1050000, + 1037500, 1025000, 1012500, 1000000, 987500, 975000, 962500 }, + { 900, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, + 1000000, 987500, 975000, 962500, 950000, 937500, 925000 }, + { 800, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, + 962500, 950000, 937500, 925000, 912500, 900000, 900000 }, + { 700, 1012500, 1000000, 987500, 975000, 962500, 950000, 937500, + 925000, 912500, 900000, 900000, 900000, 900000, 900000 }, + { 600, 975000, 962500, 950000, 937500, 925000, 912500, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 500, 937500, 925000, 912500, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 400, 925000, 912500, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 300, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, + { 200, 900000, 900000, 900000, 900000, 900000, 900000, 900000, + 900000, 900000, 900000, 900000, 900000, 900000, 900000 }, +} +}; + +static const struct asv_limit_entry __asv_limits[ASV_GROUPS_NUM] = { + { 13, 55 }, + { 21, 65 }, + { 25, 69 }, + { 30, 72 }, + { 36, 74 }, + { 43, 76 }, + { 51, 78 }, + { 65, 80 }, + { 81, 82 }, + { 98, 84 }, + { 119, 87 }, + { 135, 89 }, + { 150, 92 }, + { 999, 999 }, +}; + +static int exynos5422_asv_get_group(struct exynos_asv *asv) +{ + unsigned int pkgid_reg, auxi_reg; + int hpm, ids, i; + + regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PKG_ID, &pkgid_reg); + regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_AUX_INFO, &auxi_reg); + + if (asv->use_sg) { + u32 sga = (pkgid_reg >> EXYNOS5422_SG_A_OFFSET) & + EXYNOS5422_SG_A_MASK; + + u32 sgb = (pkgid_reg >> EXYNOS5422_SG_B_OFFSET) & + EXYNOS5422_SG_B_MASK; + + if ((pkgid_reg >> EXYNOS5422_SG_BSIGN_OFFSET) & + EXYNOS5422_SG_BSIGN_MASK) + return sga + sgb; + else + return sga - sgb; + } + + hpm = (auxi_reg >> EXYNOS5422_TMCB_OFFSET) & EXYNOS5422_TMCB_MASK; + ids = (pkgid_reg >> EXYNOS5422_IDS_OFFSET) & EXYNOS5422_IDS_MASK; + + for (i = 0; i < ASV_GROUPS_NUM; i++) { + if (ids <= __asv_limits[i].ids) + break; + if (hpm <= __asv_limits[i].hpm) + break; + } + if (i < ASV_GROUPS_NUM) + return i; + + return 0; +} + +static int __asv_offset_voltage(unsigned int index) +{ + switch (index) { + case 1: + return 12500; + case 2: + return 50000; + case 3: + return 25000; + default: + return 0; + }; +} + +static void exynos5422_asv_offset_voltage_setup(struct exynos_asv *asv) +{ + struct exynos_asv_subsys *subsys; + unsigned int reg, value; + + regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_AUX_INFO, ®); + + /* ARM offset voltage setup */ + subsys = &asv->subsys[EXYNOS_ASV_SUBSYS_ID_ARM]; + + subsys->base_volt = 1000000; + + value = (reg >> EXYNOS5422_ARM_UP_OFFSET) & EXYNOS5422_ARM_UP_MASK; + subsys->offset_volt_h = __asv_offset_voltage(value); + + value = (reg >> EXYNOS5422_ARM_DN_OFFSET) & EXYNOS5422_ARM_DN_MASK; + subsys->offset_volt_l = __asv_offset_voltage(value); + + /* KFC offset voltage setup */ + subsys = &asv->subsys[EXYNOS_ASV_SUBSYS_ID_KFC]; + + subsys->base_volt = 1000000; + + value = (reg >> EXYNOS5422_KFC_UP_OFFSET) & EXYNOS5422_KFC_UP_MASK; + subsys->offset_volt_h = __asv_offset_voltage(value); + + value = (reg >> EXYNOS5422_KFC_DN_OFFSET) & EXYNOS5422_KFC_DN_MASK; + subsys->offset_volt_l = __asv_offset_voltage(value); +} + +static int exynos5422_asv_opp_get_voltage(struct exynos_asv_subsys *subsys, + int level, unsigned int volt) +{ + unsigned int asv_volt; + + if (level >= subsys->table.num_rows) + return volt; + + asv_volt = exynos_asv_opp_get_voltage(subsys, level, + subsys->asv->group); + + if (volt > subsys->base_volt) + asv_volt += subsys->offset_volt_h; + else + asv_volt += subsys->offset_volt_l; + + return asv_volt; +} + +static unsigned int exynos5422_asv_parse_table(struct exynos_asv *asv, + unsigned int pkg_id) +{ + return (pkg_id >> EXYNOS5422_TABLE_OFFSET) & EXYNOS5422_TABLE_MASK; +} + +static bool exynos5422_asv_parse_bin2(struct exynos_asv *asv, + unsigned int pkg_id) +{ + return (pkg_id >> EXYNOS5422_BIN2_OFFSET) & EXYNOS5422_BIN2_MASK; +} + +static bool exynos5422_asv_parse_sg(struct exynos_asv *asv, + unsigned int pkg_id) +{ + return ((pkg_id >> EXYNOS5422_USESG_OFFSET) & EXYNOS5422_USESG_MASK); +} + +int exynos5422_asv_init(struct exynos_asv *asv) +{ + struct exynos_asv_subsys *subsys; + unsigned int table_index; + unsigned int pkg_id; + bool bin2; + + regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PKG_ID, &pkg_id); + + if (asv->of_bin == 2) { + bin2 = true; + asv->use_sg = false; + } else { + asv->use_sg = exynos5422_asv_parse_sg(asv, pkg_id); + bin2 = exynos5422_asv_parse_bin2(asv, pkg_id); + } + + asv->group = exynos5422_asv_get_group(asv); + asv->table = exynos5422_asv_parse_table(asv, pkg_id); + + exynos5422_asv_offset_voltage_setup(asv); + + if (bin2) { + table_index = 3; + } else { + if (asv->table == 2 || asv->table == 3) + table_index = asv->table - 1; + else + table_index = 0; + } + + subsys = &asv->subsys[EXYNOS_ASV_SUBSYS_ID_ARM]; + subsys->cpu_dt_compat = "arm,cortex-a15"; + if (bin2) + subsys->table.num_rows = ASV_ARM_BIN2_DVFS_NUM; + else + subsys->table.num_rows = ASV_ARM_DVFS_NUM; + subsys->table.num_cols = ASV_GROUPS_NUM + 1; + subsys->table.buf = (u32 *)asv_arm_table[table_index]; + + subsys = &asv->subsys[EXYNOS_ASV_SUBSYS_ID_KFC]; + subsys->cpu_dt_compat = "arm,cortex-a7"; + if (bin2) + subsys->table.num_rows = ASV_KFC_BIN2_DVFS_NUM; + else + subsys->table.num_rows = ASV_KFC_DVFS_NUM; + subsys->table.num_cols = ASV_GROUPS_NUM + 1; + subsys->table.buf = (u32 *)asv_kfc_table[table_index]; + + asv->opp_get_voltage = exynos5422_asv_opp_get_voltage; + + return 0; +} diff --git a/drivers/soc/samsung/exynos5422-asv.h b/drivers/soc/samsung/exynos5422-asv.h new file mode 100644 index 000000000000..d8f108fcc39b --- /dev/null +++ b/drivers/soc/samsung/exynos5422-asv.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Samsung Exynos 5422 SoC Adaptive Supply Voltage support + */ + +#ifndef __EXYNOS5422_ASV_H +#define __EXYNOS5422_ASV_H + +#include + +struct exynos_asv; + +#ifdef CONFIG_EXYNOS_ASV_ARM +int exynos5422_asv_init(struct exynos_asv *asv); +#else +static inline int exynos5422_asv_init(struct exynos_asv *asv) +{ + return -ENOTSUPP; +} +#endif + +#endif /* __EXYNOS5422_ASV_H */ From patchwork Thu Jul 18 14:30:39 2019 Content-Type: text/plain; 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[PATCH v2 4/9] ARM: EXYNOS: enable exynos_chipid for ARCH_EXYNOS Date: Thu, 18 Jul 2019 16:30:39 +0200 Message-Id: <20190718143044.25066-5-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCKsWRmVeSWpSXmKPExsWy7djP87pHmgxiDaYv4bPYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxt+F59kLJrJXfN2y i62BsZWti5GDQ0LARGL2B98uRi4OIYEVjBLzth5i6mLkBHK+MEq8eOUOkfjMKHFt7hkWkARI w49Zr9khEssZJdacXccK4QB1zDz2gh2kik3AUKL3aB8jiC0iICxxb+lysA5mgXtMEqefngXb ISzgKfG9/wNYEYuAqsTB721gNq+AtcT1BS/ZIdbJS6zecIAZxOYUsJE4fPcpI8ggCYHJ7BJL LnazQhS5SHTdWQl1n7DEq+NboJplJE5P7mGBaGhmlOjZfZsdwpnAKHH/+AJGiCpricPHL7KC goNZQFNi/S59iLCjxKfFb9khocQnceOtIEiYGcictG06M0SYV6KjTQiiWkXi96rpTBC2lET3 k/9Q53hI7Lk6GxpC/YwSr/6/YZ7AKD8LYdkCRsZVjOKppcW56anFRnmp5XrFibnFpXnpesn5 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8SFGU6CjJjJLiSbnAyMwryTe0NTQ3MLS0NzY3NjMQkmct0PgYIyQQHpiSWp2ampBahFMHxMH p1QDo+XFEFXPw0sFu/8LzNQ1mf5K0qhGg19EjlnFq4i/Wz9v72ENn3a+8kCmy+y8zD+FfuvO rBBT9173Rsx32XufgKCE2tSCW4t+7QuzV1B+lLakpkzn30mz98Y3kwQPHuW0cjSx4HnpcXz1 FA/br3MmaT0Le2wQfOS+osrV49L96rddvzKfjKtXYinOSDTUYi4qTgQA1kFPpIgCAAA= X-CMS-MailID: 20190718143131eucas1p2e1afc9fe816fff52ee4d12e0979eeb4c X-Msg-Generator: CA X-RootMTR: 20190718143131eucas1p2e1afc9fe816fff52ee4d12e0979eeb4c X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143131eucas1p2e1afc9fe816fff52ee4d12e0979eeb4c References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey As now we have chipid driver to initialize SoC related information let's include it in build by default. Signed-off-by: Pankaj Dubey Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - none --- arch/arm/mach-exynos/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 1c518b8ee520..6fc4af312361 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -13,6 +13,7 @@ menuconfig ARCH_EXYNOS select ARM_AMBA select ARM_GIC select COMMON_CLK_SAMSUNG + select EXYNOS_CHIPID select EXYNOS_THERMAL select EXYNOS_PMU select EXYNOS_SROM From patchwork Thu Jul 18 14:30:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049063 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B577713AC for ; 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Thu, 18 Jul 2019 14:31:32 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 5/9] ARM64: EXYNOS: enable exynos_chipid for ARCH_EXYNOS Date: Thu, 18 Jul 2019 16:30:40 +0200 Message-Id: <20190718143044.25066-6-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCKsWRmVeSWpSXmKPExsWy7djPc7pHmwxiDXYflbHYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxu4Zn5gLmtkr7u8p bWD8y9rFyMkhIWAisXXPNZYuRi4OIYEVjBIvdnUyQzhfGCX+TdvNCuF8ZpR48+8JG0zLgfsX 2SASyxklvp04wALXcq9lDlgVm4ChRO/RPkYQW0RAWOLe0uXsIEXMAveYJE4/PcsEkhAW8JaY dH4XC4jNIqAq8bPzMlicV8Ba4sv7oywQ6+QlVm84wAxicwrYSBy++5QRZJCEwGR2iXPzdjJB FLlIrLi4Deo+YYlXx7ewQ9gyEv93zmeCaGhmlOjZfZsdwpnAKHH/+AJGiCpricPHLwK9ygF0 n6bE+l36IKaEgKPE16vuECafxI23giDFzEDmpG3TmSHCvBIdbUIQM1Qkfq+aDnWNlET3k/9Q 53tInPj4gB0SQP2MEpvPrGSewCg/C2HXAkbGVYziqaXFuempxcZ5qeV6xYm5xaV56XrJ+bmb GIFp5fS/4193MO77k3SIUYCDUYmHNyDXIFaINbGsuDL3EKMEB7OSCO/tl/qxQrwpiZVVqUX5 8UWlOanFhxilOViUxHmrGR5ECwmkJ5akZqemFqQWwWSZODilGhjTrrw7qLbihnbKkY85xy4r SuzPXTkzuEk0TO/nvF7H89mTm9dM4jc8dvZ3Rt+hE9Ktm/vVC5Yc47Zi2DGl25ZV8nrqraRr 15yuX/koJnGO11HqV0ZiFJ++op7KTgchpUkfW/Vj9p6XKeO90Xjy7Rt+oT9LXZbc2+y9PoDP yJSZq+HvgVXSUXeVWIozEg21mIuKEwFcQ6qNJwMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsVy+t/xu7pHmgxiDfZP0bTYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexu4Zn5gLmtkr7u8pbWD8y9rFyMkhIWAiceD+RbYu Ri4OIYGljBIvT61n72LkAEpIScxvUYKoEZb4c60LquYTo8TPF78YQRJsAoYSvUf7wGwRoKJ7 S5ezgxQxC7xikrg97z8TSEJYwFti0vldLCA2i4CqxM/Oy2BxXgFriS/vj7JAbJCXWL3hADOI zSlgI3H47lOwoUJANbNfXmOcwMi3gJFhFaNIamlxbnpusZFecWJucWleul5yfu4mRmCIbzv2 c8sOxq53wYcYBTgYlXh4A3INYoVYE8uKK3MPMUpwMCuJ8N5+qR8rxJuSWFmVWpQfX1Sak1p8 iNEU6KiJzFKiyfnA+MsriTc0NTS3sDQ0NzY3NrNQEuftEDgYIySQnliSmp2aWpBaBNPHxMEp 1cC46MLbm62icUcsVhtau55K37nt/grxneb8R8U7uY/dzl9Ssfnx/1vzgyLcLj822FjLumbf pEDv2yL9q445vty1gOum/HQFw8+xNofd9hxPi7tw/0iV1vPcMN2Y+wsTzihKhTw4NFMs+Nh8 3Wfrbi5+7PVKJGqrq+/2Lbwb/6bfZtjM65ivsbjTV4mlOCPRUIu5qDgRAKYVWIyHAgAA X-CMS-MailID: 20190718143132eucas1p2afecae86f2ef17aa8a4a99df8ffa47d9 X-Msg-Generator: CA X-RootMTR: 20190718143132eucas1p2afecae86f2ef17aa8a4a99df8ffa47d9 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143132eucas1p2afecae86f2ef17aa8a4a99df8ffa47d9 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch enables exynos_chipid driver for ARCH_EXYNOS based SoC. Signed-off-by: Pankaj Dubey Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - none --- arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index d07fc063c930..e432d26f37d3 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -74,6 +74,7 @@ config ARCH_BRCMSTB config ARCH_EXYNOS bool "ARMv8 based Samsung Exynos SoC family" select COMMON_CLK_SAMSUNG + select EXYNOS_CHIPID select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS select EXYNOS_PMU select HAVE_S3C2410_WATCHDOG if WATCHDOG From patchwork Thu Jul 18 14:30:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049061 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4A6CA13BD for ; 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Thu, 18 Jul 2019 14:31:33 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 6/9] ARM: EXYNOS: Enable exynos-asv driver for ARCH_EXYNOS Date: Thu, 18 Jul 2019 16:30:41 +0200 Message-Id: <20190718143044.25066-7-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMKsWRmVeSWpSXmKPExsWy7djPc7rHmgxiDQ726VlsnLGe1WL+kXOs Fv2PXzNbnD+/gd1i0+NrrBaXd81hs/jce4TRYsb5fUwWa4/cZbdYtPULu0Xr3iPsFofftLNa bH5wjM2B12PTqk42j81L6j36tqxi9Pi8SS6AJYrLJiU1J7MstUjfLoEr48H7NUwFX1kq7j39 yNzA2M3SxcjJISFgIvHw3VK2LkYuDiGBFYwSF39+ZoVwvjBKHFnewwjhfGaUaOs+AteyYNU2 dojEckaJje/ns8G1PPp+hxmkik3AUKL3aB8jiC0iICxxb+lysA5mgXtMEqefnmUCSQgL+Et0 HbwANJaDg0VAVWJXSxhImFfAWuLZyw1Q2+QlVm84ADaTU8BG4vDdp2AnSQhMZpd4/R3kDA4g x0Vi0hNRiHphiVfHt7BD2DIS/3fOZ4Kob2aU6Nl9mx3CmcAocf/4AkaIKmuJw8cvsoIMYhbQ lFi/Sx9ipqPExz/WECafxI23giDFzEDmpG3TmSHCvBIdbUIQM1Qkfq+azgRhS0l0P/kPdb2H xJ7dLdAQ7WeUODVzBvsERvlZCLsWMDKuYhRPLS3OTU8tNs5LLdcrTswtLs1L10vOz93ECEwq p/8d/7qDcd+fpEOMAhyMSjy8AbkGsUKsiWXFlbmHGCU4mJVEeG+/1I8V4k1JrKxKLcqPLyrN SS0+xCjNwaIkzlvN8CBaSCA9sSQ1OzW1ILUIJsvEwSnVwGh5UWhSozLPhrl1W/ev6hWpy456 m34u8XWbT4vVznQzc29rp4rfHjtn6qZOfSXTlz33tPyUeHHN32L7+QJneDPti5yxOPS5avCV YrVr1/SLbj+e8UxWSzX6Vpyv1u3yH432Ld4tW2f0HlvMHhbcsOFr7plEs2gmJi3LnIAeE+3q tD33kvinKbEUZyQaajEXFScCAGThMngmAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMLMWRmVeSWpSXmKPExsVy+t/xu7pHmwxiDQ7utLHYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexoP3a5gKvrJU3Hv6kbmBsZuli5GTQ0LARGLBqm3s ILaQwFJGiUdzgroYOYDiUhLzW5QgSoQl/lzrYuti5AIq+cQosXDJK0aQBJuAoUTv0T4wWwSo 6N7S5ewgRcwCr5gkbs/7zwSSEBbwlZjw8Rc7yFAWAVWJXS1hIGFeAWuJZy83QN0gL7F6wwFm EJtTwEbi8N2njBD3WEvMfnmNcQIj3wJGhlWMIqmlxbnpucVGesWJucWleel6yfm5mxiBAb7t 2M8tOxi73gUfYhTgYFTi4Q3INYgVYk0sK67MPcQowcGsJMJ7+6V+rBBvSmJlVWpRfnxRaU5q 8SFGU6CbJjJLiSbnA6MvryTe0NTQ3MLS0NzY3NjMQkmct0PgYIyQQHpiSWp2ampBahFMHxMH p1QDo3xVe8SvVX4++TZTgna912+6XnK4MPyklKmMYcXZyC3fkvcq5eyd23Mg4PP84/c2mX6b oyE/ddXfvwsnqlSlxidd2zfV5BCr6e+nqgUsmR/vx08qvWhwY7Kv/gROG+6WILuJVhvTG2PD a+6tVgzd85AlyyEgJI792bWQub/mLQo/ntXx6Ei0nhJLcUaioRZzUXEiAMKpY9CGAgAA X-CMS-MailID: 20190718143134eucas1p2aed09e2171d0d2d6b916dddac3637017 X-Msg-Generator: CA X-RootMTR: 20190718143134eucas1p2aed09e2171d0d2d6b916dddac3637017 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143134eucas1p2aed09e2171d0d2d6b916dddac3637017 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable exynos-asv driver for Exynos 32-bit SoCs. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - none --- arch/arm/mach-exynos/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 6fc4af312361..c6ed153c3151 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -13,6 +13,7 @@ menuconfig ARCH_EXYNOS select ARM_AMBA select ARM_GIC select COMMON_CLK_SAMSUNG + select EXYNOS_ASV select EXYNOS_CHIPID select EXYNOS_THERMAL select EXYNOS_PMU From patchwork Thu Jul 18 14:30:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049055 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 563D513AC for ; Thu, 18 Jul 2019 14:31:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45CFF28607 for ; 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Thu, 18 Jul 2019 14:31:35 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20190718143135eusmtrp24b5cb245cdbe89dd958311dd3713605f~yhtrjOpKq0338803388eusmtrp2P; Thu, 18 Jul 2019 14:31:35 +0000 (GMT) X-AuditID: cbfec7f5-b75ff700000010e5-df-5d3082c87f3f Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 71.B6.04140.7C2803D5; Thu, 18 Jul 2019 15:31:35 +0100 (BST) Received: from AMDC3061.DIGITAL.local (unknown [106.120.51.75]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20190718143134eusmtip179e52ba19433ae147a2f44bf22b2128f~yhtq6_bYH1589015890eusmtip1P; Thu, 18 Jul 2019 14:31:34 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 7/9] soc: samsung: Update the CHIP ID DT binding documentation Date: Thu, 18 Jul 2019 16:30:42 +0200 Message-Id: <20190718143044.25066-8-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKKsWRmVeSWpSXmKPExsWy7djP87onmgxiDZ6s4bLYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxrYDB5kKJvJUrDn3 h72BcTZXFyMnh4SAicTU6U1sXYxcHEICKxgldv7cAeV8YZRY9KOXCcL5zCjxofU3O0zL6ssf WSASyxkl+hevZ4JrOdD7gQWkik3AUKL3aB8jiC0iICxxb+lydpAiZoF7TBKnn55lAkkICwRL bPwzGcxmEVCVWHj8LpjNK2At8fVVGyPEOnmJ1RsOMIPYnAI2EofvPmUEGSQhMJld4vqetVBF LhKfHvyDuk9Y4tXxLVC2jMT/nfOZIBqaGSV6dt9mh3AmMErcP74Aqtta4vDxi6xdjBxA92lK rN+lDxF2lFjRsAosLCHAJ3HjrSBImBnInLRtOjNEmFeio00IolpF4veq6UwQtpRE95P/LBAl HhLTbyVCAqgfGIybPrJNYJSfhbBrASPjKkbx1NLi3PTUYuO81HK94sTc4tK8dL3k/NxNjMDE cvrf8a87GPf9STrEKMDBqMTDG5BrECvEmlhWXJl7iFGCg1lJhPf2S/1YId6UxMqq1KL8+KLS nNTiQ4zSHCxK4rzVDA+ihQTSE0tSs1NTC1KLYLJMHJxSDYwqh5Y2cuy8n+v3YAfjs/8f5iu+ LvszQ2FT6UemlOw50yLnLm1fujrDZNH0rNXbYn+0XhIQTZ22q/vX4bzFd95lTNyp93bPw+Xv P3QxCuy/WpOssfDLuUn7mW8la0hn/LP0cJojdDmui1tYXODeA+Eft/m87SbsvOQxRaq+mOVU TqHtlJVGuTIuSizFGYmGWsxFxYkAt4+NIygDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsVy+t/xu7rHmwxiDc4u5LXYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexrYDB5kKJvJUrDn3h72BcTZXFyMnh4SAicTqyx9Z uhi5OIQEljJKdK75w9bFyAGUkJKY36IEUSMs8edaFxtEzSdGiRWvDzKBJNgEDCV6j/Yxgtgi QEX3li5nByliFnjFJHF73n+wImGBQIn9V7+wg9gsAqoSC4/fBYvzClhLfH3VxgixQV5i9YYD zCA2p4CNxOG7T8HiQkA1s19eY5zAyLeAkWEVo0hqaXFuem6xkV5xYm5xaV66XnJ+7iZGYJBv O/Zzyw7GrnfBhxgFOBiVeHgDcg1ihVgTy4orcw8xSnAwK4nw3n6pHyvEm5JYWZValB9fVJqT WnyI0RToqInMUqLJ+cAIzCuJNzQ1NLewNDQ3Njc2s1AS5+0QOBgjJJCeWJKanZpakFoE08fE wSnVwKg89WWlto+hk4D0Kvavj5UEz2Ye8/W94XUppkYuxOWiG8O/sJojj9oEAkLTWYQWtrMm H2TZuCp+ZfTLiv81VVN32XEUahyM5orf1Wotv5AtmPvtP7XJj2aWsecyc+aa/utxuKg0SY3x TBTfbtmTQW7V7IVe/6W7DCTmy04/Ly89t+DJ04PrlViKMxINtZiLihMBgSTxIogCAAA= X-CMS-MailID: 20190718143135eucas1p2da5b7842b35327c60667064184619a9f X-Msg-Generator: CA X-RootMTR: 20190718143135eucas1p2da5b7842b35327c60667064184619a9f X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143135eucas1p2da5b7842b35327c60667064184619a9f References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds documentation of a new optional "samsung,asv-bin" property in the chipid device node and documents requirement of "syscon" compatible string. These additions are needed to support Exynos ASV (Adaptive Supply Voltage) feature. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - new patch --- .../devicetree/bindings/arm/samsung/exynos-chipid.txt | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt index 85c5dfd4a720..be3657e6c00c 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt @@ -1,12 +1,18 @@ -SAMSUNG Exynos SoCs Chipid driver. +SAMSUNG Exynos SoC series CHIPID subsystem Required properties: -- compatible : Should at least contain "samsung,exynos4210-chipid". +- compatible : Should at least contain "samsung,exynos4210-chipid", "syscon". - reg: offset and length of the register set +Optional properties: + - samsung,asv-bin : Adaptive Supply Voltage bin selection. This can be used + to determine the ASV bin of an SoC if respective information is missing + in the CHIPID registers or in the OTP memory. Possible values: 0...3. + Example: chipid@10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; + samsung,asv-bin = <2>; }; From patchwork Thu Jul 18 14:30:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049059 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D811813BD for ; Thu, 18 Jul 2019 14:32:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C9BB42880A for ; Thu, 18 Jul 2019 14:32:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BDACE28837; Thu, 18 Jul 2019 14:32:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D54D2880A for ; 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Thu, 18 Jul 2019 14:31:35 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 8/9] ARM: dts: Add "syscon" compatible string to chipid node Date: Thu, 18 Jul 2019 16:30:43 +0200 Message-Id: <20190718143044.25066-9-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEKsWRmVeSWpSXmKPExsWy7djPc7onmwxiDU6/4bfYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wASxSXTUpqTmZZapG+XQJXxrPXCgXT2Ss+3Ytq YPzI2sXIwSEhYCLR3azaxcjFISSwglFiypNV7BDOF0aJIw9+MkE4nxkl3p5rBMpwgnXc3D6R ESKxnFGi+fsDZriW1U9vgFWxCRhK9B7tYwSxRQSEJe4tXQ42l1ngHpPE6adnmUASwgKBEue+ PgZrYBFQlWh+eAnM5hWwluhbs5IRYp28xOoNB5hBbE4BG4nDd5+CrZYQmMwusWXGOjaIIheJ V2sPQ9nCEq+Ob4G6VUbi/875TBANzYwSPbtvs0M4Exgl7h9fALXCWuLw8Yvg8GAW0JRYv0sf Iuwo8eZ5DzSY+CRuvBUECTMDmZO2TWeGCPNKdLQJQVSrSPxeNZ0JwpaS6H7ynwWixEPi/nUT SAD1M0q8mnOHcQKj/CyEXQsYGVcxiqeWFuempxYb56WW6xUn5haX5qXrJefnbmIEppTT/45/ 3cG470/SIUYBDkYlHt6AXINYIdbEsuLK3EOMEhzMSiK8t1/qxwrxpiRWVqUW5ccXleakFh9i lOZgURLnrWZ4EC0kkJ5YkpqdmlqQWgSTZeLglGpg9E9md/JIfH4n+u3UHvaSJ6Hf6xsycwu5 np9ibix74n12+qprb+zENlRphoe/2/xPNTz3zsHu9CdfTXZ2HNTRne5j680y6Xf5BLFbm/5M Oh8r8FN9u/uBA+9Wfrk9uVb7/bxkk7WcydvXV8TlyN6vfdrwYW/5EcYjk2+xlqjklvz90Rxr /2X9OSWW4oxEQy3mouJEAOhmo7MlAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrELMWRmVeSWpSXmKPExsVy+t/xu7onmgxiDc5PkrPYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexrPXCgXT2Ss+3YtqYPzI2sXIySEhYCJxc/tExi5G Lg4hgaWMEi8fXQdKcAAlpCTmtyhB1AhL/LnWxQZR84lR4tyiOWwgCTYBQ4neo32MILYIUNG9 pcvZQYqYBV4xSdye958JZJCwgL9Ea4seSA2LgKpE88NL7CA2r4C1RN+alYwQC+QlVm84wAxi cwrYSBy++xQsLgRUM/vlNcYJjHwLGBlWMYqklhbnpucWG+kVJ+YWl+al6yXn525iBIb3tmM/ t+xg7HoXfIhRgINRiYc3INcgVog1say4MvcQowQHs5II7+2X+rFCvCmJlVWpRfnxRaU5qcWH GE2BjprILCWanA+MvbySeENTQ3MLS0NzY3NjMwslcd4OgYMxQgLpiSWp2ampBalFMH1MHJxS DYwrvQ4wTD4Qprzxqi8jL7ebwpTqGVm+u8r1RB+umfcj74iV314mJsH9c97fvfIi4LdNhb6P 3avpNzycnszgqM18k/lhyy/2JLW0Lear8o1W3nrubsqg6rpCO7lucnPR/ldlm15ZsJy+enyJ ye0f6fP1gp05TRJ9PGtWL3d2fL4sItVCdvvKMHUlluKMREMt5qLiRAD+gqS6hQIAAA== X-CMS-MailID: 20190718143136eucas1p2cedfe5ed5e8e6316e82b30a565dc4855 X-Msg-Generator: CA X-RootMTR: 20190718143136eucas1p2cedfe5ed5e8e6316e82b30a565dc4855 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143136eucas1p2cedfe5ed5e8e6316e82b30a565dc4855 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The CHIP ID block in addition to exact chip revision information contains data and control registers for ASV (Adaptive Supply Voltage) and ABB (Adaptive Body Bias). Add "syscon" compatible so the CHIPID block can be shared by respective drivers. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - new patch --- arch/arm/boot/dts/exynos5.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 67f9b4504a42..4801ca759feb 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -35,8 +35,8 @@ #size-cells = <1>; ranges; - chipid@10000000 { - compatible = "samsung,exynos4210-chipid"; + chipid: chipid@10000000 { + compatible = "samsung,exynos4210-chipid", "syscon"; reg = <0x10000000 0x100>; }; From patchwork Thu Jul 18 14:30:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11049051 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA9D61510 for ; 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Thu, 18 Jul 2019 14:31:37 +0000 (GMT) From: Sylwester Nawrocki To: krzk@kernel.org Cc: robh+dt@kernel.org, vireshk@kernel.org, devicetree@vger.kernel.org, kgene@kernel.org, pankaj.dubey@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Sylwester Nawrocki Subject: [PATCH v2 9/9] ARM: dts: Add samsung,asv-bin property for odroidxu3-lite Date: Thu, 18 Jul 2019 16:30:44 +0200 Message-Id: <20190718143044.25066-10-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718143044.25066-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSfUhTURz1bu/L5YvnHHmzUBkaJOYHZjzIpMI/Bv0jKEbFqJUPtbYpe87S qCRd5tJpGmoqJZFMXvk1za9Iw00Hii6LQjKnYaKmC0lDRam2vVn/nd85v3PPuZdLCMVVaACR oc5mNGqFUoqJkK7hrfEjI3ej5FELXDTdXtOK0k8t4yhdNrcspG22Npw2zX1C6Q999Ri9VmoB dI2tX0A3W6Zx+tmrdZzWvbHgtHmlCKU7Zoexk6TMxBVjso7nd2SGTg7I1kyBich5UVwqo8zI YTSR8ZdE6Zt6A541id2o7ypC8oEF1QNvAlJHYbHdCPRARIipJgDfP3II+GEdwPrtTYwf1gA0 9FqEu5adja8ILxgBNLZ34/8spkrXYd4ERkXD0iGDG0soP2hvNLqXhJRdAEfnxwQuwY9Kgp91 i4gLI1QorJqtdLciqTi40NML+Lgg+KLtrTva28mbp+fdbSFViUND4YiAX0qAuoFxz5X84Hdr J87jg3C0sgThDQUAlryewvmhHMAZa4Mn4jg0WyecbsLZ7zBs7Yvk6VPQatsQuGhI7YWTDl8X LXTCiq5qIU+T8P49Mb8dAre5ak+dAPjg2x+ExzLYolv3vGMZgAUt1Wg5CKr9H9YAAAf8GS2r SmPYGDVzPYJVqFitOi3iSqbKBJy/ZfS39VcP6N+5PAgoAkh9yERVlFyMKnLYXNUggIRQKiGn liLlYjJVkZvHaDIvarRKhh0EBwhE6k/e9Jq9IKbSFNnMNYbJYjS7qoDwDsgHEUMvlfMVXkXa IKy0u8phPgOyf5yOrS9dvcqZs7ZCP/qq0RnybPKJPDY2NEVSux/eCpQ3nvvZNqDfV3jskHb5 Nhe6N2V6dS1j0xFib2pdNK6G1w1RYUu9ze/04bKu3ong4oROju3P0gcnPdzz+AnqU7GSPKf6 opfUlccTYzFShE1XRIcJNaziL+mCPwYpAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsVy+t/xu7onmwxiDV4vNLfYOGM9q8X8I+dY Lfofv2a2OH9+A7vFpsfXWC0u75rDZvG59wijxYzz+5gs1h65y26xaOsXdovWvUfYLQ6/aWe1 2PzgGJsDr8emVZ1sHpuX1Hv0bVnF6PF5k1wAS5SeTVF+aUmqQkZ+cYmtUrShhZGeoaWFnpGJ pZ6hsXmslZGpkr6dTUpqTmZZapG+XYJexo+uPvaCG2wVc7a1szQwHmHtYuTkkBAwkfjz/SFL FyMXh5DAUkaJV+8WAiU4gBJSEvNblCBqhCX+XOtiA7GFBD4xSpw+4gxiswkYSvQe7WMEsUWA au4tXc4OModZ4BWTxO15/5lAEsICgRLzmx6AFbEIqEpMezAZbDGvgI3E8x07GSEWyEus3nCA GcTmBIofvvuUEWKZtcTsl9cYJzDyLWBkWMUoklpanJueW2yoV5yYW1yal66XnJ+7iREY4tuO /dy8g/HSxuBDjAIcjEo8vAG5BrFCrIllxZW5hxglOJiVRHhvv9SPFeJNSaysSi3Kjy8qzUkt PsRoCnTURGYp0eR8YPzllcQbmhqaW1gamhubG5tZKInzdggcjBESSE8sSc1OTS1ILYLpY+Lg lGpgLKnpP9dy7XSktRtziuLJmjksurEFYntvMrA6zE7WlNl8YNYJJyWtRReOVP+MMXop58uy weH7H621rdcDVn92P6tV/spaY87xHK5FMWGBWy/xbHKuztjg2nTOX2C1vHjOo4w3G9syJjxN KYjpqhYQ3/c+uIrBqfbPMQ2JyZI296/kv7FPmMWpxFKckWioxVxUnAgAWIGyPocCAAA= X-CMS-MailID: 20190718143138eucas1p127542c4cb8416cee9af6a95f4bc98366 X-Msg-Generator: CA X-RootMTR: 20190718143138eucas1p127542c4cb8416cee9af6a95f4bc98366 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190718143138eucas1p127542c4cb8416cee9af6a95f4bc98366 References: <20190718143044.25066-1-s.nawrocki@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Exynos5422 SoC used on Odroid XU3 Lite boards belongs to a special ASV bin but this information cannot be read from the CHIPID block registers. Add samsung,asv-bin property for XU3 Lite to ensure the ASV bin is properly determined. Signed-off-by: Sylwester Nawrocki --- Changes since v1 (RFC): - new patch --- arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts index c19b5a51ca44..a31ca2ef750f 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts @@ -26,6 +26,10 @@ status = "disabled"; }; +&chipid { + samsung,asv-bin = <2>; +}; + &pwm { /* * PWM 0 -- fan