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Fri, 19 Jul 2019 15:05:52 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Bartlomiej Zolnierkiewicz , Marek Szyprowski , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 1/5] devfreq: exynos-bus: correct clock enable sequence Date: Fri, 19 Jul 2019 17:05:31 +0200 Message-Id: <20190719150535.15501-2-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190719150535.15501-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAKsWRmVeSWpSXmKPExsWy7djP87pBdwxjDc5PlbDYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gtzjb9IbdYtPja6wWl3fNYbP43HuE0WLG+X1MFmuP3GW3 WHr9IpPF7cYVbBZvfpxlsmjde4Td4t+1jSwWmx8cY3MQ8lgzbw2jx6ZVnWwem5fUexx8t4fJ o2/LKkaP4ze2M3l83iQXwB7FZZOSmpNZllqkb5fAlbG99zprwVeFitbHa5gaGFdKdTFyckgI mEj0TFvF1MXIxSEksIJRom3iSijnC6PEif9/GCGcz4wSJ7vPMMO0XFv7hQ0isZxR4u/zqaxw LQ+3vmcEqWITUJXYMuMlO4gtIqAsMfnedGaQImaBnywSGy5vBEsIC3hJLHl5iAXEZgFq2Phq GlicV8BF4sOxRlaIdfISnTt2g9VwCrhKfDn4HqpGUOLkzCdgcWagmuats8EWSAi8ZZfo3P8D 6lYXiRcX50ENEpZ4dXwLO4QtI/F/53wmCLtc4unCPnaI5hZGiQftH1kgEtYSh49fBGrmANqg KbF+lz5E2FGi9eBydpCwhACfxI23ghA38ElM2gbyJEiYV6KjTQiiWldi3v8zUBdIS3T9Xwdl e0icvLeTeQKj4iwk38xC8s0shL0LGJlXMYqnlhbnpqcWG+WllusVJ+YWl+al6yXn525iBKa7 0/+Of9nBuOtP0iFGAQ5GJR7eD7cMY4VYE8uKK3MPMUpwMCuJ8N5+qR8rxJuSWFmVWpQfX1Sa k1p8iFGag0VJnLea4UG0kEB6YklqdmpqQWoRTJaJg1OqgXG1ic6fPRyObs8+78q4V8rzMLor e9oawdMc2nrhh7t0g+00VVS0jNV4TMRNowwfmc7w2jtBofDxfK+FBz/Krq+ya/utUrsj8e2N JhfDnMCSyZxNASEPBR4lKknt3uk14+U17TsXdiwIb61ickpYKhxef42Lw8t07pLJbPZdiyft CuHfcLP5rxJLcUaioRZzUXEiAM7j4TlzAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsVy+t/xu7qBdwxjDV43yVhsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQy9jee5214KtCRevjNUwNjCuluhg5OSQETCSurf3C1sXIxSEksJRR4lh/ DzNEQlqi8fRqJghbWOLPtS6ook+MEv9eQBSxCahKbJnxkh3EFhFQlph8bzozSBGzQCerxIon R9hAEsICXhJLXh5iAbFZgBo2vpoG1sAr4CLx4VgjK8QGeYnOHbvBajgFXCW+HHwPViMEVLNj 5TxmiHpBiZMzn4DVMAPVN2+dzTyBUWAWktQsJKkFjEyrGEVSS4tz03OLDfWKE3OLS/PS9ZLz czcxAuNy27Gfm3cwXtoYfIhRgINRiYf3wy3DWCHWxLLiytxDjBIczEoivLdf6scK8aYkVlal FuXHF5XmpBYfYjQFemIis5Rocj4wZeSVxBuaGppbWBqaG5sbm1koifN2CByMERJITyxJzU5N LUgtgulj4uCUamCsmuLtNqsvcdWbt9YHfrKs+XrWtOp/4OMPkgtndk/zs/jaeP/qtvZDbzKN 79he2ZI1i/mU0sQap+vnP5478njORespdg/jWefO1TuTcSr+2MaPpcJObzauT3JvvpP9+Lyx b1L2x7p9FzqtsjIlL5pZWpolXfOpNN579UWf0dzfel4Ccd8Ox3s2KrEUZyQaajEXFScCACJB st7hAgAA X-CMS-MailID: 20190719150553eucas1p1665462f3fc0e06fc9c082e258be3a851 X-Msg-Generator: CA X-RootMTR: 20190719150553eucas1p1665462f3fc0e06fc9c082e258be3a851 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190719150553eucas1p1665462f3fc0e06fc9c082e258be3a851 References: <20190719150535.15501-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Regulators should be enabled before clocks to avoid h/w hang. This require change in exynos_bus_probe() to move exynos_bus_parse_of() after exynos_bus_parent_parse_of() and change in enabling sequence of regulator and clock in exynos_bus_parse_of(). Similar change is needed in exynos_bus_exit() where clock should be disabled first. Signed-off-by: Kamil Konieczny Acked-by: Chanwoo Choi --- This patch is new to this series. --- drivers/devfreq/exynos-bus.c | 58 ++++++++++++++++++++---------------- 1 file changed, 32 insertions(+), 26 deletions(-) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 486cc5b422f1..f391044aa39d 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -194,11 +194,11 @@ static void exynos_bus_exit(struct device *dev) if (ret < 0) dev_warn(dev, "failed to disable the devfreq-event devices\n"); + clk_disable_unprepare(bus->clk); if (bus->regulator) regulator_disable(bus->regulator); dev_pm_opp_of_remove_table(dev); - clk_disable_unprepare(bus->clk); } /* @@ -326,8 +326,7 @@ static int exynos_bus_parent_parse_of(struct device_node *np, return ret; } -static int exynos_bus_parse_of(struct device_node *np, - struct exynos_bus *bus) +static int exynos_bus_parse_of(struct exynos_bus *bus) { struct device *dev = bus->dev; struct dev_pm_opp *opp; @@ -341,36 +340,35 @@ static int exynos_bus_parse_of(struct device_node *np, return PTR_ERR(bus->clk); } - ret = clk_prepare_enable(bus->clk); + /* Get the freq and voltage from OPP table to scale the bus freq */ + ret = dev_pm_opp_of_add_table(dev); if (ret < 0) { - dev_err(dev, "failed to get enable clock\n"); + dev_err(dev, "failed to get OPP table\n"); return ret; } - /* Get the freq and voltage from OPP table to scale the bus freq */ - ret = dev_pm_opp_of_add_table(dev); + ret = clk_prepare_enable(bus->clk); if (ret < 0) { - dev_err(dev, "failed to get OPP table\n"); + dev_err(dev, "failed to enable clock\n"); goto err_clk; } - rate = clk_get_rate(bus->clk); opp = devfreq_recommended_opp(dev, &rate, 0); if (IS_ERR(opp)) { dev_err(dev, "failed to find dev_pm_opp\n"); ret = PTR_ERR(opp); - goto err_opp; + goto err; } bus->curr_freq = dev_pm_opp_get_freq(opp); dev_pm_opp_put(opp); return 0; -err_opp: - dev_pm_opp_of_remove_table(dev); -err_clk: +err: clk_disable_unprepare(bus->clk); +err_clk: + dev_pm_opp_of_remove_table(dev); return ret; } @@ -386,6 +384,7 @@ static int exynos_bus_probe(struct platform_device *pdev) struct exynos_bus *bus; int ret, max_state; unsigned long min_freq, max_freq; + bool passive = false; if (!np) { dev_err(dev, "failed to find devicetree node\n"); @@ -399,27 +398,31 @@ static int exynos_bus_probe(struct platform_device *pdev) bus->dev = &pdev->dev; platform_set_drvdata(pdev, bus); - /* Parse the device-tree to get the resource information */ - ret = exynos_bus_parse_of(np, bus); - if (ret < 0) - return ret; - profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL); - if (!profile) { - ret = -ENOMEM; - goto err; - } + if (!profile) + return -ENOMEM; node = of_parse_phandle(dev->of_node, "devfreq", 0); if (node) { of_node_put(node); - goto passive; + passive = true; } else { ret = exynos_bus_parent_parse_of(np, bus); + if (ret < 0) + return ret; } - if (ret < 0) - goto err; + /* Parse the device-tree to get the resource information */ + ret = exynos_bus_parse_of(bus); + if (ret < 0) { + if (!passive) + regulator_disable(bus->regulator); + + return ret; + } + + if (passive) + goto passive; /* Initialize the struct profile and governor data for parent device */ profile->polling_ms = 50; @@ -508,8 +511,11 @@ static int exynos_bus_probe(struct platform_device *pdev) return 0; err: - dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); + if (!passive) + regulator_disable(bus->regulator); + + dev_pm_opp_of_remove_table(dev); return ret; } From patchwork Fri Jul 19 15:05:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11050231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CFED746 for ; Fri, 19 Jul 2019 15:06:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DA75289A0 for ; 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Even if bootloader leaves regulators enabled, they should be enabled in kernel in order to increase the reference count. Signed-off-by: Kamil Konieczny --- Changes in v3: - corrected error path in enable - improved commit message Changes in v2: - move regulator enable and disable into loop --- drivers/opp/core.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index 0e7703fe733f..a8a480cdabab 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -1570,6 +1570,12 @@ struct opp_table *dev_pm_opp_set_regulators(struct device *dev, goto free_regulators; } + ret = regulator_enable(reg); + if (ret < 0) { + regulator_put(reg); + goto free_regulators; + } + opp_table->regulators[i] = reg; } @@ -1583,8 +1589,10 @@ struct opp_table *dev_pm_opp_set_regulators(struct device *dev, return opp_table; free_regulators: - while (i != 0) - regulator_put(opp_table->regulators[--i]); + while (i--) { + regulator_disable(opp_table->regulators[i]); + regulator_put(opp_table->regulators[i]); + } kfree(opp_table->regulators); opp_table->regulators = NULL; @@ -1610,8 +1618,10 @@ void dev_pm_opp_put_regulators(struct opp_table *opp_table) /* Make sure there are no concurrent readers while updating opp_table */ WARN_ON(!list_empty(&opp_table->opp_list)); - for (i = opp_table->regulator_count - 1; i >= 0; i--) + for (i = opp_table->regulator_count - 1; i >= 0; i--) { + regulator_disable(opp_table->regulators[i]); regulator_put(opp_table->regulators[i]); + } _free_set_opp_data(opp_table); From patchwork Fri Jul 19 15:05:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11050229 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1B5EB746 for ; Fri, 19 Jul 2019 15:06:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BADF205FC for ; Fri, 19 Jul 2019 15:06:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F351E286F3; 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Fri, 19 Jul 2019 15:05:55 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20190719150555eusmtrp2211d3f890d3ddfcdb13091e269bbf12e~y108I2rPx3114831148eusmtrp2A; Fri, 19 Jul 2019 15:05:55 +0000 (GMT) X-AuditID: cbfec7f5-b75ff700000010e5-68-5d31dc53a462 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 03.9F.04146.25CD13D5; Fri, 19 Jul 2019 16:05:54 +0100 (BST) Received: from AMDC3218.DIGITAL.local (unknown [106.120.51.18]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20190719150554eusmtip1c2f2d83f62c57ebeb6092f7f91ed66bc~y107WejL02820728207eusmtip1k; Fri, 19 Jul 2019 15:05:54 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Bartlomiej Zolnierkiewicz , Marek Szyprowski , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 3/5] devfreq: exynos-bus: convert to use dev_pm_opp_set_rate() Date: Fri, 19 Jul 2019 17:05:33 +0200 Message-Id: <20190719150535.15501-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190719150535.15501-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0hTURz33Md2FWfXaXhSsZz0ocIXCh11hIXBhb4EQkVptfSiok7bfGQJ Wj5SyQcmaCo+ykjUmo9lvhJc4ghfmORWPhBN1NTV0ExJXduult9+/9/j/M+PcyhcOEM6UlHS BFYmlcSIeFZE+8D2qHvwlHeoV92SP2opU5BIs7FIour+ERIV9BoAKpxfwdHoaDMfDT9a5aPW +QkSjXdV8tB6fj9AZaO9GHrdP81HLzVjGJp8WM9Dq1vDGMp6389HexMtBGqbHeAFCpmmqibA tDbk8pi2ujSmT9eDMQXKBsCote8wZr3V5TL/upU4nI2JSmJlnuduW0VO1unI+HzxveKMHF46 qPXKA5YUpH3h4ogBywNWlJCuB1A1NkFwwwaAFcVFfG5YB1BdvcY/iHTPpe8LrwDUTi3g/yKD u3OYycWjT0Jl2bI5YU+7waczpWYTTm8TsHm8xSzY0cGwZKeRMGHCGChs1Jl5AR0EtemdgFt3 HOZ2dJs9lvRFuNH3Y99jCz8++2bmcaMn420Fzvn1fPhkyyMPUEYcBOenXTjaDn5XK/cbOEND ZzXG4WS4UFtgbgPpTABnH+sJTgiAH9RjpOkcnD4FFV2eHH0earrVgDveBmrXbLkb2MDidlNF Ey2AOdlCzu0OqwxDJIedYJ7hzT5moKJGSRYB1/JDXcoPdSn/v7cG4A3AgU2Ux0awch8pm+wh l8TKE6URHmFxsa3A+OsG99S/OkDvzh0VoCkgshb8/OodKiQlSfKUWBWAFC6yF0wue4YKBeGS lPusLO6WLDGGlauAE0WIHAQPLGZvCOkISQIbzbLxrOxAxShLx3QQUlqSasHz0+xpXS/NHDu6 6bZoGb6eeFX3+0LakG5Ir3l+tmc4/oq+WaTw+0yn6qWBAQJtpb/D5jXfvsK4ZJWDT9uA8TF9 wk5kWYfEuIuVTGaGq4f4DDWyNHBX3PuiPHMbORMr7NCWZ/SnVSXG/pFlR+y66G5mb3450jjj EiAi5JES79O4TC75Cxc0wldxAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsVy+t/xu7pBdwxjDTon2lhsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQy7i95B1rQa9NxaTmDrYGxoUGXYycHBICJhK7HzWwdzFycQgJLGWUeNt5 hBkiIS3ReHo1E4QtLPHnWhcbRNEnRonX3ZMYQRJsAqoSW2a8ZAexRQSUJSbfm84MUsQs0Mkq seLJETaQhLBAoMSNDWtYQWwWoIb+1e/AGngFXCRuNOxkhNggL9G5YzcLiM0p4Crx5eB7sBoh oJodK+cxQ9QLSpyc+QSshhmovnnrbOYJjAKzkKRmIUktYGRaxSiSWlqcm55bbKhXnJhbXJqX rpecn7uJERiX24793LyD8dLG4EOMAhyMSjy8H24ZxgqxJpYVV+YeYpTgYFYS4b39Uj9WiDcl sbIqtSg/vqg0J7X4EKMp0BMTmaVEk/OBKSOvJN7Q1NDcwtLQ3Njc2MxCSZy3Q+BgjJBAemJJ anZqakFqEUwfEwenVAOjx3qDw+lbZzi0S7vc2ufw/t2ObbOj1Bp7F2cseL6g4zJnSyfflcOp V16XnFH6kXRU40BctJjOmoL27UrHeKMuy83ukmp6MM+cO28y67oFK4/dyBdPf93+6djsU76f zTZMV37ieymu8LV2u5Apx4s3V9Lyf6b9+5Pk8Tzg2rT55WZzH+xMWdCVrMRSnJFoqMVcVJwI AACfewjhAgAA X-CMS-MailID: 20190719150555eucas1p197adc3c58e45c53137fd70cadbfae60e X-Msg-Generator: CA X-RootMTR: 20190719150555eucas1p197adc3c58e45c53137fd70cadbfae60e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190719150555eucas1p197adc3c58e45c53137fd70cadbfae60e References: <20190719150535.15501-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Reuse opp core code for setting bus clock and voltage. As a side effect this allow useage of coupled regulators feature (required for boards using Exynos5422/5800 SoCs) because dev_pm_opp_set_rate() uses regulator_set_voltage_triplet() for setting regulator voltage while the old code used regulator_set_voltage_tol() with fixed tolerance. This patch also removes no longer needed parsing of DT property "exynos,voltage-tolerance" (no Exynos devfreq DT node uses it). Signed-off-by: Kamil Konieczny --- drivers/devfreq/exynos-bus.c | 143 +++++++++-------------------------- 1 file changed, 37 insertions(+), 106 deletions(-) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index f391044aa39d..c2147b0912a0 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -25,7 +25,6 @@ #include #define DEFAULT_SATURATION_RATIO 40 -#define DEFAULT_VOLTAGE_TOLERANCE 2 struct exynos_bus { struct device *dev; @@ -37,9 +36,9 @@ struct exynos_bus { unsigned long curr_freq; - struct regulator *regulator; + struct opp_table *opp_table; + struct clk *clk; - unsigned int voltage_tolerance; unsigned int ratio; }; @@ -99,56 +98,23 @@ static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) { struct exynos_bus *bus = dev_get_drvdata(dev); struct dev_pm_opp *new_opp; - unsigned long old_freq, new_freq, new_volt, tol; int ret = 0; - /* Get new opp-bus instance according to new bus clock */ + /* Get correct frequency for bus. */ new_opp = devfreq_recommended_opp(dev, freq, flags); if (IS_ERR(new_opp)) { dev_err(dev, "failed to get recommended opp instance\n"); return PTR_ERR(new_opp); } - new_freq = dev_pm_opp_get_freq(new_opp); - new_volt = dev_pm_opp_get_voltage(new_opp); dev_pm_opp_put(new_opp); - old_freq = bus->curr_freq; - - if (old_freq == new_freq) - return 0; - tol = new_volt * bus->voltage_tolerance / 100; - /* Change voltage and frequency according to new OPP level */ mutex_lock(&bus->lock); + ret = dev_pm_opp_set_rate(dev, *freq); + if (!ret) + bus->curr_freq = *freq; - if (old_freq < new_freq) { - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); - if (ret < 0) { - dev_err(bus->dev, "failed to set voltage\n"); - goto out; - } - } - - ret = clk_set_rate(bus->clk, new_freq); - if (ret < 0) { - dev_err(dev, "failed to change clock of bus\n"); - clk_set_rate(bus->clk, old_freq); - goto out; - } - - if (old_freq > new_freq) { - ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol); - if (ret < 0) { - dev_err(bus->dev, "failed to set voltage\n"); - goto out; - } - } - bus->curr_freq = new_freq; - - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", - old_freq, new_freq, clk_get_rate(bus->clk)); -out: mutex_unlock(&bus->lock); return ret; @@ -195,8 +161,8 @@ static void exynos_bus_exit(struct device *dev) dev_warn(dev, "failed to disable the devfreq-event devices\n"); clk_disable_unprepare(bus->clk); - if (bus->regulator) - regulator_disable(bus->regulator); + if (bus->opp_table) + dev_pm_opp_put_regulators(bus->opp_table); dev_pm_opp_of_remove_table(dev); } @@ -209,39 +175,23 @@ static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, { struct exynos_bus *bus = dev_get_drvdata(dev); struct dev_pm_opp *new_opp; - unsigned long old_freq, new_freq; - int ret = 0; + int ret; - /* Get new opp-bus instance according to new bus clock */ + /* Get correct frequency for bus. */ new_opp = devfreq_recommended_opp(dev, freq, flags); if (IS_ERR(new_opp)) { dev_err(dev, "failed to get recommended opp instance\n"); return PTR_ERR(new_opp); } - new_freq = dev_pm_opp_get_freq(new_opp); dev_pm_opp_put(new_opp); - old_freq = bus->curr_freq; - - if (old_freq == new_freq) - return 0; - /* Change the frequency according to new OPP level */ mutex_lock(&bus->lock); + ret = dev_pm_opp_set_rate(dev, *freq); + if (!ret) + bus->curr_freq = *freq; - ret = clk_set_rate(bus->clk, new_freq); - if (ret < 0) { - dev_err(dev, "failed to set the clock of bus\n"); - goto out; - } - - *freq = new_freq; - bus->curr_freq = new_freq; - - dev_dbg(dev, "Set the frequency of bus (%luHz -> %luHz, %luHz)\n", - old_freq, new_freq, clk_get_rate(bus->clk)); -out: mutex_unlock(&bus->lock); return ret; @@ -259,20 +209,9 @@ static int exynos_bus_parent_parse_of(struct device_node *np, struct exynos_bus *bus) { struct device *dev = bus->dev; - int i, ret, count, size; - - /* Get the regulator to provide each bus with the power */ - bus->regulator = devm_regulator_get(dev, "vdd"); - if (IS_ERR(bus->regulator)) { - dev_err(dev, "failed to get VDD regulator\n"); - return PTR_ERR(bus->regulator); - } - - ret = regulator_enable(bus->regulator); - if (ret < 0) { - dev_err(dev, "failed to enable VDD regulator\n"); - return ret; - } + struct opp_table *opp_table; + const char *vdd = "vdd"; + int i, count, size; /* * Get the devfreq-event devices to get the current utilization of @@ -281,26 +220,29 @@ static int exynos_bus_parent_parse_of(struct device_node *np, count = devfreq_event_get_edev_count(dev); if (count < 0) { dev_err(dev, "failed to get the count of devfreq-event dev\n"); - ret = count; - goto err_regulator; + return count; } - bus->edev_count = count; + bus->edev_count = count; size = sizeof(*bus->edev) * count; bus->edev = devm_kzalloc(dev, size, GFP_KERNEL); - if (!bus->edev) { - ret = -ENOMEM; - goto err_regulator; - } + if (!bus->edev) + return -ENOMEM; for (i = 0; i < count; i++) { bus->edev[i] = devfreq_event_get_edev_by_phandle(dev, i); - if (IS_ERR(bus->edev[i])) { - ret = -EPROBE_DEFER; - goto err_regulator; - } + if (IS_ERR(bus->edev[i])) + return -EPROBE_DEFER; + } + + opp_table = dev_pm_opp_set_regulators(dev, &vdd, 1); + if (IS_ERR(opp_table)) { + i = PTR_ERR(opp_table); + dev_err(dev, "failed to set regulators %d\n", i); + return i; } + bus->opp_table = opp_table; /* * Optionally, Get the saturation ratio according to Exynos SoC * When measuring the utilization of each AXI bus with devfreq-event @@ -314,16 +256,7 @@ static int exynos_bus_parent_parse_of(struct device_node *np, if (of_property_read_u32(np, "exynos,saturation-ratio", &bus->ratio)) bus->ratio = DEFAULT_SATURATION_RATIO; - if (of_property_read_u32(np, "exynos,voltage-tolerance", - &bus->voltage_tolerance)) - bus->voltage_tolerance = DEFAULT_VOLTAGE_TOLERANCE; - return 0; - -err_regulator: - regulator_disable(bus->regulator); - - return ret; } static int exynos_bus_parse_of(struct exynos_bus *bus) @@ -414,12 +347,8 @@ static int exynos_bus_probe(struct platform_device *pdev) /* Parse the device-tree to get the resource information */ ret = exynos_bus_parse_of(bus); - if (ret < 0) { - if (!passive) - regulator_disable(bus->regulator); - - return ret; - } + if (ret < 0) + goto err_reg; if (passive) goto passive; @@ -512,10 +441,12 @@ static int exynos_bus_probe(struct platform_device *pdev) err: clk_disable_unprepare(bus->clk); - if (!passive) - regulator_disable(bus->regulator); - dev_pm_opp_of_remove_table(dev); +err_reg: + if (bus->opp_table) { + dev_pm_opp_put_regulators(bus->opp_table); + bus->opp_table = NULL; + } return ret; } From patchwork Fri Jul 19 15:05:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11050223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76F1C14DB for ; Fri, 19 Jul 2019 15:06:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6708E205FC for ; Fri, 19 Jul 2019 15:06:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A99F285FB; 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Fri, 19 Jul 2019 15:05:56 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20190719150555eusmtrp2983997a2c991a32f3a605aec877cb344~y108zTXP53114831148eusmtrp2B; Fri, 19 Jul 2019 15:05:55 +0000 (GMT) X-AuditID: cbfec7f5-b75ff700000010e5-6a-5d31dc54f48e Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 70.07.04140.35CD13D5; Fri, 19 Jul 2019 16:05:55 +0100 (BST) Received: from AMDC3218.DIGITAL.local (unknown [106.120.51.18]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20190719150555eusmtip17fe0becde43c7ac63852dbdd51c5d713~y108EeL4R2871228712eusmtip16; Fri, 19 Jul 2019 15:05:54 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 4/5] ARM: dts: exynos: add initial data for coupled regulators for Exynos5422/5800 Date: Fri, 19 Jul 2019 17:05:34 +0200 Message-Id: <20190719150535.15501-5-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190719150535.15501-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLKsWRmVeSWpSXmKPExsWy7djPc7ohdwxjDU7fVLXYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gtzjb9IbdYtPja6wWl3fNYbP43HuE0WLG+X1MFmuP3GW3 WHr9IpPF7cYVbBZvfpxlsmjde4Td4t+1jSwWmx8cY3MQ8lgzbw2jx6ZVnWwem5fUexx8t4fJ o2/LKkaP4ze2M3l83iQXwB7FZZOSmpNZllqkb5fAlXHivW/BCZuKOQvesDcw3tDrYuTkkBAw kfh19AprFyMXh5DACkaJswuPM0E4Xxgllj28zg7hfGaUeNd4DCjDAdYyryECpFtIYDmjxLSp CA337+9nAkmwCahKbJnxkh3EFhFQlph8bzozSBGzwE8WidO7mllBEsIC6RI/Wr+zgNgsQA0v Zk8Aa+AVcJFouvyIDeI+eYnOHbvBajgFXCW+HHwPVSMocXLmE7A4M1BN89bZYAskBD6yS3x6 2c0K0ewicbSvmQXCFpZ4dXwLO4QtI/F/53wmCLtc4unCPnaI5hZGiQftH6EarCUOH7/ICvIy s4CmxPpd+hBhR4m+H1+gIcEnceOtIMQNfBKTtoE8CRLmlehoE4Ko1pWY9/8M1DXSEl3/10HZ HhLrT/xgnsCoOAvJN7OQfDMLYe8CRuZVjOKppcW56anFxnmp5XrFibnFpXnpesn5uZsYgYnu 9L/jX3cw7vuTdIhRgINRiYf3wy3DWCHWxLLiytxDjBIczEoivLdf6scK8aYkVlalFuXHF5Xm pBYfYpTmYFES561meBAtJJCeWJKanZpakFoEk2Xi4JRqYMxWPtFQcn+bSpzlasWAhqU/m1WS 2RLT56nlPbR9N3+B8UuetQePCzxuNnXQt888Znf+y8Ofd6fZqfw8sPiLUnVW2EXr71c7Xq37 LzZJ2jxhS75WllOAsfKfoul7JdTnTXopOJmxK/Lay0IvW8Yox+tz11y/q+O05c6bgwvyXbof M2munVf1u1iJpTgj0VCLuag4EQB0yvpxcAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNIsWRmVeSWpSXmKPExsVy+t/xu7rBdwxjDTqW6FlsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQyzjx3rfghE3FnAVv2BsYb+h1MXJwSAiYSMxriOhi5OQQEljKKLG1oxrE lhCQlmg8vZoJwhaW+HOti62LkQuo5hOjxKRtdxlBEmwCqhJbZrxkB7FFBJQlJt+bzgxSxCzQ ySqxZNJfsISwQKrEoQ9TwCaxADW8mD0BLM4r4CLRdPkRG8QGeYnOHbtZQGxOAVeJLwffs0Nc 5CKxY+U8Zoh6QYmTM5+A1TAD1Tdvnc08gVFgFpLULCSpBYxMqxhFUkuLc9Nzi430ihNzi0vz 0vWS83M3MQIjctuxn1t2MHa9Cz7EKMDBqMTD++GWYawQa2JZcWXuIUYJDmYlEd7bL/VjhXhT EiurUovy44tKc1KLDzGaAj0xkVlKNDkfmCzySuINTQ3NLSwNzY3Njc0slMR5OwQOxggJpCeW pGanphakFsH0MXFwSjUwur8yLDRu/5gxeefdv1etFk6VTH3peFeqae8JFo83D/m89oQbsa+T 9XqfeVE3Lizk7oyG2qwQ9e0W9/y62g/uNVFOul6/RW+niXThlBW5lwRcsh9vP/qPOynp5nHX r908HN+zf6fKCn5svFcSfldgBmfy3g9sd0rWH/30dNd579edPUo1B5fMV2Ipzkg01GIuKk4E AJrt68zeAgAA X-CMS-MailID: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 X-Msg-Generator: CA X-RootMTR: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 References: <20190719150535.15501-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Szyprowski Declare Exynos5422/5800 voltage ranges for opp points for big cpu core and bus wcore and couple their voltage supllies as vdd_arm and vdd_int should be in 300mV range. Signed-off-by: Marek Szyprowski [k.konieczny: add missing patch description] Signed-off-by: Kamil Konieczny Reviewed-by: Chanwoo Choi --- arch/arm/boot/dts/exynos5420.dtsi | 34 +++++++++---------- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 4 +++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +++ arch/arm/boot/dts/exynos5800.dtsi | 32 ++++++++--------- 4 files changed, 41 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 5fb2326875dc..0cbf74750553 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -48,62 +48,62 @@ opp-shared; opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; clock-latency-ns = <140000>; }; opp-1700000000 { opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <1212500>; + opp-microvolt = <1212500 1212500 1500000>; clock-latency-ns = <140000>; }; opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <1175000>; + opp-microvolt = <1175000 1175000 1500000>; clock-latency-ns = <140000>; }; opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <1137500>; + opp-microvolt = <1137500 1137500 1500000>; clock-latency-ns = <140000>; }; opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; - opp-microvolt = <1112500>; + opp-microvolt = <1112500 1112500 1500000>; clock-latency-ns = <140000>; }; opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; - opp-microvolt = <1062500>; + opp-microvolt = <1062500 1062500 1500000>; clock-latency-ns = <140000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1037500>; + opp-microvolt = <1037500 1037500 1500000>; clock-latency-ns = <140000>; }; opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; - opp-microvolt = <1012500>; + opp-microvolt = <1012500 1012500 1500000>; clock-latency-ns = <140000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = < 987500>; + opp-microvolt = < 987500 987500 1500000>; clock-latency-ns = <140000>; }; opp-900000000 { opp-hz = /bits/ 64 <900000000>; - opp-microvolt = < 962500>; + opp-microvolt = < 962500 962500 1500000>; clock-latency-ns = <140000>; }; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = < 937500>; + opp-microvolt = < 937500 937500 1500000>; clock-latency-ns = <140000>; }; opp-700000000 { opp-hz = /bits/ 64 <700000000>; - opp-microvolt = < 912500>; + opp-microvolt = < 912500 912500 1500000>; clock-latency-ns = <140000>; }; }; @@ -1100,23 +1100,23 @@ opp00 { opp-hz = /bits/ 64 <84000000>; - opp-microvolt = <925000>; + opp-microvolt = <925000 925000 1400000>; }; opp01 { opp-hz = /bits/ 64 <111000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp02 { opp-hz = /bits/ 64 <222000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp03 { opp-hz = /bits/ 64 <333000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp04 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <987500>; + opp-microvolt = <987500 987500 1400000>; }; }; diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 25d95de15c9b..65d094256b54 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -428,6 +428,8 @@ regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; }; buck3_reg: BUCK3 { @@ -436,6 +438,8 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; }; buck4_reg: BUCK4 { diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index e0f470fe54c8..5c1e965ed7e9 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -257,6 +257,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; @@ -269,6 +271,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 57d3b319fd65..2a74735d161c 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -22,61 +22,61 @@ &cluster_a15_opp_table { opp-1700000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1600000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1500000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1400000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1300000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1200000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1100000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1000000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-900000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-800000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-700000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-400000000 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-300000000 { opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; }; From patchwork Fri Jul 19 15:05:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11050217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00483746 for ; Fri, 19 Jul 2019 15:06:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E3E95289A2 for ; Fri, 19 Jul 2019 15:06:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D62E3289A0; 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Signed-off-by: Kamil Konieczny Acked-by: Chanwoo Choi --- Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index f8e946471a58..e71f752cc18f 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -50,8 +50,6 @@ Required properties only for passive bus device: Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. -- exynos,voltage-tolerance: the percentage value for bus voltage tolerance - which is used to calculate the max voltage. Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: