From patchwork Tue Sep 4 18:57:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guang Bai X-Patchwork-Id: 10587787 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E446613BB for ; Tue, 4 Sep 2018 19:07:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE87E29D4B for ; Tue, 4 Sep 2018 19:07:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C078729D46; Tue, 4 Sep 2018 19:07:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5806D29D46 for ; Tue, 4 Sep 2018 19:07:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 86EF86E214; Tue, 4 Sep 2018 19:07:56 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 30A1F6E214 for ; Tue, 4 Sep 2018 19:07:55 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Sep 2018 12:07:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,330,1531810800"; d="scan'208";a="230170057" Received: from gbai-ub1604-lts.fm.intel.com ([10.1.23.150]) by orsmga004.jf.intel.com with ESMTP; 04 Sep 2018 12:07:37 -0700 From: Guang Bai To: intel-gfx@lists.freedesktop.org Date: Tue, 4 Sep 2018 11:57:49 -0700 Message-Id: <1536087469-12449-1-git-send-email-guang.bai@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [Intel-gfx] [PATCH xf86-video-intel] sna/io: Align the linear source buffer to cache line for 2d blt of SKL+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP On SKL+ the linear source buffer has to start from cache line boundary to meet the 2d engine source copy requirements. Apply this cache line alignment policy for SKL+ only. Signed-off-by: Guang Bai --- src/sna/sna_io.c | 47 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/src/sna/sna_io.c b/src/sna/sna_io.c index d32bd58..48d9354 100644 --- a/src/sna/sna_io.c +++ b/src/sna/sna_io.c @@ -1064,7 +1064,7 @@ tile: if (kgem->gen >= 0100) { cmd |= 8; do { - int nbox_this_time, rem; + int nbox_this_time, rem, pitch_aligned; nbox_this_time = nbox; rem = kgem_batch_space(kgem); @@ -1077,12 +1077,19 @@ tile: /* Count the total number of bytes to be read and allocate a * single buffer large enough. Or if it is very small, combine - * with other allocations. */ + * with other allocations. Each sub-buffer starting point has + * to be aligned to 64 bytes to conform latest hardware requirments. + * Align the pitch of each sub-buffer to 64 bytes for simplicities. + */ offset = 0; for (n = 0; n < nbox_this_time; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; - offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; + if (kgem->gen >= 0110) { + pitch_aligned = ALIGN(PITCH(width, dst->drawable.bitsPerPixel >> 3), 64); + offset += pitch_aligned * height; + } else + offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; } src_bo = kgem_create_buffer(kgem, offset, @@ -1113,14 +1120,24 @@ tile: assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); - memcpy_blt(src, (char *)ptr + offset, - dst->drawable.bitsPerPixel, - stride, pitch, - box->x1 + src_dx, box->y1 + src_dy, - 0, 0, - width, height); + if (kgem->gen >= 0110) { + pitch_aligned = ALIGN(pitch, 64); + memcpy_blt(src, (char *)ptr + offset, + dst->drawable.bitsPerPixel, + stride, pitch_aligned, + box->x1 + src_dx, box->y1 + src_dy, + 0, 0, + width, height); + } else + memcpy_blt(src, (char *)ptr + offset, + dst->drawable.bitsPerPixel, + stride, pitch, + box->x1 + src_dx, box->y1 + src_dy, + 0, 0, + width, height); assert(kgem->mode == KGEM_BLT); + b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; @@ -1133,16 +1150,22 @@ tile: KGEM_RELOC_FENCED, 0); b[6] = 0; - b[7] = pitch; + if (kgem->gen >= 0110) + b[7] = pitch_aligned; + else + b[7] = pitch; + *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, offset); kgem->nbatch += 10; - box++; - offset += pitch * height; + if (kgem->gen >= 0110) + offset += pitch_aligned * height; + else + offset += pitch * height; } while (--nbox_this_time); assert(offset == __kgem_buffer_size(src_bo)); sigtrap_put();