From patchwork Fri Aug 2 19:47:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074079 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 87FC114E5 for ; Fri, 2 Aug 2019 19:48:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 79DDB288AD for ; Fri, 2 Aug 2019 19:48:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6D79A288B5; Fri, 2 Aug 2019 19:48:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DF830288AD for ; Fri, 2 Aug 2019 19:48:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Content-ID:In-Reply-To: References:Message-ID:Date:Subject:To:From:Reply-To:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+LAi+EoFaNmWc+PdWQ1y8qSpOP1k7THbe+X0bPTJfik=; b=u7k6M9GRthkb0X tUuTxWXDc53Dg4I/BRXbhCQUP+WGjOiXXmrjg7DHGYjfXwuTydYEJE4FqXGHRk59dn4nt/19JVz2I y8sMm6Lp8v51aeVpBhfz9FnGuWzTOiUEPSu8qydoAIlx+FW92dRcwKAsDbEFRCXOa+j62Kvgfk0c5 WMPi5J+ldJTOWEwwya8wZKNxSyKIF+3Fu2SOZ8hfKJkSkim7W7JndzWmPMVwWaWqDhApzpCTo6Ddw DIvMe7UKbH6Ju4ao6r2xNUN+IGqnnQqDc0yaDgrJZe9SYx5iLgkX+9SrgP+XmqkhrSquNhxbDGBmF ypZfxvHbiYhzKc7r0emw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdXE-0005fE-1X; Fri, 02 Aug 2019 19:48:16 +0000 Received: from mail-eopbgr80072.outbound.protection.outlook.com ([40.107.8.72] helo=EUR04-VI1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWT-0004so-4M for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:30 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=hnJTYyMWy7skHjXb9z+0tUG8F5pp+cg8ke5xKqSLUF2zx39fa2I/I3QBbE/FfrkhwhKb8uWz828rw/WvRSBGYGtHLRRGEXSdjDEgKTzKy6p0JoAkvSK/T8+NRbTAxhqk7R6QJqIn2SpITUJBALi/YibLYXDBCqV+rOA+r0hOtlxDESFWu9eoPXGYbJnIDET4tKsz627ShmDrCozSfPEBAlNwa8haQgXQtXcmT2LHxkMgznRDbdzXqSDkwRKxHCY2T3oVhxvG0WBCuwhroRupyF4yhkSFUdsZYuVoFubbmsjqyv4fErYi2jM2qmdY7h0PBcsPYEovzWLWOxKNHJm71Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pJJ+UJoGbVx9CluN7jIoVSx4M6oAGD0eKt9R0hAO+EM=; b=AVciHaM9aWwlxaKln4L1A8z+wrju1xRlY7LFWrRdI+ijfJGWILIwVtMBTDMswwYq48m7EkzW+vSKWdOPMUeefSDwB1tFOY+6QZxV6zUIxe75fkHNnCmngSeRNqN2wu/XWtAzozSRKnltHK+8AB4RbdbdhnxcTW9daEtBxk3d09e3MovzcJnZz6wz2p3Ws8fqRXIeSuPp7EVocfT1FaKOVUxGjD1iPWqGbaxPNtB20X8EKmeH3I0incb0ROh0V8jhcJAQt5QQH9+GfHN5HoMt65FXvqwYv6riprnY/GZzHOQmb5VnxedZvJVqPwwftlXU+uTw7utybpohKamys4jBqg== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pJJ+UJoGbVx9CluN7jIoVSx4M6oAGD0eKt9R0hAO+EM=; b=ZNuEw59IRxOHtrjG0RKLkPPjUApjJ/1SYsGkyLjGE8nKrY/3PJz4qk3RpQMxSPoAQ8UuANR2GP5HTxo7oGrcBCUck1J0Nw0fBiDu9DjD6HU4kpRcsSpZA4kWWng7YeAUFMp6J+v4t27oMZc7NuC+sWJCDtp3Rj4t+aCTLcDepG8= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:16 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:16 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 1/6] dt-bindings: arm: fsl: Add the S32V234-EVB board Thread-Topic: [PATCH 1/6] dt-bindings: arm: fsl: Add the S32V234-EVB board Thread-Index: AQHVSWsWLPLKyRuIh0CSHJAAi/FmUA== Date: Fri, 2 Aug 2019 19:47:16 +0000 Message-ID: <20190802194702.30249-2-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5c29bec9-b143-41d4-af02-08d7178238e7 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3826; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(305945005)(4744005)(7416002)(1076003)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(478600001)(86362001)(7736002)(6512007)(6436002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: WS5bdcJZnqD1oMy1ljdCFPqniG2nr8WTmDkhUtYPg28lcouCB3VsaUdM98fUT5Tf1dl4snB0zDlAXXVyAkmqtPwaFxESAGBQ/n9JmI8CPwiym5j1fC0VJZ2+pzZOweIwkgVvlCeKAfL854XBB95c6xcOWu16+RHLD1CKztRhridOpZwjBjDObZd2cyFB250iH7NswWf7cNFJVCxX4XV8y3J3ShnnkS+hqVZ5NygP7Ozw4Z6lfiKKQcAanCiVsqclAf2roEdosPY/AgLoAAUtZw8cAI7SN9guJnP/2Kv+CkU/dqFf7sZdxJfCMnvrSyFQaM8uM2n2A5hlyVoAkxdzNxTibJJOBFtHtSa2Ozfcr1IyU0OvHvHlSEwJzit1jedkZLy5ihGmQ87glpToDzWvRS/i6WY/IKYictXltL/R8hA= Content-ID: <9D9CF3D68050FF45A9D03C399A6923B2@eurprd04.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5c29bec9-b143-41d4-af02-08d7178238e7 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:16.6528 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124729_316768_B7E97D74 X-CRM114-Status: GOOD ( 10.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , Eddy Petrisor , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Eddy Petrișor Add entry for the NXP S32V234 Customer Evaluation Board to the board/SoC bindings. Signed-off-by: Eddy Petrișor Signed-off-by: Stefan-Gabriel Mirea --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 7294ac36f4c0..104d60a11177 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -309,4 +309,10 @@ properties: - fsl,ls2088a-rdb - const: fsl,ls2088a + - description: S32V234 Customer Evaluation Board + items: + - enum: + - fsl,s32v234-evb + - const: fsl,s32v234 + ... From patchwork Fri Aug 2 19:47:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15E5913B1 for ; Fri, 2 Aug 2019 19:47:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06227288A0 for ; Fri, 2 Aug 2019 19:47:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE520288AF; Fri, 2 Aug 2019 19:47:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9F368288A0 for ; Fri, 2 Aug 2019 19:47:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MsNhfEFE1NLpE+0KGdJzPFqFIWCeOkds1PzRXCG7/+A=; b=e7zl21hidRsxBq slhAOBMNRQ+xopDFDG9O8X7eNixXgwChACRAdHFA9F4Fj+N6iHJ7T8yCf86YtL8GDKMJqjWvI3UEd CCtP7dFov8D96Xyd2mOTK0KxJ6ByVPnzqTz7P0vkC8WPpW0MTXExLaBh9Hr8Eyw1rF5ZmT2Vt/mnJ DDt078Ibb/VKeOoZSQEZLOgI5rTwcC1k5ueTHCKvMI9hXT/E/RLHxMG2QGeURBoEFksAHAh5yIXHf iKLuTa7iPm7BQo3otYuSVSQzraHEKS2s+/AwTZZ7Yj1OkaR9Ng6npc0LX1UhHApd3ycmxdKAn/Nln aBp7FDHCrnWC6eKRhvLA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdWi-00059s-33; Fri, 02 Aug 2019 19:47:44 +0000 Received: from mail-eopbgr40075.outbound.protection.outlook.com ([40.107.4.75] helo=EUR03-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWQ-0004sU-DG for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:27 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jHSOMIr5XOfj2vspTQplFqLLBvr6YzAw9GC3GmaiNAcIIGiZQairKupT/ws9mAlp3tzIKxJ4Rq4Y0H0JtuYutGwsMM+rdN0wq2mDNQHY5ZRLiyQZoYNhF3HDQ5riDnmSJlHc9fmWinLiEDPAzw1b/l00UED85jZkfJ5vHaiR7EuZmvvQH7Sc8DXthKHbnIPp9xW6XBysvfNk6CEpM+O8EHFp2WDoo1y0kRaGmEPD14IPRpXazX2kqZ5/FZ0tLvlT2dK/yWMKxyltAUbG//PeSKPiK2vGCS61i+jw0MbiOADWVz3PFZ+2mqlkmeA6Hsot7HzWtv7xGjH/nja1doY/Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=v21CDJCD/8a9YgJtE9OOJDZ2FaNzN2uvWxpNJHK88wo=; b=d0+/lXip3VyxXE2+Tzw9biVf/SUIhP/4//BNHJtFEU9Rs4VfxyScsTyTGodnqVvG6pg8/jfsCqYo/7Nt2xFvnxl+v8nCJdw59EurGlgylmWUgOqonruCN1QgaF0OPosTRGbpvlEbjIubWUi8HluvVIAfXd8ElJwskJ5JO87tzFnr6DfWESyKycGrMWRP2eRA9jmsXiGAqHtJDOsyIomQaysNvJuvbpZTPNMOvrsZeCf6zgdQz//p7/v9HsKhrvDs+Eeelb+PBosyoStp6nv/MXJkjCkK0I4iKqtr7TGAbVPTKSc5E1BumAQtM0th7U2Oj59qr9OSQwxnYPZv//6THw== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=v21CDJCD/8a9YgJtE9OOJDZ2FaNzN2uvWxpNJHK88wo=; b=W93tUU2T7gPuEXLVFeaj+1qO9dp0J3PzCta8RDd1djU83iAu59yxk3R9A7fVIriOf6807B90k4k+SpKS4hwg1xjhW+OapmK/h88UJE4Bkuzci1UV8nCJ7+LaujID+OcI9rzZ25cEYfRGUjFXqG0lAmN07XMDdo4JELB5cn8EyhE= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:18 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:18 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 2/6] arm64: Introduce config for S32 Thread-Topic: [PATCH 2/6] arm64: Introduce config for S32 Thread-Index: AQHVSWsXz0Pt2XfzzkillP+EFcmjQQ== Date: Fri, 2 Aug 2019 19:47:18 +0000 Message-ID: <20190802194702.30249-3-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 20cb8aed-a644-42d6-aa67-08d7178239d8 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3968; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(305945005)(4744005)(7416002)(1076003)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(478600001)(86362001)(7736002)(6512007)(6436002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Wht4a8RZ/YM6hL9xfLIlhpd3PIUqbhPn9vttuy6WxmiCTebBlD/qP65pwTmqOURzmUExVBlhEmjIcfX6nPnbhlwq6Bh591zRHT2m2J56qaVlKcattsbs+66v8t1n+ofQXLtFU5iNUOCo/3pLQT9S2PttiMs2sQY2U0LLsaKfuIRO7HMh7cbX3GNO1H0WxdTA/ZAAk8mQZnjceEzHA09+ER35edAaIAw1FDWJemnyFEXhTQYl7nCcZenOC9Mb1D52ABhoJzduUphsMZyLLtpDkdyAQG3h5ZNY5DMq/ryq+tP+IKi2/lLzQdB9ri5WLB2pH3Ah6n4zSGb5Ybq5pV9smwf3lE8IzQJp6Sw5MVtCAlMHclDd6BLalm7tZI2ZLaXlhtAwMnZ32pnkn5LnocPnJnsKa8Lkwio2qLGGO16Frek= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20cb8aed-a644-42d6-aa67-08d7178239d8 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:18.3141 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124726_450685_5FF79F47 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , Cosmin Stefan Stoica , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mihaela Martinas Add configuration option for the Freescale S32 platform family in Kconfig.platforms. For starters, the only SoC supported will be Treerunner (S32V234), with a single execution target: the S32V234-EVB (rev 29288) board. Signed-off-by: Mihaela Martinas Signed-off-by: Stoica Cosmin-Stefan Signed-off-by: Stefan-Gabriel Mirea --- arch/arm64/Kconfig.platforms | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 4778c775de1b..a9a6152d37eb 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -210,6 +210,11 @@ config ARCH_ROCKCHIP This enables support for the ARMv8 based Rockchip chipsets, like the RK3368. +config ARCH_S32 + bool "Freescale S32 SoC Family" + help + This enables support for the Freescale S32 family of processors. + config ARCH_SEATTLE bool "AMD Seattle SoC Family" help From patchwork Fri Aug 2 19:47:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 31F1014E5 for ; Fri, 2 Aug 2019 19:48:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21CAC288B5 for ; Fri, 2 Aug 2019 19:48:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1FB6A288BE; Fri, 2 Aug 2019 19:48:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7F0C4288BB for ; Fri, 2 Aug 2019 19:48:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cSRDtnAC/za5yo88sNHzG2orPlEvG1KnYePQ0UiNQUc=; b=PWr4QHT3oQICW7 giv/YY5b26/L3LoplJcxeotV1I33KdzjxPsBhEG0Qyk38G5bAa/o/b+UUfAgOwHHny3/ELBQP7ZVo vdjSmyysxLCx/h39717/XOT8Y5CMrUivbvlofxHU7CTeR4Hvc34w2IJGTwCZFD+PbJOHws6RvJPCZ nz2zftnIwoweFepIYayGLu3XNRyaMC0GKdDFiZvBbucAlqWbvDgcYCztpdcl82aeztuQCjOsqt/vY N9b/46RyUvM8Q0iYNeK6Bf6oVZWBU5hHgU19aZ4uRVxjfMmkncy8+ScyhntZHGPwoSa3GebbrjADp J4qipZTI/SVGQ+zLEL3A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdWz-0005RK-0D; Fri, 02 Aug 2019 19:48:01 +0000 Received: from mail-eopbgr40075.outbound.protection.outlook.com ([40.107.4.75] helo=EUR03-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWS-0004sU-07 for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:29 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HQQoV0BjEaB6+MNCipcPbJjac72s4BHlHFseOfblMbpc5XMI45lqNuVrN42rdpuN7+rexuxgD0Bh8Z3uNqroBVsriX3aewj2RN8TTYVH1tUoFg8QC5iVvXzVtbe3wk38gLItyIyuWFWiHp8w5bkhD/6pIzq87trubsMhcjt2P8kOpZpowd5052ictYi+fWJWKG4aeTUnRR3CJJwRWaO8EBucX2rZM/MEJwhhiQmKhON4b8DB4v5NMgOyoAjh99KzvV13xoR3Q5BjJEvS77ADa9/ssq2sxC44yif4jHhkzzBu6qlddShe7CbnrOkTquGmZJtGdGItnBE8jUdIaegU5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HE/gC6i1cHXtF/6zcPk+yKMd6cFbA5iKCkKABP46PEI=; b=Ffm8CVzablXv34woqynPcOyStVoN75v/4/F8mb+z/ALB76/HJC6ppny6me+svrQvCNmlwxn4hVikSjqkMUJcylidjSYb1bgrExSKaFeLi4tpRWTVj8NpJrPZCWGAB5W2hUGIGg6ebi7oC+pwNIRNh7j5qWBN9ejVShOOS0SoHUBC7zOOOLxHaDkDy8xpIHlbGP7SBfM8bzCWwC3ozlPtkJefSBPX1vFEcC+8iT3o6mOCImubk6hUSBUaglRXX9hWSg/rScOX3w+JVgpNlDJwNeye04YsO5kHz02NCYan9PU+uUla7UcxtHfUrLqIZMdFuEhrYOrpd7+c5yjSV4juaw== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HE/gC6i1cHXtF/6zcPk+yKMd6cFbA5iKCkKABP46PEI=; b=mqVpanE6s4H2TwxqUpaM/T0aabeKQPYcfPf0PuazvUVHRyzh6BwaDrt/Vz3Vevuc+4tLZEsgg4APt4GTxmgZmKpRuH47/eyNQ3uQtWH09yPs0goibEtB0UiLUGDtTqtbSg8bmGISU6RUQ7iL9FPyePjNLdKjdh3LtbMjXRPSV04= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:20 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:20 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 3/6] arm64: dts: fsl: Add device tree for S32V234-EVB Thread-Topic: [PATCH 3/6] arm64: dts: fsl: Add device tree for S32V234-EVB Thread-Index: AQHVSWsY8BwSLOGir0eFJATVCFuxHw== Date: Fri, 2 Aug 2019 19:47:20 +0000 Message-ID: <20190802194702.30249-4-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b02beb62-60cb-41bf-e550-08d717823af3 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3826; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(305945005)(7416002)(1076003)(14444005)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(478600001)(86362001)(7736002)(6512007)(6436002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: LGIGpNA37BiSz1FHUQGWLN4v1PwIIn0RSOBNqOHYWEQqy1V+OYspaF52z/FsVPvyGufXj8Yr76y24U7ZabV1erBkeZm2fKL0ub7HHJUrqCJPNRM7ah11/KWuQ5DZMER2rxPGWaAwo3NqZ/HYZPIJlJWke9ojj7T7NzfH0/Kf0i3coWxkWBkgMiUM5p/3TYzth7ZP3rCwijcctbsSEKgUhwVXQScjX1UGS5w4F/96nESkjqCSMCmvoUbC35RTOin7vokZL0baE3WJyPCBGtcPZ5PUB2KiW7EWwHQ3owEIdXe4f2OZXvkkiz04lFw7T0RKwQ+wvlGYhdkvoXn9e4ZqN6uS3do5BxfBsXfl8bAXLwxy+Qd3Jb0qAtBMq1SoZ9Jgu+KNdKL76pph8GNxmRFUoMvuvmgSr8ilNTOR/9Xcmjg= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b02beb62-60cb-41bf-e550-08d717823af3 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:20.1023 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124728_068830_A5A046FA X-CRM114-Status: GOOD ( 14.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , Larisa Ileana Grigore , "linux-kernel@vger.kernel.org" , Dan Nica , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , Cosmin Stefan Stoica , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Stoica Cosmin-Stefan Add initial version of device tree for S32V234-EVB, including nodes for the 4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and Generic Interrupt Controller (GIC). Keep SoC level separate from board level to let future boards with this SoC share common properties, while the dts files will keep board-dependent properties. Signed-off-by: Stoica Cosmin-Stefan Signed-off-by: Mihaela Martinas Signed-off-by: Dan Nica Signed-off-by: Larisa Grigore Signed-off-by: Phu Luu An Signed-off-by: Stefan-Gabriel Mirea --- arch/arm64/boot/dts/freescale/Makefile | 2 + .../boot/dts/freescale/fsl-s32v234-evb.dts | 20 +++ .../arm64/boot/dts/freescale/fsl-s32v234.dtsi | 130 ++++++++++++++++++ 3 files changed, 152 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-s32v234-evb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-s32v234.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index c043aca66572..3af29b58a833 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -26,3 +26,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb + +dtb-$(CONFIG_ARCH_S32) += fsl-s32v234-evb.dtb diff --git a/arch/arm64/boot/dts/freescale/fsl-s32v234-evb.dts b/arch/arm64/boot/dts/freescale/fsl-s32v234-evb.dts new file mode 100644 index 000000000000..9b3983402998 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-s32v234-evb.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + */ + +/dts-v1/; +#include "fsl-s32v234.dtsi" + +/ { + compatible = "fsl,s32v234-evb", "fsl,s32v234"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-s32v234.dtsi b/arch/arm64/boot/dts/freescale/fsl-s32v234.dtsi new file mode 100644 index 000000000000..6d686d3ba997 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-s32v234.dtsi @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2016-2018 NXP + */ + +/memreserve/ 0x80000000 0x00010000; + +/ { + model = "Freescale S32V234"; + compatible = "fsl,s32v234"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x80000000>; + next-level-cache = <&cluster0_l2_cache>; + }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x80000000>; + next-level-cache = <&cluster0_l2_cache>; + }; + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x80000000>; + next-level-cache = <&cluster1_l2_cache>; + }; + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x80000000>; + next-level-cache = <&cluster1_l2_cache>; + }; + + cluster0_l2_cache: l2-cache0 { + compatible = "cache"; + }; + + cluster1_l2_cache: l2-cache1 { + compatible = "cache"; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges; + + aips0: aips-bus@40000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + reg = <0x0 0x40000000 0x0 0x7D000>; + ranges; + + uart0: serial@40053000 { + compatible = "fsl,s32-linflexuart"; + reg = <0x0 0x40053000 0x0 0x1000>; + interrupts = <0 59 1>; + status = "disabled"; + }; + }; + + aips1: aips-bus@40080000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + reg = <0x0 0x40080000 0x0 0x70000>; + ranges; + + uart1: serial@400bc000 { + compatible = "fsl,s32-linflexuart"; + reg = <0x0 0x400bc000 0x0 0x1000>; + interrupts = <0 60 1>; + status = "disabled"; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + /* clock-frequency might be modified by u-boot, depending on the + * chip version. + */ + clock-frequency = <10000000>; + }; + + gic: interrupt-controller@7d001000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0x7d001000 0 0x1000>, + <0 0x7d002000 0 0x2000>, + <0 0x7d004000 0 0x2000>, + <0 0x7d006000 0 0x2000>; + interrupts = <1 9 0xf04>; + }; +}; From patchwork Fri Aug 2 19:47:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074081 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7595913B1 for ; Fri, 2 Aug 2019 19:48:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 65BDD28837 for ; Fri, 2 Aug 2019 19:48:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 594CF288AD; Fri, 2 Aug 2019 19:48:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F379928837 for ; Fri, 2 Aug 2019 19:48:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XN5nRMA+iefNjB+hDG9/VBwUt05c/6TLw87vaStfelU=; b=oqIwfMcIEp73AB XLpYOOyiqLa75mIJQyqesHqaEi0HF534pIdOCMUqJbr1JYlrKqGlgZbAfDkV+SNR3rV44RmHRwgNo 2AqpupJ/506eDM0DoE2vdiTKH3UguoPo0QpwySE8bjmPyusvJLSUNJShc+Gs55KZngN04wJNiNdx2 1r0NougRs+Rhp7M2Sp6h1zsUC/Kv0ZJu2dEitfdXY2nhCBZ5pYX7S3ZG6QApKNi3BK85ai12GsDL5 Wt3IUeI9qXl5ZZ++GqIe+CjrJ4+Y8yfKwc0akSEm/cjODIXxMx0wgON1xW+phxMvXXqxLi7REimDO yfCq1c39HJ+u1bpLPTFQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdXZ-0005x1-KA; Fri, 02 Aug 2019 19:48:37 +0000 Received: from mail-eopbgr40075.outbound.protection.outlook.com ([40.107.4.75] helo=EUR03-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWT-0004sU-Ui for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:31 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Q0WzQz8wYTq51rsYW/b+v3wH0r72VOKEcswrq2Yk3DsLoRwgcwM7J60SnXcY+QIhqYBwspwtnImv5MUkAYLjvc+IcE/QH4DzEPJmNhI4yZURKXjJ4EjYyl06EwlY0q+nZQd6AbWJ90Ac4KX1CDFqyl+aHlv1Y6nbgCanCD+T5xZ0M76U2VSVmXuYyST7hsvfUsgAOSgRrrQ2qqb21ZShrSqUMp5CHkCGON6W9MSwsWqKHuKxsDGuh2flSIrcSqvYMsvVrl8/HNgqAmbw5lTPw3py4amW0M/zE7D6QkIUt/tGNaCFcXaBFXPgCeNk+UPt9Nqf7GgFWFiaf+C1j+Tdcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Qsz5V+1aWaPpbCQ15tKsqIB9J9IX5L3HJRBgrzb9Q8k=; b=DzjkojHhxajlQ7oBhxT4pLyvsRHKuoNGK0pQFdSvL2NQsuBTWqswIJKBnG9zfG5vPH8QDxTHfrrrT9p3tnmvX2esAVvEH7kFCsgG2f1+D3vfzJPSbd4WwazcOzoolFHXIkoMOjUIRKEP1N4SnIu5BR8TecqAJaDXtwEc2GIBPMXhWQ+ra8V59so9gOheNg8ZTcR2Bh8gQ/c26F96GhEfuKBX7IiElr3GOtEnEDWH7kgwe62H9fb15n20K5h5T+rk5+QJljO3C2lq4lxvihnFHsuiW6Ct1tQ921ddMqswXNWIIvG56ZZLmCYrVb3uPYQXXeOneaAXpjauXzsCKqlmLw== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Qsz5V+1aWaPpbCQ15tKsqIB9J9IX5L3HJRBgrzb9Q8k=; b=aN5Ih/KEgM+2kKV4M6TWlv+wbhjjJZo4dwxwmPuFLbih1QplWdcsRG382hzfRUDYmjXKVBFiyj1Qzl2VypQ57hxJrT9RYZ0WH45MnLKd4d+tDMGrHiE9xJLhHYW2KHbt/Bit7Qi1HOwuNOglFXzEyffwRxiDJHx+rt8kY9BusXY= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:21 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:21 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 4/6] dt-bindings: serial: Document Freescale LINFlex UART Thread-Topic: [PATCH 4/6] dt-bindings: serial: Document Freescale LINFlex UART Thread-Index: AQHVSWsZmO3SRwRL9k+WLeyivtMeFA== Date: Fri, 2 Aug 2019 19:47:21 +0000 Message-ID: <20190802194702.30249-5-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: d3056d75-a9b0-4513-8921-08d717823bfa x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-ms-exchange-purlcount: 1 x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5797; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(966005)(305945005)(7416002)(1076003)(14444005)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(478600001)(86362001)(6306002)(7736002)(6512007)(6436002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: lFKKqdxj9ZQRHHq8zlVYagwFapV3JgicE7xTdIfUvBVYvSOJm4ESOt14Bz4O+xga3EQaMf7D9XV3AoMF2ebFJ4gO1OrTrxmHi3/mZiKLQU7sKOK8y7Su6Mh19Wrk9EGpqdz2LOsBOdKp6Fn3KGRaWT9lNbil4gVvR2FecSIXxZmYvskDUJrc2rBjsKc3X6W1gDG55ns06QwxRebRTokCFQxvey0UqguhvYXgTfTZEZ92HhyIZ/YKGCn3S1TqnIUaQynsDPTlC3JzST6R5aN5EiKCbvFZfromuWotxpC8T2tpImwzCkaUhjLCV3qdd9i6GSzAfmtkjIGZo0UgWu7IM+rh3fGn6F72MqLL8A6Zjt696yLv+QpGUZjbMiftAI7ybhhLYa7B9uPeGjy9DwfOYdQqXAWG7XzYUC83itPgKjg= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d3056d75-a9b0-4513-8921-08d717823bfa X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:21.7735 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124730_129050_BC59523F X-CRM114-Status: GOOD ( 11.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , Larisa Ileana Grigore , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , Cosmin Stefan Stoica , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Stoica Cosmin-Stefan Add documentation for the serial communication interface module (LINFlex), found in two instances on S32V234. Signed-off-by: Stoica Cosmin-Stefan Signed-off-by: Larisa Grigore Signed-off-by: Stefan-Gabriel Mirea --- .../bindings/serial/fsl,s32-linflexuart.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt new file mode 100644 index 000000000000..957ffeaca9f1 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt @@ -0,0 +1,24 @@ +* Freescale Linflex UART + +The LINFlexD controller implements several LIN protocol versions, as well as +support for full-duplex UART communication through 8-bit and 9-bit frames. The +Linflex UART driver enables operation only in UART mode. + +See chapter 47 ("LINFlexD") in the reference manual[1]. + +Required properties: +- compatible : + - "fsl,s32-linflexuart" for linflex configured in uart mode which + is compatible with the one integrated on S32V234 SoC +- reg : Address and length of the register set for the device +- interrupts : Should contain uart interrupt + +Example: +uart0:serial@40053000 { + compatible = "fsl,s32-linflexuart"; + reg = <0x0 0x40053000 0x0 0x1000>; + interrupts = <0 59 4>; + status = "disabled"; +}; + +[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM From patchwork Fri Aug 2 19:47:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 69D8114E5 for ; Fri, 2 Aug 2019 19:49:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5737028837 for ; Fri, 2 Aug 2019 19:49:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4ADB9288AD; Fri, 2 Aug 2019 19:49:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A2C61288A0 for ; Fri, 2 Aug 2019 19:49:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KUf0TO7E7zKpZ6fh26eP7gpfdXm+5y53+J60oEwkVTU=; b=rkb4fGQdI0o+CR exUw8DYzHOfkMrtYMBumL9gYchaEaDoFfyGwQNT9IlHIRqDBNokyC84FmMgLrWTvQVYUexDPfgssK NjPV/3QgMtOP/eoyJZQWdZbbEas74slDzr//81mK3r9Y5BtqQbLXVNEDLZiRMPFn3p5iJ9Fc14ZXN /p1nEvaEavQcYP36l7+mW7+2M2cmfZQQEq/00R4nD9hVsYcSWo4y3X1decSdMPtAPqPQbYTGIqip/ 9GDE35uNGKFn1tX+roBA1as1jSE+qYw7O3JSAJ2a1AWzAR57LsPYBEZ3rur9V4kMBeSVf//f2/6EK D3M/jsjgLXfoOpCIuoJA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdY5-0006Pe-6S; Fri, 02 Aug 2019 19:49:09 +0000 Received: from mail-eopbgr80072.outbound.protection.outlook.com ([40.107.8.72] helo=EUR04-VI1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWV-0004so-1E for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:34 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Gmpw1jui3P8t0uxJSWuIFkdV7b6RhcBSUMuNqk9BSsZrMvr2IdD1cZT21K5HCe4hDS8Zv6BKqmEvR1ERUPmmRy5dk4bcIs2rQnyG1QSz1jTbdORle/9bClb1RmKjzmWNEHdeHgqbGXtzktLcVR0fkhbxAf5XWoV3/EEC5cXaIE0uwyTNzw/UwG4cdg7r26lrr9R1Tzaq4sHdX6Ks1APoGAUZFCsHBS6dKXvVXoS5Zeggk82JjFa+CUKvRFZ9Lo13xF6XO+2+EOcFI3VR1pftuIiv2UmgJQAaJv7NK4LNpZiWXXC3REzoljbpIM3fiqirsNbC6zJVswveROrH0AUeVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SVS2LitR+4qgPghLyKFmZNlUp+NTStUHOOrFqrpYzlg=; b=C52wUrIvaQsw7wPk3ddQBoE1BoObf41Tx4tK5cUyJAMH9kak6oO5U9EEpUAkmLa9xdsyImLpeLhZIEp+Wi8Ksy6797lVKYvgHtpoHm/HL2350/PBnogSwZRsVgnG1XiVS50xsSIyzHTms9TpVkbC2fIhaGDbkvZ9YEaRR39H68q6kc8uRpDRh6NxvU2N7NexvAh+tZAEhrnBI+LXMbHPvCWdSWCSSllcgepOYoW/6SdfKWQXFXO6iDd1d6gQVlHZ/Hq8/u7ypFwDjlHB8MgemoTpv1+FKTTAoG/kbahp5xDBmbKrlKFTIsWps5hRbCZVli7HrHwkmwxlrWdnz3kShQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SVS2LitR+4qgPghLyKFmZNlUp+NTStUHOOrFqrpYzlg=; b=I9YRGq/Atd6AYQTPoNH/rvTBafC5Ydtt7inS/yeOaa8YEeah0FjTC3BzTqci4aredfqt9sqYODjMKcbgOFhI5PB+wLu1JciKuhxhE7GcL8vXFB4G/J+nYmjNB8iRGEo+qDPdiLTnbmk8kNBQvXZHuEfk6mwQtXrHlNgGAYn8Dak= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:23 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:23 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 5/6] tty: serial: Add linflexuart driver for S32V234 Thread-Topic: [PATCH 5/6] tty: serial: Add linflexuart driver for S32V234 Thread-Index: AQHVSWsabMzimP5hDEGzwRv/fQs/bA== Date: Fri, 2 Aug 2019 19:47:23 +0000 Message-ID: <20190802194702.30249-6-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0f6d4afa-eee3-4bd6-9582-08d717823cf5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-ms-exchange-purlcount: 1 x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:127; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(966005)(305945005)(7416002)(1076003)(14444005)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(30864003)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(53946003)(478600001)(86362001)(6306002)(7736002)(6512007)(6436002)(559001)(579004); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: X1YvQvNgKlYQd9nBTMl0lGRNCMp0vkCGuwM3KjckRIUdwOcyp2dCsi0u80xxpQtPDyXjnZF8Urta2bHWJkX4uAfZ+P/hrpdgk6+6RkmDkILGYvgUzKlQy+z2bZSXDL5JfpguV3k/lCqPUiOF2TakD0i5zuYn/ZpzKp2h0Rq/ki3TvcsA5wA4Rl3k7tW2ZHAmOLtDndVG8nAIcDkuDYWsU/bL1R779zACwYIoXxq7lSVR7sYBAIj75LabH2h8ARc577uEjEv2SD954EglropFei9yUBf4yMGPGDjDDjkb8gemzKUqwvgLKRWcm9I59YRZcta+whd4v5tpcTkkUgWE8OQ0HXsuvCByjUCPxVSOp92j8Cwh1Pn6oAC3cp0ts0JFVCpl3tTrq77FYhW9o4sXuhkHn12I1zcu13AUuR8LivY= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0f6d4afa-eee3-4bd6-9582-08d717823cf5 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:23.5467 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124731_383753_0CC31737 X-CRM114-Status: GOOD ( 20.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , Larisa Ileana Grigore , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , Cosmin Stefan Stoica , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce support for LINFlex driver, based on: - the version of Freescale LPUART driver after commit b3e3bf2ef2c7 ("Merge 4.0-rc7 into tty-next"); - commit abf1e0a98083 ("tty: serial: fsl_lpuart: lock port on console write"). In this basic version, the driver can be tested using initramfs and relies on the clocks and pin muxing set up by U-Boot. Remarks concerning the earlycon support: - LinFlexD does not allow character transmissions in the INIT mode (see section 47.4.2.1 in the reference manual[1]). Therefore, a mutual exclusion between the first linflex_setup_watermark/linflex_set_termios executions and linflex_earlycon_putchar was employed and the characters normally sent to earlycon during initialization are kept in a buffer and sent afterwards. - Empirically, character transmission is also forbidden within the last 1-2 ms before entering the INIT mode, so we use an explicit timeout (PREINIT_DELAY) between linflex_earlycon_putchar and the first call to linflex_setup_watermark. - U-Boot currently uses the UART FIFO mode, while this driver makes the transition to the buffer mode. Therefore, the earlycon putchar function matches the U-Boot behavior before initializations and the Linux behavior after. [1] https://www.nxp.com/webapp/Download?colCode=S32V234RM Signed-off-by: Stoica Cosmin-Stefan Signed-off-by: Adrian.Nitu Signed-off-by: Larisa Grigore Signed-off-by: Ana Nedelcu Signed-off-by: Mihaela Martinas Signed-off-by: Matthew Nunez [stefan-gabriel.mirea@nxp.com: Reduced for upstreaming and implemented earlycon support] Signed-off-by: Stefan-Gabriel Mirea --- .../admin-guide/kernel-parameters.txt | 6 + drivers/tty/serial/Kconfig | 15 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/fsl_linflexuart.c | 956 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 5 files changed, 981 insertions(+) create mode 100644 drivers/tty/serial/fsl_linflexuart.c diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 46b826fcb5ad..4d545732aadc 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1090,6 +1090,12 @@ the framebuffer, pass the 'ram' option so that it is mapped with the correct attributes. + linflex, + Use early console provided by Freescale LinFlex UART + serial driver for NXP S32V234 SoCs. A valid base + address must be provided, and the serial port must + already be setup and configured. + earlyprintk= [X86,SH,ARM,M68k,S390] earlyprintk=vga earlyprintk=sclp diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index fd385c8c53a5..b4fa2f7c96bd 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1452,6 +1452,21 @@ config SERIAL_FSL_LPUART_CONSOLE If you have enabled the lpuart serial port on the Freescale SoCs, you can make it the console by answering Y to this option. +config SERIAL_FSL_LINFLEXUART + tristate "Freescale linflexuart serial port support" + select SERIAL_CORE + help + Support for the on-chip linflexuart on some Freescale SOCs. + +config SERIAL_FSL_LINFLEXUART_CONSOLE + bool "Console on Freescale linflexuart serial port" + depends on SERIAL_FSL_LINFLEXUART=y + select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON + help + If you have enabled the linflexuart serial port on the Freescale + SoCs, you can make it the console by answering Y to this option. + config SERIAL_CONEXANT_DIGICOLOR tristate "Conexant Digicolor CX92xxx USART serial port support" depends on OF diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index 7cd7cabfa6c4..7a3d52a453b7 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -82,6 +82,7 @@ obj-$(CONFIG_SERIAL_EFM32_UART) += efm32-uart.o obj-$(CONFIG_SERIAL_ARC) += arc_uart.o obj-$(CONFIG_SERIAL_RP2) += rp2.o obj-$(CONFIG_SERIAL_FSL_LPUART) += fsl_lpuart.o +obj-$(CONFIG_SERIAL_FSL_LINFLEXUART) += fsl_linflexuart.o obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o diff --git a/drivers/tty/serial/fsl_linflexuart.c b/drivers/tty/serial/fsl_linflexuart.c new file mode 100644 index 000000000000..7c4e6872b360 --- /dev/null +++ b/drivers/tty/serial/fsl_linflexuart.c @@ -0,0 +1,956 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Freescale linflexuart serial port driver + * + * Copyright 2012-2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP + */ + +#if defined(CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE) && \ + defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* All registers are 32-bit width */ + +#define LINCR1 0x0000 /* LIN control register */ +#define LINIER 0x0004 /* LIN interrupt enable register */ +#define LINSR 0x0008 /* LIN status register */ +#define LINESR 0x000C /* LIN error status register */ +#define UARTCR 0x0010 /* UART mode control register */ +#define UARTSR 0x0014 /* UART mode status register */ +#define LINTCSR 0x0018 /* LIN timeout control status register */ +#define LINOCR 0x001C /* LIN output compare register */ +#define LINTOCR 0x0020 /* LIN timeout control register */ +#define LINFBRR 0x0024 /* LIN fractional baud rate register */ +#define LINIBRR 0x0028 /* LIN integer baud rate register */ +#define LINCFR 0x002C /* LIN checksum field register */ +#define LINCR2 0x0030 /* LIN control register 2 */ +#define BIDR 0x0034 /* Buffer identifier register */ +#define BDRL 0x0038 /* Buffer data register least significant */ +#define BDRM 0x003C /* Buffer data register most significant */ +#define IFER 0x0040 /* Identifier filter enable register */ +#define IFMI 0x0044 /* Identifier filter match index */ +#define IFMR 0x0048 /* Identifier filter mode register */ +#define GCR 0x004C /* Global control register */ +#define UARTPTO 0x0050 /* UART preset timeout register */ +#define UARTCTO 0x0054 /* UART current timeout register */ + +/* + * Register field definitions + */ + +#define LINFLEXD_LINCR1_INIT BIT(0) +#define LINFLEXD_LINCR1_MME BIT(4) +#define LINFLEXD_LINCR1_BF BIT(7) + +#define LINFLEXD_LINSR_LINS_INITMODE BIT(12) +#define LINFLEXD_LINSR_LINS_MASK (0xF << 12) + +#define LINFLEXD_LINIER_SZIE BIT(15) +#define LINFLEXD_LINIER_OCIE BIT(14) +#define LINFLEXD_LINIER_BEIE BIT(13) +#define LINFLEXD_LINIER_CEIE BIT(12) +#define LINFLEXD_LINIER_HEIE BIT(11) +#define LINFLEXD_LINIER_FEIE BIT(8) +#define LINFLEXD_LINIER_BOIE BIT(7) +#define LINFLEXD_LINIER_LSIE BIT(6) +#define LINFLEXD_LINIER_WUIE BIT(5) +#define LINFLEXD_LINIER_DBFIE BIT(4) +#define LINFLEXD_LINIER_DBEIETOIE BIT(3) +#define LINFLEXD_LINIER_DRIE BIT(2) +#define LINFLEXD_LINIER_DTIE BIT(1) +#define LINFLEXD_LINIER_HRIE BIT(0) + +#define LINFLEXD_UARTCR_OSR_MASK (0xF << 24) +#define LINFLEXD_UARTCR_OSR(uartcr) (((uartcr) \ + & LINFLEXD_UARTCR_OSR_MASK) >> 24) + +#define LINFLEXD_UARTCR_ROSE BIT(23) + +#define LINFLEXD_UARTCR_RFBM BIT(9) +#define LINFLEXD_UARTCR_TFBM BIT(8) +#define LINFLEXD_UARTCR_WL1 BIT(7) +#define LINFLEXD_UARTCR_PC1 BIT(6) + +#define LINFLEXD_UARTCR_RXEN BIT(5) +#define LINFLEXD_UARTCR_TXEN BIT(4) +#define LINFLEXD_UARTCR_PC0 BIT(3) + +#define LINFLEXD_UARTCR_PCE BIT(2) +#define LINFLEXD_UARTCR_WL0 BIT(1) +#define LINFLEXD_UARTCR_UART BIT(0) + +#define LINFLEXD_UARTSR_SZF BIT(15) +#define LINFLEXD_UARTSR_OCF BIT(14) +#define LINFLEXD_UARTSR_PE3 BIT(13) +#define LINFLEXD_UARTSR_PE2 BIT(12) +#define LINFLEXD_UARTSR_PE1 BIT(11) +#define LINFLEXD_UARTSR_PE0 BIT(10) +#define LINFLEXD_UARTSR_RMB BIT(9) +#define LINFLEXD_UARTSR_FEF BIT(8) +#define LINFLEXD_UARTSR_BOF BIT(7) +#define LINFLEXD_UARTSR_RPS BIT(6) +#define LINFLEXD_UARTSR_WUF BIT(5) +#define LINFLEXD_UARTSR_4 BIT(4) + +#define LINFLEXD_UARTSR_TO BIT(3) + +#define LINFLEXD_UARTSR_DRFRFE BIT(2) +#define LINFLEXD_UARTSR_DTFTFF BIT(1) +#define LINFLEXD_UARTSR_NF BIT(0) +#define LINFLEXD_UARTSR_PE (LINFLEXD_UARTSR_PE0 |\ + LINFLEXD_UARTSR_PE1 |\ + LINFLEXD_UARTSR_PE2 |\ + LINFLEXD_UARTSR_PE3) + +#define LINFLEX_LDIV_MULTIPLIER (16) + +#define DRIVER_NAME "fsl-linflexuart" +#define DEV_NAME "ttyLF" +#define UART_NR 4 + +#define EARLYCON_BUFFER_INITIAL_CAP 8 + +#define PREINIT_DELAY 2000 /* us */ + +static const struct of_device_id linflex_dt_ids[] = { + { + .compatible = "fsl,s32-linflexuart", + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, linflex_dt_ids); + +#ifdef CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE +static struct uart_port *earlycon_port; +static bool linflex_earlycon_same_instance; +static spinlock_t init_lock; +static bool during_init; + +static struct { + char *content; + unsigned int len, cap; +} earlycon_buf; +#endif + +static void linflex_stop_tx(struct uart_port *port) +{ + unsigned long ier; + + ier = readl(port->membase + LINIER); + ier &= ~(LINFLEXD_LINIER_DTIE); + writel(ier, port->membase + LINIER); +} + +static void linflex_stop_rx(struct uart_port *port) +{ + unsigned long ier; + + ier = readl(port->membase + LINIER); + writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER); +} + +static inline void linflex_transmit_buffer(struct uart_port *sport) +{ + struct circ_buf *xmit = &sport->state->xmit; + unsigned char c; + unsigned long status; + + while (!uart_circ_empty(xmit)) { + c = xmit->buf[xmit->tail]; + writeb(c, sport->membase + BDRL); + + /* Waiting for data transmission completed. */ + while (((status = readl(sport->membase + UARTSR)) & + LINFLEXD_UARTSR_DTFTFF) != + LINFLEXD_UARTSR_DTFTFF) + ; + + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + sport->icount.tx++; + + writel(status | LINFLEXD_UARTSR_DTFTFF, + sport->membase + UARTSR); + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(sport); + + if (uart_circ_empty(xmit)) + linflex_stop_tx(sport); +} + +static void linflex_start_tx(struct uart_port *port) +{ + unsigned long ier; + + linflex_transmit_buffer(port); + ier = readl(port->membase + LINIER); + writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER); +} + +static irqreturn_t linflex_txint(int irq, void *dev_id) +{ + struct uart_port *sport = dev_id; + struct circ_buf *xmit = &sport->state->xmit; + unsigned long flags; + unsigned long status; + + spin_lock_irqsave(&sport->lock, flags); + + if (sport->x_char) { + writeb(sport->x_char, sport->membase + BDRL); + + /* waiting for data transmission completed */ + while (((status = readl(sport->membase + UARTSR)) & + LINFLEXD_UARTSR_DTFTFF) != LINFLEXD_UARTSR_DTFTFF) + ; + + writel(status | LINFLEXD_UARTSR_DTFTFF, + sport->membase + UARTSR); + + goto out; + } + + if (uart_circ_empty(xmit) || uart_tx_stopped(sport)) { + linflex_stop_tx(sport); + goto out; + } + + linflex_transmit_buffer(sport); + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(sport); + +out: + spin_unlock_irqrestore(&sport->lock, flags); + return IRQ_HANDLED; +} + +static irqreturn_t linflex_rxint(int irq, void *dev_id) +{ + struct uart_port *sport = dev_id; + unsigned int flg; + struct tty_port *port = &sport->state->port; + unsigned long flags, status; + unsigned char rx; + + spin_lock_irqsave(&sport->lock, flags); + + status = readl(sport->membase + UARTSR); + while (status & LINFLEXD_UARTSR_RMB) { + rx = readb(sport->membase + BDRM); + flg = TTY_NORMAL; + sport->icount.rx++; + + if (status & (LINFLEXD_UARTSR_BOF | LINFLEXD_UARTSR_SZF | + LINFLEXD_UARTSR_FEF | LINFLEXD_UARTSR_PE)) { + if (status & LINFLEXD_UARTSR_SZF) + status |= LINFLEXD_UARTSR_SZF; + if (status & LINFLEXD_UARTSR_BOF) + status |= LINFLEXD_UARTSR_BOF; + if (status & LINFLEXD_UARTSR_FEF) + status |= LINFLEXD_UARTSR_FEF; + if (status & LINFLEXD_UARTSR_PE) + status |= LINFLEXD_UARTSR_PE; + } + + writel(status | LINFLEXD_UARTSR_RMB | LINFLEXD_UARTSR_DRFRFE, + sport->membase + UARTSR); + status = readl(sport->membase + UARTSR); + + if (uart_handle_sysrq_char(sport, (unsigned char)rx)) + continue; + +#ifdef SUPPORT_SYSRQ + sport->sysrq = 0; +#endif + tty_insert_flip_char(port, rx, flg); + } + + spin_unlock_irqrestore(&sport->lock, flags); + + tty_flip_buffer_push(port); + + return IRQ_HANDLED; +} + +static irqreturn_t linflex_int(int irq, void *dev_id) +{ + struct uart_port *sport = dev_id; + unsigned long status; + + status = readl(sport->membase + UARTSR); + + if (status & LINFLEXD_UARTSR_DRFRFE) + linflex_rxint(irq, dev_id); + if (status & LINFLEXD_UARTSR_DTFTFF) + linflex_txint(irq, dev_id); + + return IRQ_HANDLED; +} + +/* return TIOCSER_TEMT when transmitter is not busy */ +static unsigned int linflex_tx_empty(struct uart_port *port) +{ + unsigned long status; + + status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF; + + return status ? TIOCSER_TEMT : 0; +} + +static unsigned int linflex_get_mctrl(struct uart_port *port) +{ + return 0; +} + +static void linflex_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ +} + +static void linflex_break_ctl(struct uart_port *port, int break_state) +{ +} + +static void linflex_setup_watermark(struct uart_port *sport) +{ + unsigned long cr, ier, cr1; + + /* Disable transmission/reception */ + ier = readl(sport->membase + LINIER); + ier &= ~(LINFLEXD_LINIER_DRIE | LINFLEXD_LINIER_DTIE); + writel(ier, sport->membase + LINIER); + + cr = readl(sport->membase + UARTCR); + cr &= ~(LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN); + writel(cr, sport->membase + UARTCR); + + /* Enter initialization mode by setting INIT bit */ + + /* set the Linflex in master mode and activate by-pass filter */ + cr1 = LINFLEXD_LINCR1_BF | LINFLEXD_LINCR1_MME + | LINFLEXD_LINCR1_INIT; + writel(cr1, sport->membase + LINCR1); + + /* wait for init mode entry */ + while ((readl(sport->membase + LINSR) + & LINFLEXD_LINSR_LINS_MASK) + != LINFLEXD_LINSR_LINS_INITMODE) + ; + + /* + * UART = 0x1; - Linflex working in UART mode + * TXEN = 0x1; - Enable transmission of data now + * RXEn = 0x1; - Receiver enabled + * WL0 = 0x1; - 8 bit data + * PCE = 0x0; - No parity + */ + + /* set UART bit to allow writing other bits */ + writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR); + + cr = (LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN | + LINFLEXD_UARTCR_WL0 | LINFLEXD_UARTCR_UART); + + writel(cr, sport->membase + UARTCR); + + cr1 &= ~(LINFLEXD_LINCR1_INIT); + + writel(cr1, sport->membase + LINCR1); + + ier = readl(sport->membase + LINIER); + ier |= LINFLEXD_LINIER_DRIE; + ier |= LINFLEXD_LINIER_DTIE; + + writel(ier, sport->membase + LINIER); +} + +static int linflex_startup(struct uart_port *port) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + + linflex_setup_watermark(port); + + spin_unlock_irqrestore(&port->lock, flags); + + ret = devm_request_irq(port->dev, port->irq, linflex_int, 0, + DRIVER_NAME, port); + + return ret; +} + +static void linflex_shutdown(struct uart_port *port) +{ + unsigned long ier; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + + /* disable interrupts */ + ier = readl(port->membase + LINIER); + ier &= ~(LINFLEXD_LINIER_DRIE | LINFLEXD_LINIER_DTIE); + writel(ier, port->membase + LINIER); + + spin_unlock_irqrestore(&port->lock, flags); + + devm_free_irq(port->dev, port->irq, port); +} + +static void +linflex_set_termios(struct uart_port *port, struct ktermios *termios, + struct ktermios *old) +{ + unsigned long flags; + unsigned long cr, old_cr, cr1; + unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; + + cr = readl(port->membase + UARTCR); + old_cr = cr; + + /* Enter initialization mode by setting INIT bit */ + cr1 = readl(port->membase + LINCR1); + cr1 |= LINFLEXD_LINCR1_INIT; + writel(cr1, port->membase + LINCR1); + + /* wait for init mode entry */ + while ((readl(port->membase + LINSR) + & LINFLEXD_LINSR_LINS_MASK) + != LINFLEXD_LINSR_LINS_INITMODE) + ; + + /* + * only support CS8 and CS7, and for CS7 must enable PE. + * supported mode: + * - (7,e/o,1) + * - (8,n,1) + * - (8,e/o,1) + */ + /* enter the UART into configuration mode */ + + while ((termios->c_cflag & CSIZE) != CS8 && + (termios->c_cflag & CSIZE) != CS7) { + termios->c_cflag &= ~CSIZE; + termios->c_cflag |= old_csize; + old_csize = CS8; + } + + if ((termios->c_cflag & CSIZE) == CS7) { + /* Word length: WL1WL0:00 */ + cr = old_cr & ~LINFLEXD_UARTCR_WL1 & ~LINFLEXD_UARTCR_WL0; + } + + if ((termios->c_cflag & CSIZE) == CS8) { + /* Word length: WL1WL0:01 */ + cr = (old_cr | LINFLEXD_UARTCR_WL0) & ~LINFLEXD_UARTCR_WL1; + } + + if (termios->c_cflag & CMSPAR) { + if ((termios->c_cflag & CSIZE) != CS8) { + termios->c_cflag &= ~CSIZE; + termios->c_cflag |= CS8; + } + /* has a space/sticky bit */ + cr |= LINFLEXD_UARTCR_WL0; + } + + if (termios->c_cflag & CSTOPB) + termios->c_cflag &= ~CSTOPB; + + /* parity must be enabled when CS7 to match 8-bits format */ + if ((termios->c_cflag & CSIZE) == CS7) + termios->c_cflag |= PARENB; + + if ((termios->c_cflag & PARENB)) { + cr |= LINFLEXD_UARTCR_PCE; + if (termios->c_cflag & PARODD) + cr = (cr | LINFLEXD_UARTCR_PC0) & + (~LINFLEXD_UARTCR_PC1); + else + cr = cr & (~LINFLEXD_UARTCR_PC1 & + ~LINFLEXD_UARTCR_PC0); + } else { + cr &= ~LINFLEXD_UARTCR_PCE; + } + + spin_lock_irqsave(&port->lock, flags); + + port->read_status_mask = 0; + + if (termios->c_iflag & INPCK) + port->read_status_mask |= (LINFLEXD_UARTSR_FEF | + LINFLEXD_UARTSR_PE0 | + LINFLEXD_UARTSR_PE1 | + LINFLEXD_UARTSR_PE2 | + LINFLEXD_UARTSR_PE3); + if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) + port->read_status_mask |= LINFLEXD_UARTSR_FEF; + + /* characters to ignore */ + port->ignore_status_mask = 0; + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= LINFLEXD_UARTSR_PE; + if (termios->c_iflag & IGNBRK) { + port->ignore_status_mask |= LINFLEXD_UARTSR_PE; + /* + * if we're ignoring parity and break indicators, + * ignore overruns too (for real raw support). + */ + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= LINFLEXD_UARTSR_BOF; + } + + writel(cr, port->membase + UARTCR); + + cr1 &= ~(LINFLEXD_LINCR1_INIT); + + writel(cr1, port->membase + LINCR1); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *linflex_type(struct uart_port *port) +{ + return "FSL_LINFLEX"; +} + +static void linflex_release_port(struct uart_port *port) +{ + /* nothing to do */ +} + +static int linflex_request_port(struct uart_port *port) +{ + return 0; +} + +/* configure/auto-configure the port */ +static void linflex_config_port(struct uart_port *port, int flags) +{ + if (flags & UART_CONFIG_TYPE) + port->type = PORT_LINFLEXUART; +} + +static int linflex_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + if ((ser->type != PORT_UNKNOWN && ser->type != PORT_LINFLEXUART) || + (port->irq != ser->irq) || + (ser->io_type != UPIO_MEM) || + (port->iobase != ser->port) || + (ser->hub6 != 0)) + return -EINVAL; + + return 0; +} + +static const struct uart_ops linflex_pops = { + .tx_empty = linflex_tx_empty, + .set_mctrl = linflex_set_mctrl, + .get_mctrl = linflex_get_mctrl, + .stop_tx = linflex_stop_tx, + .start_tx = linflex_start_tx, + .stop_rx = linflex_stop_rx, + .break_ctl = linflex_break_ctl, + .startup = linflex_startup, + .shutdown = linflex_shutdown, + .set_termios = linflex_set_termios, + .type = linflex_type, + .request_port = linflex_request_port, + .release_port = linflex_release_port, + .config_port = linflex_config_port, + .verify_port = linflex_verify_port, +}; + +static struct uart_port *linflex_ports[UART_NR]; + +#ifdef CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE +static void linflex_console_putchar(struct uart_port *port, int ch) +{ + unsigned long cr; + + cr = readl(port->membase + UARTCR); + + writeb(ch, port->membase + BDRL); + + if (!(cr & LINFLEXD_UARTCR_TFBM)) + while ((readl(port->membase + UARTSR) & + LINFLEXD_UARTSR_DTFTFF) + != LINFLEXD_UARTSR_DTFTFF) + ; + else + while (readl(port->membase + UARTSR) & + LINFLEXD_UARTSR_DTFTFF) + ; + + if (!(cr & LINFLEXD_UARTCR_TFBM)) { + writel((readl(port->membase + UARTSR) | + LINFLEXD_UARTSR_DTFTFF), + port->membase + UARTSR); + } +} + +static void linflex_earlycon_putchar(struct uart_port *port, int ch) +{ + unsigned long flags; + char *ret; + + if (!linflex_earlycon_same_instance) { + linflex_console_putchar(port, ch); + return; + } + + spin_lock_irqsave(&init_lock, flags); + if (!during_init) + goto outside_init; + + if (earlycon_buf.len >= 1 << CONFIG_LOG_BUF_SHIFT) + goto init_release; + + if (!earlycon_buf.cap) { + earlycon_buf.content = kmalloc(EARLYCON_BUFFER_INITIAL_CAP, + GFP_ATOMIC); + earlycon_buf.cap = earlycon_buf.content ? + EARLYCON_BUFFER_INITIAL_CAP : 0; + } else if (earlycon_buf.len == earlycon_buf.cap) { + ret = krealloc(earlycon_buf.content, earlycon_buf.cap << 1, + GFP_ATOMIC); + if (ret) { + earlycon_buf.content = ret; + earlycon_buf.cap <<= 1; + } + } + + if (earlycon_buf.len < earlycon_buf.cap) + earlycon_buf.content[earlycon_buf.len++] = ch; + + goto init_release; + +outside_init: + linflex_console_putchar(port, ch); +init_release: + spin_unlock_irqrestore(&init_lock, flags); +} + +static void linflex_string_write(struct uart_port *sport, const char *s, + unsigned int count) +{ + unsigned long cr, ier = 0; + + ier = readl(sport->membase + LINIER); + linflex_stop_tx(sport); + + cr = readl(sport->membase + UARTCR); + cr |= (LINFLEXD_UARTCR_TXEN); + writel(cr, sport->membase + UARTCR); + + uart_console_write(sport, s, count, linflex_console_putchar); + + writel(ier, sport->membase + LINIER); +} + +static void +linflex_console_write(struct console *co, const char *s, unsigned int count) +{ + struct uart_port *sport = linflex_ports[co->index]; + unsigned long flags; + int locked = 1; + + if (sport->sysrq) + locked = 0; + else if (oops_in_progress) + locked = spin_trylock_irqsave(&sport->lock, flags); + else + spin_lock_irqsave(&sport->lock, flags); + + linflex_string_write(sport, s, count); + + if (locked) + spin_unlock_irqrestore(&sport->lock, flags); +} + +/* + * if the port was already initialised (eg, by a boot loader), + * try to determine the current setup. + */ +static void __init +linflex_console_get_options(struct uart_port *sport, int *parity, int *bits) +{ + unsigned long cr; + + cr = readl(sport->membase + UARTCR); + cr &= LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN; + + if (!cr) + return; + + /* ok, the port was enabled */ + + *parity = 'n'; + if (cr & LINFLEXD_UARTCR_PCE) { + if (cr & LINFLEXD_UARTCR_PC0) + *parity = 'o'; + else + *parity = 'e'; + } + + if ((cr & LINFLEXD_UARTCR_WL0) && ((cr & LINFLEXD_UARTCR_WL1) == 0)) { + if (cr & LINFLEXD_UARTCR_PCE) + *bits = 9; + else + *bits = 8; + } +} + +static int __init linflex_console_setup(struct console *co, char *options) +{ + struct uart_port *sport; + int baud = 115200; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + int ret; + int i; + unsigned long flags; + /* + * check whether an invalid uart number has been specified, and + * if so, search for the first available port that does have + * console support. + */ + if (co->index == -1 || co->index >= ARRAY_SIZE(linflex_ports)) + co->index = 0; + + sport = linflex_ports[co->index]; + if (!sport) + return -ENODEV; + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + else + linflex_console_get_options(sport, &parity, &bits); + + if (earlycon_port && sport->mapbase == earlycon_port->mapbase) { + linflex_earlycon_same_instance = true; + + spin_lock_irqsave(&init_lock, flags); + during_init = true; + spin_unlock_irqrestore(&init_lock, flags); + + /* Workaround for character loss or output of many invalid + * characters, when INIT mode is entered shortly after a + * character has just been printed. + */ + udelay(PREINIT_DELAY); + } + + linflex_setup_watermark(sport); + + ret = uart_set_options(sport, co, baud, parity, bits, flow); + + if (!linflex_earlycon_same_instance) + goto done; + + spin_lock_irqsave(&init_lock, flags); + + /* Emptying buffer */ + if (earlycon_buf.len) { + for (i = 0; i < earlycon_buf.len; i++) + linflex_console_putchar(earlycon_port, + earlycon_buf.content[i]); + + kfree(earlycon_buf.content); + earlycon_buf.len = 0; + } + + during_init = false; + spin_unlock_irqrestore(&init_lock, flags); + +done: + return ret; +} + +static struct uart_driver linflex_reg; +static struct console linflex_console = { + .name = DEV_NAME, + .write = linflex_console_write, + .device = uart_console_device, + .setup = linflex_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &linflex_reg, +}; + +static void linflex_earlycon_write(struct console *con, const char *s, + unsigned int n) +{ + struct earlycon_device *dev = con->data; + + uart_console_write(&dev->port, s, n, linflex_earlycon_putchar); +} + +static int __init linflex_early_console_setup(struct earlycon_device *device, + const char *options) +{ + if (!device->port.membase) + return -ENODEV; + + device->con->write = linflex_earlycon_write; + earlycon_port = &device->port; + + return 0; +} + +OF_EARLYCON_DECLARE(linflex, "fsl,s32v234-linflexuart", + linflex_early_console_setup); + +#define LINFLEX_CONSOLE (&linflex_console) +#else +#define LINFLEX_CONSOLE NULL +#endif + +static struct uart_driver linflex_reg = { + .owner = THIS_MODULE, + .driver_name = DRIVER_NAME, + .dev_name = DEV_NAME, + .nr = ARRAY_SIZE(linflex_ports), + .cons = LINFLEX_CONSOLE, +}; + +static int linflex_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct uart_port *sport; + struct resource *res; + int ret; + + sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); + if (!sport) + return -ENOMEM; + + ret = of_alias_get_id(np, "serial"); + if (ret < 0) { + dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); + return ret; + } + if (ret >= UART_NR) { + dev_err(&pdev->dev, "driver limited to %d serial ports\n", + UART_NR); + return -ENOMEM; + } + + sport->line = ret; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + sport->mapbase = res->start; + sport->membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(sport->membase)) + return PTR_ERR(sport->membase); + + sport->dev = &pdev->dev; + sport->type = PORT_LINFLEXUART; + sport->iotype = UPIO_MEM; + sport->irq = platform_get_irq(pdev, 0); + sport->ops = &linflex_pops; + sport->flags = UPF_BOOT_AUTOCONF; + + linflex_ports[sport->line] = sport; + + platform_set_drvdata(pdev, sport); + + ret = uart_add_one_port(&linflex_reg, sport); + if (ret) + return ret; + + return 0; +} + +static int linflex_remove(struct platform_device *pdev) +{ + struct uart_port *sport = platform_get_drvdata(pdev); + + uart_remove_one_port(&linflex_reg, sport); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int linflex_suspend(struct device *dev) +{ + struct uart_port *sport = dev_get_drvdata(dev); + + uart_suspend_port(&linflex_reg, sport); + + return 0; +} + +static int linflex_resume(struct device *dev) +{ + struct uart_port *sport = dev_get_drvdata(dev); + + uart_resume_port(&linflex_reg, sport); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(linflex_pm_ops, linflex_suspend, linflex_resume); + +static struct platform_driver linflex_driver = { + .probe = linflex_probe, + .remove = linflex_remove, + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = linflex_dt_ids, + .pm = &linflex_pm_ops, + }, +}; + +static int __init linflex_serial_init(void) +{ + int ret; + + ret = uart_register_driver(&linflex_reg); + if (ret) + return ret; + + ret = platform_driver_register(&linflex_driver); + if (ret) + uart_unregister_driver(&linflex_reg); + +#ifdef CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE + spin_lock_init(&init_lock); +#endif + + return ret; +} + +static void __exit linflex_serial_exit(void) +{ + platform_driver_unregister(&linflex_driver); + uart_unregister_driver(&linflex_reg); +} + +module_init(linflex_serial_init); +module_exit(linflex_serial_exit); + +MODULE_DESCRIPTION("Freescale linflex serial port driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index 5642c05e0da0..25a3dead4473 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -293,4 +293,7 @@ /* SiFive UART */ #define PORT_SIFIVE_V0 120 +/* Freescale Linflex UART */ +#define PORT_LINFLEXUART 121 + #endif /* _UAPILINUX_SERIAL_CORE_H */ From patchwork Fri Aug 2 19:47:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan-gabriel Mirea X-Patchwork-Id: 11074083 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D510C13B1 for ; Fri, 2 Aug 2019 19:48:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C4D93288A0 for ; Fri, 2 Aug 2019 19:48:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B8817288AF; Fri, 2 Aug 2019 19:48:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 50778288A0 for ; Fri, 2 Aug 2019 19:48:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FxUZfzSueC1IZRxkB7/krFsiiuuMTbgIumxHO1fNn7I=; b=Ah2nZSgRSWlMVR jcma37AqfDcP9xeaTY9uSKVcma9RczQ/xu/D+TeGGGNp2y4bIHWmeH/MWws8mkdmNLXF523DsBOyz B/dZovFPE9+db2Te1OrOvQdc4BvRZmZwHdgclhwijRIbOs3ls0+rQyaHfuCX2g5v8mL1l7Fxr2s+L bWXXwm7FmYO/K0AWY1V3YN7WCoVC94JtVNh8cFJ9cK3xymauaC4VC09E5H6tfB3buMCGSzXkmpyem 1rGksAtK/nFbZcOPWBpFDTKaK2OujFR4yJ2c2PdOEVshNN9ZVpBqn73qjbhTHb1wrdODmIhRMXBVS 0UPqfZLq851FFNTyaxoQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1htdXr-0006BY-1C; Fri, 02 Aug 2019 19:48:55 +0000 Received: from mail-eopbgr40075.outbound.protection.outlook.com ([40.107.4.75] helo=EUR03-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1htdWW-0004sU-4n for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2019 19:47:33 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cfjry86hYoeqyu0dcaehoYO0oM8aKAM8hmL1GIx8yWPZlNVfnwAKdkW80cdg/7pUYKPI6o3I9Gt2tonYJevh+3R0y9fmwxgmzELF36WgYCWlbgDI5Ha50yvdHVnhF0i0XyeD4sGqLe6j5GVFSFl7EeYAY2Odi5Xi4Z8iOrWcnCid97LLwMkIP/z8GsE3PVfxkgObVtgkbJPKGjmlPvheJNKpfGAUkckuXoV7Bd9T17yh7WPZl6bqwstlQDc+ek2q8q5uUQjSK6+Ss35O/aQOCX1a0U4OqGGKzmrzq/+XXTFI7EKxX6zve4m+kvhHoOkA3sAY37jdTFWFWAYPVmLYMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=egAmLLcYxNc+vNg4VL0BrjM1fDO0l7UPG3LF2prGCGY=; b=YAl5z4uUcOK6IZStWx1Xh/IbZbO7WFoy9a5tkYivJvbK+pJLoLUkgL8pFLosKfpjSbUJfVMSdw2mhJB4htrfxHVyFvdhVt7+us3UQWBm3suikjrlB0d6qOWrcU8pZLIs3T590+tACwUpb3ZMKseonGT6CSWuIjq8+HcY2iJN6pcYviUPbuGuOM7RY8dSWepu29GWCt9Bc5oflAE2Jjeby/hdyNb5I3Z0hjPr5JqM0KC+f/RP+R0iyNtgvJrg64KccAD0qIm8ksHzA07Wcor0p+qEgnOho2RIkRonnhUbvP35kKNYglMMfYDGn23vrXqcCUqjPr8G7Af855ys/U/9rw== ARC-Authentication-Results: i=1; mx.microsoft.com 1;spf=pass smtp.mailfrom=nxp.com;dmarc=pass action=none header.from=nxp.com;dkim=pass header.d=nxp.com;arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=egAmLLcYxNc+vNg4VL0BrjM1fDO0l7UPG3LF2prGCGY=; b=Ebwwa5TdLeuExBXi3kWz9jeXPxdQiG7MGFE9bPKLoF9TQsBSzOnlqvJx+/BDT1AHsuCG/oPKxAoyiEUWw6CWkkDuqO0RdUzuJbDG79NgJBxU7Xo8jeKsq9zqKld3TuQ0PFKxTnHC0a3sZaQYrPZVHJOmfrpt3XsbP1UwKjG3kic= Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com (10.175.20.18) by VI1PR0402MB2829.eurprd04.prod.outlook.com (10.175.26.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Fri, 2 Aug 2019 19:47:25 +0000 Received: from VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023]) by VI1PR0402MB2863.eurprd04.prod.outlook.com ([fe80::7de6:ea4b:9b5d:d023%7]) with mapi id 15.20.2136.010; Fri, 2 Aug 2019 19:47:25 +0000 From: Stefan-gabriel Mirea To: "corbet@lwn.net" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "gregkh@linuxfoundation.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "shawnguo@kernel.org" , Leo Li Subject: [PATCH 6/6] arm64: defconfig: Enable configs for S32V234 Thread-Topic: [PATCH 6/6] arm64: defconfig: Enable configs for S32V234 Thread-Index: AQHVSWsb/yQRxZpYOkehuDu46fPO7Q== Date: Fri, 2 Aug 2019 19:47:25 +0000 Message-ID: <20190802194702.30249-7-stefan-gabriel.mirea@nxp.com> References: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> In-Reply-To: <20190802194702.30249-1-stefan-gabriel.mirea@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.22.0 x-clientproxiedby: AM6PR04CA0051.eurprd04.prod.outlook.com (2603:10a6:20b:f0::28) To VI1PR0402MB2863.eurprd04.prod.outlook.com (2603:10a6:800:af::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=stefan-gabriel.mirea@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3a505ba7-8748-4128-a196-08d717823df9 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0402MB2829; x-ms-traffictypediagnostic: VI1PR0402MB2829: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3044; x-forefront-prvs: 011787B9DD x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(136003)(376002)(39860400002)(366004)(189003)(199004)(68736007)(446003)(8676002)(6486002)(54906003)(110136005)(3846002)(305945005)(4744005)(7416002)(1076003)(6116002)(66066001)(2906002)(2201001)(316002)(256004)(36756003)(6636002)(486006)(102836004)(14454004)(71200400001)(53936002)(26005)(66476007)(11346002)(81166006)(71190400001)(186003)(76176011)(66946007)(2616005)(64756008)(8936002)(66446008)(66556008)(99286004)(4326008)(386003)(6506007)(5660300002)(2501003)(52116002)(81156014)(50226002)(25786009)(476003)(478600001)(86362001)(7736002)(6512007)(6436002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0402MB2829; H:VI1PR0402MB2863.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: FL8pWv/qH15hbCfrjKWf6Td2G1D3hUPtBMW8HFoF6ATlaskQYg4OmmC3HLY7XoQ9nwTUov5k0IkKPCETbIuO3Q9/75fTrPJCEkWgPgtlMv494+dFLJ3wtQtmLRvhlsdP20aCS1bBjaJzTb//9M8moeotJ+8gCklKemcAgMHEBwqcqsCkDJBYOthustR9duCDqOWzftv33QmcTP3Nwvs5NVFlcqCX5ibZfX5y2njYlFtWWwboVjfOBgRm+aw6+Tgem8LvoxXwOZcDHr5k2AcIvCALG3IOiB6e7UC1/eM4ThT6/ZkPTGv1nT4wI6UJt/31yuy5AySECD+OOq3z+mZ8iEXl7bS3U5i/BLOxJDn8JPeCoqrM66kEk+D77aA9ChkSLl/6lzwWUkTMyLfur6rniaDv8yCxj6Xq9g5iUur7l6c= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3a505ba7-8748-4128-a196-08d717823df9 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2019 19:47:25.1490 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: stefan-gabriel.mirea@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB2829 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190802_124732_222235_3C52AD54 X-CRM114-Status: UNSURE ( 9.79 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "jslaby@suse.com" , Cosmin Stefan Stoica , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mihaela Martinas Enable support for the S32V234 SoC, including the previously added UART driver. Signed-off-by: Mihaela Martinas Signed-off-by: Adrian.Nitu Signed-off-by: Stoica Cosmin-Stefan Signed-off-by: Stefan-Gabriel Mirea --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0e58ef02880c..bb5aa95a8455 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -48,6 +48,7 @@ CONFIG_ARCH_MXC=y CONFIG_ARCH_QCOM=y CONFIG_ARCH_RENESAS=y CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_S32=y CONFIG_ARCH_SEATTLE=y CONFIG_ARCH_STRATIX10=y CONFIG_ARCH_SYNQUACER=y @@ -347,6 +348,8 @@ CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_FSL_LINFLEXUART=y +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y CONFIG_SERIAL_DEV_BUS=y CONFIG_VIRTIO_CONSOLE=y