From patchwork Mon Aug 5 08:58:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11076307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE49D17E0 for ; Mon, 5 Aug 2019 08:59:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A85E12886E for ; Mon, 5 Aug 2019 08:59:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9C9C428879; Mon, 5 Aug 2019 08:59:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 284CF2886E for ; Mon, 5 Aug 2019 08:59:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A74A6E30D; Mon, 5 Aug 2019 08:59:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0892C6E30D for ; Mon, 5 Aug 2019 08:59:06 +0000 (UTC) Received: by mail-lj1-x244.google.com with SMTP id p17so78639350ljg.1 for ; Mon, 05 Aug 2019 01:59:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XS8NSKoh+CguW/bz0NOSFtpL/Lk0LcQIGEWD1T1/JOM=; b=SJZUkPOJVG+IHw96S0LQiM6yHK4gD1iU3rTSqGv/3zCoVBFyiEQSqdAqRBEfm6AYqF o3hXFfMqLgOmfPdk6mNhQksJbaFNqK+3crZclY/AYjWdZgsgECpr7fQabiAno7+sma0U GWAeJ7J+QkVogeen6xVTMGvy3gFM1k1V3tcbcyMFHuU8+7nIBm4KyNekXGI6YeUrQ2YN v46oNAR+lmygtAfiqyDMUyr35GlU0PegIsauPmtvB0Y/RiguVJjwgH3X47Xt+IC2tIAU Wo+se1XQY6VC8n+n3+YtxLe7KwOMt1040kxYwrSOtifcWAkPB/zEplyfr3OZp0IxnIKK OHbQ== X-Gm-Message-State: APjAAAXJwlopNGqWTbd1HHv3XRtkLGCO85ynwYlc4dQqf3ltLCo2DLit C6hw1gpCliZNIija1NFs3iBirQ== X-Google-Smtp-Source: APXvYqyT7JCeHt1WLbylCyF2z+2x7MRYAh/2OgpnQbB7X9M0R32wIXpIVsQv++GkFVnlRjUJmLHDGA== X-Received: by 2002:a2e:8495:: with SMTP id b21mr59894302ljh.149.1564995544322; Mon, 05 Aug 2019 01:59:04 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id b20sm234500lfc.17.2019.08.05.01.59.02 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 05 Aug 2019 01:59:03 -0700 (PDT) From: Linus Walleij To: Daniel Tang , Fabian Vogt Subject: [PATCH 1/4 v2] drm/pl111: Support grayscale Date: Mon, 5 Aug 2019 10:58:44 +0200 Message-Id: <20190805085847.25554-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190805085847.25554-1-linus.walleij@linaro.org> References: <20190805085847.25554-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XS8NSKoh+CguW/bz0NOSFtpL/Lk0LcQIGEWD1T1/JOM=; b=TaJN+q5ENJDArezn6ZlerbgxeGiw7w3OKzEjj/3FnWUanN6/R+IL+cMVEdjLJZxQKc gUp7dFwr2lelmvLY8MA1Lzkjc2rbXkWEz+2YndDZtEYMQ/DaEoT7EZpBFX/n19VW4Ie+ +ILJrk4AS9SkeW0SDceOJ+UXb0dspph9y/Io5YiEXGInLxSVNs3dkanwW/qQkFRFI6vQ LdJYfz3GgDcxXLcNrfe7ZTBalXzR+8vwMik8VihO5yKajOM6Wssw5zBwiCnFgOnbYhpM 9+oJB3B2qD5ftS/VSXFeBvX1RtXMbZK6Uy/ZexLrVVDZL5z0HYMh5Uevd5QNyBXYTPqQ pOJg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Migrating the TI nspire calculators to use the PL111 driver for framebuffer requires grayscale support for the elder panel which uses 8bit grayscale only. DRM does not support 8bit grayscale framebuffers in memory, but by defining the bus format to be MEDIA_BUS_FMT_Y8_1X8 we can get the hardware to turn on a grayscaling feature and convert the RGB framebuffer to grayscale for us. Cc: Daniel Tang Cc: Fabian Vogt Tested-by: Fabian Vogt Acked-by: Sam Ravnborg Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Now tested --- drivers/gpu/drm/pl111/pl111_display.c | 29 +++++++++++++++++++++++++-- include/linux/amba/clcd-regs.h | 1 + 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 450166d167f6..1751fca6f6f5 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -126,6 +126,7 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, struct drm_framebuffer *fb = plane->state->fb; struct drm_connector *connector = priv->connector; struct drm_bridge *bridge = priv->bridge; + bool grayscale = false; u32 cntl; u32 ppl, hsw, hfp, hbp; u32 lpp, vsw, vfp, vbp; @@ -185,6 +186,20 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) tim2 |= TIM2_IPC; + + if (connector->display_info.num_bus_formats == 1 && + connector->display_info.bus_formats[0] == + MEDIA_BUS_FMT_Y8_1X8) + grayscale = true; + + /* + * The AC pin bias frequency is set to max count when using + * grayscale so at least once in a while we will reverse + * polarity and get rid of any DC built up that could + * damage the display. + */ + if (grayscale) + tim2 |= TIM2_ACB_MASK; } if (bridge) { @@ -216,8 +231,18 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, writel(0, priv->regs + CLCD_TIM3); - /* Hard-code TFT panel */ - cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1); + /* + * Detect grayscale bus format. We do not support a grayscale mode + * toward userspace, instead we expose an RGB24 buffer and then the + * hardware will activate its grayscaler to convert to the grayscale + * format. + */ + if (grayscale) + cntl = CNTL_LCDEN | CNTL_LCDMONO8; + else + /* Else we assume TFT display */ + cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1); + /* On the ST Micro variant, assume all 24 bits are connected */ if (priv->variant->st_bitmux_control) cntl |= CNTL_ST_CDWID_24; diff --git a/include/linux/amba/clcd-regs.h b/include/linux/amba/clcd-regs.h index 516a6fda83c5..421b0fa90d6a 100644 --- a/include/linux/amba/clcd-regs.h +++ b/include/linux/amba/clcd-regs.h @@ -42,6 +42,7 @@ #define TIM2_PCD_LO_MASK GENMASK(4, 0) #define TIM2_PCD_LO_BITS 5 #define TIM2_CLKSEL (1 << 5) +#define TIM2_ACB_MASK GENMASK(10, 6) #define TIM2_IVS (1 << 11) #define TIM2_IHS (1 << 12) #define TIM2_IPC (1 << 13) From patchwork Mon Aug 5 08:58:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11076309 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D10413AC for ; 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Mon, 05 Aug 2019 01:59:06 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id b20sm234500lfc.17.2019.08.05.01.59.05 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 05 Aug 2019 01:59:05 -0700 (PDT) From: Linus Walleij To: Daniel Tang , Fabian Vogt Subject: [PATCH 2/4 v2] drm/panel: simple: Add TI nspire panel bindings Date: Mon, 5 Aug 2019 10:58:45 +0200 Message-Id: <20190805085847.25554-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190805085847.25554-1-linus.walleij@linaro.org> References: <20190805085847.25554-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EXkqTVhXO6MuFFjVCLi4lBLWx6BlFlZJVWVgTuZAEY4=; b=Ba7QAWM2Evl4Pc4fPtC/POrJ4FhEhiepLZMIk4k/Jf6H4nfgT+MI5OG45ZGSdcv755 H2P3RmWgBKtQhwYQ83e0djlFVDjf4wxYMObX9mcMV2fBTv5n1rjVivL+60qap0XXNSU6 /LgzC00XNxT/HS6mPk5/AEuqQHVpVdfDX8ra02QjPmCSIEtANfRQs9zrhxEeAjfLDt1q tBJjnis5YTgkKttRZvNl1dQoNstj3Pm17uZEEqNaHeF7jj3fN1Un4hVybpPdobQRc/sc yS3L6Q+6afMC1lCyqmzXa64ipIj1SNVbp9s6M2955b2Csb4HkNKQAPkvqOPwTZ5yK6Mz oWLg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add bindings for the TI NSPIRE simple display panels. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - New patch as bindings are required - Let's use YAML --- .../bindings/display/panel/ti,nspire.yaml | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/ti,nspire.yaml diff --git a/Documentation/devicetree/bindings/display/panel/ti,nspire.yaml b/Documentation/devicetree/bindings/display/panel/ti,nspire.yaml new file mode 100644 index 000000000000..fa81602a922a --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/ti,nspire.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR X11) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/ti,nspire.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments NSPIRE Display Panels + +maintainers: + - Linus Walleij + +properties: + compatible: + oneOf: + - items: + - enum: + - ti,nspire-cx-lcd-panel + - ti,nspire-classic-lcd-panel + +required: + - compatible + +additionalProperties: false + +examples: + - | + panel { + compatible = "ti,nspire-cx-lcd-panel"; + ports { + port { + panel_in: endpoint { + remote-endpoint = <&pads>; + }; + }; + }; + }; From patchwork Mon Aug 5 08:58:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11076311 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C73C1510 for ; Mon, 5 Aug 2019 08:59:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B1BF28868 for ; Mon, 5 Aug 2019 08:59:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2003D28877; Mon, 5 Aug 2019 08:59:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BB07228869 for ; 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Mon, 05 Aug 2019 01:59:08 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id b20sm234500lfc.17.2019.08.05.01.59.07 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 05 Aug 2019 01:59:07 -0700 (PDT) From: Linus Walleij To: Daniel Tang , Fabian Vogt Subject: [PATCH 3/4 v2] drm/panel: simple: Support TI nspire panels Date: Mon, 5 Aug 2019 10:58:46 +0200 Message-Id: <20190805085847.25554-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190805085847.25554-1-linus.walleij@linaro.org> References: <20190805085847.25554-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LNyCV5nRBh8vr0if6GHpu5YY8NlSLnHE1s9JSiyGhqo=; b=j54Rj2XaGuAIh1QjDzcW4Ftb6/YJer99fQuk8COxqyd60VzDeuQ65d6FHyUF5S1IS8 2quTXmox5D/afUITLCaLymjqQ4HeFS6BXZQTsmTQfD8ilpFQMf1hpdO7aAHUK45hj4mW Sji83QTaCNlQhAGJ/cWfg5t+0ArDMd2imzJUlJw7V+XZtnQuEmFsF/waSfpvNhUkJ468 UsXI5DVCBel4zUwtGvG8QIO7esZQYpfyjCDb+xs6fif5FsbKJMuKjuJxtOkHNMDAeDNO x79NvYeJsVQG11B1rwQT1Rv76AIPpwFECXhDWMcjOaPelHapSXLbbAAmaaCxqOslNaoF 12Jg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This adds support for the TI nspire panels to the simple panel roster. This code is based on arch/arm/mach-nspire/clcd.c. This includes likely the first grayscale panel supported. These panels will be used with the PL11x DRM driver. Cc: Daniel Tang Cc: Fabian Vogt Tested-by: Fabian Vogt Signed-off-by: Linus Walleij Reviewed-by: Sam Ravnborg --- ChangeLog v1->v2: - Bump clock frequency to 10 MHz after Fabian's trial-and-error - Changed vsymbol names to ti_nspire_* - Sorted alphabetically - Specify positive edge on the classic display bus --- drivers/gpu/drm/panel/panel-simple.c | 64 ++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 5a93c4edf1e4..96f894b44313 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2578,6 +2578,64 @@ static const struct panel_desc tianma_tm070rvhg71 = { .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, }; +static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { + { + .clock = 10000, + .hdisplay = 320, + .hsync_start = 320 + 50, + .hsync_end = 320 + 50 + 6, + .htotal = 320 + 50 + 6 + 38, + .vdisplay = 240, + .vsync_start = 240 + 3, + .vsync_end = 240 + 3 + 1, + .vtotal = 240 + 3 + 1 + 17, + .vrefresh = 60, + .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, + }, +}; + +static const struct panel_desc ti_nspire_cx_lcd_panel = { + .modes = ti_nspire_cx_lcd_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 65, + .height = 49, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE, +}; + +static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { + { + .clock = 10000, + .hdisplay = 320, + .hsync_start = 320 + 6, + .hsync_end = 320 + 6 + 6, + .htotal = 320 + 6 + 6 + 6, + .vdisplay = 240, + .vsync_start = 240 + 0, + .vsync_end = 240 + 0 + 1, + .vtotal = 240 + 0 + 1 + 0, + .vrefresh = 60, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, + }, +}; + +static const struct panel_desc ti_nspire_classic_lcd_panel = { + .modes = ti_nspire_classic_lcd_mode, + .num_modes = 1, + /* The grayscale panel has 8 bit for the color .. Y (black) */ + .bpc = 8, + .size = { + .width = 71, + .height = 53, + }, + /* This is the grayscale bus format */ + .bus_format = MEDIA_BUS_FMT_Y8_1X8, + .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, +}; + static const struct drm_display_mode toshiba_lt089ac29000_mode = { .clock = 79500, .hdisplay = 1280, @@ -3029,6 +3087,12 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "tianma,tm070rvhg71", .data = &tianma_tm070rvhg71, + }, { + .compatible = "ti,nspire-cx-lcd-panel", + .data = &ti_nspire_cx_lcd_panel, + }, { + .compatible = "ti,nspire-classic-lcd-panel", + .data = &ti_nspire_classic_lcd_panel, }, { .compatible = "toshiba,lt089ac29000", .data = &toshiba_lt089ac29000, From patchwork Mon Aug 5 08:58:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11076313 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F7391510 for ; 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Mon, 05 Aug 2019 01:59:11 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id b20sm234500lfc.17.2019.08.05.01.59.10 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 05 Aug 2019 01:59:11 -0700 (PDT) From: Linus Walleij To: Daniel Tang , Fabian Vogt Subject: [PATCH 4/4 v2] ARM: nspire: Move CLCD set-up to device tree Date: Mon, 5 Aug 2019 10:58:47 +0200 Message-Id: <20190805085847.25554-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190805085847.25554-1-linus.walleij@linaro.org> References: <20190805085847.25554-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jfOLGq6Ai0AatLr585XiepWY5gInSVAO5M5bFbr7QxQ=; b=BwbiULzNxlKsmYtkH38zVgb6lOkydkaYKlfp+fxJBTbtNMmpfRL4K97oBQWmmU5+g/ 7wqnccDxHp/GJxIa9yEMltbbt8d/9EVrYHKPUxb+Vtvz9WDV6yWDnl7Ha+l9xqS5KuWB 4Vj0AYvQYdYys2MAcpdwnc7s9E7uHb7OIa1D3H5NHDT7Z45q9hwWCRehjyHTJeiR+/KK 0uDzFxUj4s+yvq9CPJCecjQI19lCqwBuo3HpU57HrCPmWQUYxF0AU2bJVIntKwicQSZt fN1zF7/lEOY5ocFCc5ctpGYSDke1lnzlYZE1y+Z5926dFvM0ltgEksFirQNrdPEiS7fw NbWQ== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This moves the nspire over to using the device tree to set-up and probe the PL111 DRM driver and use the panels from the simple-panel drivers. Cc: Daniel Tang Cc: Fabian Vogt Tested-by: Fabian Vogt Acked-by: Sam Ravnborg Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Now tested - This will be sent separately to ARM SoC after the rest of the patches land. --- arch/arm/boot/dts/nspire-classic.dtsi | 19 ++++- arch/arm/boot/dts/nspire-cx.dts | 18 +++- arch/arm/boot/dts/nspire.dtsi | 10 ++- arch/arm/mach-nspire/Makefile | 1 - arch/arm/mach-nspire/clcd.c | 114 -------------------------- arch/arm/mach-nspire/clcd.h | 10 --- arch/arm/mach-nspire/nspire.c | 25 ------ 7 files changed, 43 insertions(+), 154 deletions(-) delete mode 100644 arch/arm/mach-nspire/clcd.c delete mode 100644 arch/arm/mach-nspire/clcd.h diff --git a/arch/arm/boot/dts/nspire-classic.dtsi b/arch/arm/boot/dts/nspire-classic.dtsi index c53f42777851..fabd8270f168 100644 --- a/arch/arm/boot/dts/nspire-classic.dtsi +++ b/arch/arm/boot/dts/nspire-classic.dtsi @@ -8,7 +8,13 @@ /include/ "nspire.dtsi" &lcd { - lcd-type = "classic"; + port { + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; + /* Dummy values, since we are grayscale */ + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + }; + }; }; &fast_timer { @@ -69,6 +75,17 @@ #interrupt-cells = <1>; }; }; + + panel { + compatible = "ti,nspire-classic-lcd-panel"; + ports { + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + }; chosen { bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0"; }; diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index da95c3736651..1551d0d0189f 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -9,7 +9,12 @@ /include/ "nspire.dtsi" &lcd { - lcd-type = "cx"; + port { + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + }; + }; }; &fast_timer { @@ -106,6 +111,17 @@ }; }; }; + + panel { + compatible = "ti,nspire-cx-lcd-panel"; + ports { + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + }; chosen { bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0"; }; diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index c35fd6667716..d9a0fd7524dc 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -95,8 +95,14 @@ reg = <0xC0000000 0x1000>; interrupts = <21>; - clocks = <&apb_pclk>; - clock-names = "apb_pclk"; + /* + * We assume the same clock is fed to APB and CLCDCLK. + * There is some code to scale the clock down by a factor + * 48 for the display so likely the frequency to the + * display is 1MHz and the CLCDCLK is 48 MHz. + */ + clocks = <&apb_pclk>, <&apb_pclk>; + clock-names = "clcdclk", "apb_pclk"; }; adc: adc@C4000000 { diff --git a/arch/arm/mach-nspire/Makefile b/arch/arm/mach-nspire/Makefile index 1d568c600452..4716b9b9aa7b 100644 --- a/arch/arm/mach-nspire/Makefile +++ b/arch/arm/mach-nspire/Makefile @@ -1,3 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += nspire.o -obj-y += clcd.o diff --git a/arch/arm/mach-nspire/clcd.c b/arch/arm/mach-nspire/clcd.c deleted file mode 100644 index 44738dcb391d..000000000000 --- a/arch/arm/mach-nspire/clcd.c +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-nspire/clcd.c - * - * Copyright (C) 2013 Daniel Tang - */ - -#include -#include -#include -#include -#include - -static struct clcd_panel nspire_cx_lcd_panel = { - .mode = { - .name = "Color LCD", - .refresh = 60, - .xres = 320, - .yres = 240, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - .pixclock = 1, - .hsync_len = 6, - .vsync_len = 1, - .right_margin = 50, - .left_margin = 38, - .lower_margin = 3, - .upper_margin = 17, - }, - .width = 65, /* ~6.50 cm */ - .height = 49, /* ~4.87 cm */ - .tim2 = TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, - .caps = CLCD_CAP_565, -}; - -static struct clcd_panel nspire_classic_lcd_panel = { - .mode = { - .name = "Grayscale LCD", - .refresh = 60, - .xres = 320, - .yres = 240, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - .pixclock = 1, - .hsync_len = 6, - .vsync_len = 1, - .right_margin = 6, - .left_margin = 6, - }, - .width = 71, /* 7.11cm */ - .height = 53, /* 5.33cm */ - .tim2 = 0x80007d0, - .cntl = CNTL_LCDMONO8, - .bpp = 8, - .grayscale = 1, - .caps = CLCD_CAP_5551, -}; - -int nspire_clcd_setup(struct clcd_fb *fb) -{ - struct clcd_panel *panel; - size_t panel_size; - const char *type; - dma_addr_t dma; - int err; - - BUG_ON(!fb->dev->dev.of_node); - - err = of_property_read_string(fb->dev->dev.of_node, "lcd-type", &type); - if (err) { - pr_err("CLCD: Could not find lcd-type property\n"); - return err; - } - - if (!strcmp(type, "cx")) { - panel = &nspire_cx_lcd_panel; - } else if (!strcmp(type, "classic")) { - panel = &nspire_classic_lcd_panel; - } else { - pr_err("CLCD: Unknown lcd-type %s\n", type); - return -EINVAL; - } - - panel_size = ((panel->mode.xres * panel->mode.yres) * panel->bpp) / 8; - panel_size = ALIGN(panel_size, PAGE_SIZE); - - fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, panel_size, &dma, - GFP_KERNEL); - - if (!fb->fb.screen_base) { - pr_err("CLCD: unable to map framebuffer\n"); - return -ENOMEM; - } - - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = panel_size; - fb->panel = panel; - - return 0; -} - -int nspire_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base, - fb->fb.fix.smem_start, fb->fb.fix.smem_len); -} - -void nspire_clcd_remove(struct clcd_fb *fb) -{ - dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base, - fb->fb.fix.smem_start); -} diff --git a/arch/arm/mach-nspire/clcd.h b/arch/arm/mach-nspire/clcd.h deleted file mode 100644 index 7f36bd8511c5..000000000000 --- a/arch/arm/mach-nspire/clcd.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/arch/arm/mach-nspire/clcd.h - * - * Copyright (C) 2013 Daniel Tang - */ - -int nspire_clcd_setup(struct clcd_fb *fb); -int nspire_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma); -void nspire_clcd_remove(struct clcd_fb *fb); diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 957bd0c0fbd5..2d4abb0288b9 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -12,14 +12,12 @@ #include #include #include -#include #include #include #include #include "mmio.h" -#include "clcd.h" static const char *const nspire_dt_match[] __initconst = { "ti,nspire", @@ -29,28 +27,6 @@ static const char *const nspire_dt_match[] __initconst = { NULL, }; -static struct clcd_board nspire_clcd_data = { - .name = "LCD", - .caps = CLCD_CAP_5551 | CLCD_CAP_565, - .check = clcdfb_check, - .decode = clcdfb_decode, - .setup = nspire_clcd_setup, - .mmap = nspire_clcd_mmap, - .remove = nspire_clcd_remove, -}; - - -static struct of_dev_auxdata nspire_auxdata[] __initdata = { - OF_DEV_AUXDATA("arm,pl111", NSPIRE_LCD_PHYS_BASE, - NULL, &nspire_clcd_data), - { } -}; - -static void __init nspire_init(void) -{ - of_platform_default_populate(NULL, nspire_auxdata, NULL); -} - static void nspire_restart(enum reboot_mode mode, const char *cmd) { void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); @@ -62,6 +38,5 @@ static void nspire_restart(enum reboot_mode mode, const char *cmd) DT_MACHINE_START(NSPIRE, "TI-NSPIRE") .dt_compat = nspire_dt_match, - .init_machine = nspire_init, .restart = nspire_restart, MACHINE_END