From patchwork Wed Aug 7 07:48:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081391 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 309CC1850 for ; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 231CC287E9 for ; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 174B2287C1; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B99BA2882A for ; Wed, 7 Aug 2019 07:49:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387448AbfHGHth (ORCPT ); Wed, 7 Aug 2019 03:49:37 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38100 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387402AbfHGHtg (ORCPT ); Wed, 7 Aug 2019 03:49:36 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777nSkR074500; Wed, 7 Aug 2019 02:49:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164168; bh=kyJ0HDy8dfbcQlKWYMYatDdJjAIfLXJRDxbG1b0ZvuM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xyyMBOwnt7EBIiHpPYN08sn+cuLRtHJxXKN8RRia7eLYC1HvCNwyVNOR/7I+kWH9B eocDaWZeA58ioxB9bCoCuU07fE9gAZWxjMNWyXwQQhNoV6TakD0pB8DXQuCgUhgGT7 FOJzKuUaF3KNa05atvTFTMQSZcymvEu6++1VsdxM= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777nSxO051409 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:28 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:26 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:26 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHd118711; Wed, 7 Aug 2019 02:49:25 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 1/8] dt-bindings: omap: add new binding for PRM instances Date: Wed, 7 Aug 2019 10:48:52 +0300 Message-ID: <1565164139-21886-2-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add new binding for OMAP PRM (Power and Reset Manager) instances. Each of these will act as a power domain controller and potentially as a reset provider. Signed-off-by: Tero Kristo --- .../devicetree/bindings/arm/omap/prm-inst.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/omap/prm-inst.txt diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt new file mode 100644 index 0000000..e0ae87b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -0,0 +1,24 @@ +OMAP PRM instance bindings + +Power and Reset Manager is an IP block on OMAP family of devices which +handle the power domains and their current state, and provide reset +handling for the domains and/or separate IP blocks under the power domain +hierarchy. + +Required properties: +- compatible: Must be one of: + "ti,am3-prm-inst" + "ti,am4-prm-inst" + "ti,omap4-prm-inst" + "ti,omap5-prm-inst" + "ti,dra7-prm-inst" +- reg: Contains PRM instance register address range + (base address and length) + +Example: + +prm_dsp2: prm@1b00 { + compatible = "ti,dra7-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; +}; From patchwork Wed Aug 7 07:48:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081393 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 57AA31399 for ; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B2E2287A8 for ; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F52D287C1; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A8A1287EA for ; Wed, 7 Aug 2019 07:49:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387414AbfHGHth (ORCPT ); Wed, 7 Aug 2019 03:49:37 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57896 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387396AbfHGHth (ORCPT ); Wed, 7 Aug 2019 03:49:37 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777nTvs026490; Wed, 7 Aug 2019 02:49:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164169; bh=LLlI9QgqZvxHRCe0+bEdCU1oHYk2BhHjSLG9+Km2gc0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XXpIr4TPTjrFWaPc7P9GiHwxFpchkO/Jffdzp2+l1gRl9Ko+W8zI0Xzg5fWiFUKW6 /gASTq81yndGNXqc5jR6+9yUa/fctDb+Ra5X5SW2EHksOwgpgGvwlRwGoV77pcvDJe 38oGDN5m7tROdddlnu2sEvbhToOg2oyvBKxAzrCw= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777nTfa050698 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:29 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:28 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:28 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHe118711; Wed, 7 Aug 2019 02:49:27 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 2/8] soc: ti: add initial PRM driver with reset control support Date: Wed, 7 Aug 2019 10:48:53 +0300 Message-ID: <1565164139-21886-3-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial PRM (Power and Reset Management) driver for TI OMAP class SoCs. Initially this driver only supports reset control, but can be extended to support rest of the functionality, like powerdomain control, PRCM irq support etc. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/Kconfig | 1 + drivers/soc/ti/Makefile | 1 + drivers/soc/ti/omap_prm.c | 216 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 218 insertions(+) create mode 100644 drivers/soc/ti/omap_prm.c diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index fdb6743..42ad063 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -109,6 +109,7 @@ config ARCH_OMAP2PLUS select TI_SYSC select OMAP_IRQCHIP select CLKSRC_TI_32K + select RESET_CONTROLLER help Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 diff --git a/drivers/soc/ti/Makefile b/drivers/soc/ti/Makefile index b3868d3..788b5cd 100644 --- a/drivers/soc/ti/Makefile +++ b/drivers/soc/ti/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_KEYSTONE_NAVIGATOR_QMSS) += knav_qmss.o knav_qmss-y := knav_qmss_queue.o knav_qmss_acc.o obj-$(CONFIG_KEYSTONE_NAVIGATOR_DMA) += knav_dma.o obj-$(CONFIG_AMX3_PM) += pm33xx.o +obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_prm.o obj-$(CONFIG_WKUP_M3_IPC) += wkup_m3_ipc.o obj-$(CONFIG_TI_SCI_PM_DOMAINS) += ti_sci_pm_domains.o obj-$(CONFIG_TI_SCI_INTA_MSI_DOMAIN) += ti_sci_inta_msi.o diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c new file mode 100644 index 0000000..7c89eb8 --- /dev/null +++ b/drivers/soc/ti/omap_prm.c @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * OMAP2+ PRM driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct omap_rst_map { + s8 rst; + s8 st; +}; + +struct omap_prm_data { + u32 base; + const char *name; + u16 pwstctrl; + u16 pwstst; + u16 rstctl; + u16 rstst; + struct omap_rst_map *rstmap; + u8 flags; +}; + +struct omap_prm { + const struct omap_prm_data *data; + void __iomem *base; +}; + +struct omap_reset_data { + struct reset_controller_dev rcdev; + struct omap_prm *prm; +}; + +#define to_omap_reset_data(p) container_of((p), struct omap_reset_data, rcdev) + +#define OMAP_MAX_RESETS 8 +#define OMAP_RESET_MAX_WAIT 10000 + +#define OMAP_PRM_NO_RSTST BIT(0) + +static const struct of_device_id omap_prm_id_table[] = { + { }, +}; + +static int omap_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct omap_reset_data *reset = to_omap_reset_data(rcdev); + u32 v; + + v = readl_relaxed(reset->prm->base + reset->prm->data->rstst); + v &= 1 << id; + v >>= id; + + return v; +} + +static int omap_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct omap_reset_data *reset = to_omap_reset_data(rcdev); + u32 v; + + /* assert the reset control line */ + v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); + v |= 1 << id; + writel_relaxed(v, reset->prm->base + reset->prm->data->rstctl); + + return 0; +} + +static int omap_reset_get_st_bit(struct omap_reset_data *reset, + unsigned long id) +{ + struct omap_rst_map *map = reset->prm->data->rstmap; + + while (map && map->rst >= 0) { + if (map->rst == id) + return map->st; + + map++; + } + + return id; +} + +/* + * Note that status will not change until clocks are on, and clocks cannot be + * enabled until reset is deasserted. Consumer drivers must check status + * separately after enabling clocks. + */ +static int omap_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct omap_reset_data *reset = to_omap_reset_data(rcdev); + u32 v; + int st_bit = id; + bool has_rstst; + + /* check the current status to avoid de-asserting the line twice */ + v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); + if (!(v & BIT(id))) + return -EEXIST; + + has_rstst = !(reset->prm->data->flags & OMAP_PRM_NO_RSTST); + + if (has_rstst) { + st_bit = omap_reset_get_st_bit(reset, id); + + /* Clear the reset status by writing 1 to the status bit */ + v = readl_relaxed(reset->prm->base + reset->prm->data->rstst); + v |= 1 << st_bit; + writel_relaxed(v, reset->prm->base + reset->prm->data->rstst); + } + + /* de-assert the reset control line */ + v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); + v &= ~(1 << id); + writel_relaxed(v, reset->prm->base + reset->prm->data->rstctl); + + return 0; +} + +static const struct reset_control_ops omap_reset_ops = { + .assert = omap_reset_assert, + .deassert = omap_reset_deassert, + .status = omap_reset_status, +}; + +static int omap_prm_reset_probe(struct platform_device *pdev, + struct omap_prm *prm) +{ + struct omap_reset_data *reset; + + /* + * Check if we have resets. If either rstctl or rstst is + * non-zero, we have reset registers in place. Additionally + * the flag OMAP_PRM_NO_RSTST implies that we have resets. + */ + if (!prm->data->rstctl && !prm->data->rstst && + !(prm->data->flags & OMAP_PRM_NO_RSTST)) + return 0; + + reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); + if (!reset) + return -ENOMEM; + + reset->rcdev.owner = THIS_MODULE; + reset->rcdev.ops = &omap_reset_ops; + reset->rcdev.of_node = pdev->dev.of_node; + reset->rcdev.nr_resets = OMAP_MAX_RESETS; + + reset->prm = prm; + + return devm_reset_controller_register(&pdev->dev, &reset->rcdev); +} + +static int omap_prm_probe(struct platform_device *pdev) +{ + struct resource *res; + const struct omap_prm_data *data; + struct omap_prm *prm; + const struct of_device_id *match; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + match = of_match_device(omap_prm_id_table, &pdev->dev); + if (!match) + return -ENOTSUPP; + + prm = devm_kzalloc(&pdev->dev, sizeof(*prm), GFP_KERNEL); + if (!prm) + return -ENOMEM; + + data = match->data; + + while (data->base != res->start) { + if (!data->base) + return -EINVAL; + data++; + } + + prm->data = data; + + prm->base = devm_ioremap_resource(&pdev->dev, res); + if (!prm->base) + return -ENOMEM; + + return omap_prm_reset_probe(pdev, prm); +} + +static struct platform_driver omap_prm_driver = { + .probe = omap_prm_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = omap_prm_id_table, + }, +}; +builtin_platform_driver(omap_prm_driver); + +MODULE_ALIAS("platform:prm"); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("omap2+ prm driver"); From patchwork Wed Aug 7 07:48:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081387 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C74CF112C for ; Wed, 7 Aug 2019 07:49:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF279287A8 for ; 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Wed, 7 Aug 2019 02:49:30 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHf118711; Wed, 7 Aug 2019 02:49:28 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 3/8] soc: ti: omap-prm: poll for reset complete during de-assert Date: Wed, 7 Aug 2019 10:48:54 +0300 Message-ID: <1565164139-21886-4-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Poll for reset completion status during de-assertion of reset, otherwise the IP in question might be accessed before it has left reset properly. Signed-off-by: Tero Kristo --- drivers/soc/ti/omap_prm.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index 7c89eb8..d412af3 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -107,6 +107,7 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, u32 v; int st_bit = id; bool has_rstst; + int timeout = 0; /* check the current status to avoid de-asserting the line twice */ v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); @@ -129,6 +130,22 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, v &= ~(1 << id); writel_relaxed(v, reset->prm->base + reset->prm->data->rstctl); + if (!has_rstst) + return 0; + + /* wait for the status to be set */ + while (1) { + v = readl_relaxed(reset->prm->base + reset->prm->data->rstst); + v &= 1 << st_bit; + if (v) + break; + timeout++; + if (timeout > OMAP_RESET_MAX_WAIT) + return -EBUSY; + + udelay(1); + } + return 0; } From patchwork Wed Aug 7 07:48:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081395 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1C521912 for ; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F6D9287A8 for ; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 03BC7287C1; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 55758287EA for ; Wed, 7 Aug 2019 07:49:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387470AbfHGHtj (ORCPT ); Wed, 7 Aug 2019 03:49:39 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57906 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387396AbfHGHti (ORCPT ); Wed, 7 Aug 2019 03:49:38 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777nXCj026501; Wed, 7 Aug 2019 02:49:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164173; bh=Id0OZuVk5iHoy+yQJFMr554lZMg4ESm/9/csvhrTcHE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=M+1ZjgA6Tm5IrZ6NwSajOw/ea/cBFwdwmHP8JvQt19JhBWnLaD0WV+BCGH3GYA9XE wVJliD5IrQD8RLQDizWQkIaeylyRFXTWRFAepQUbkP/D/ycuJWf6Q0jRlxdxC5JIv8 S8xQsZdoJ734hcVbgxOStPW1SLVtbLWBK/UIOakU= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777nXbK051462 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:33 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:31 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:31 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHg118711; Wed, 7 Aug 2019 02:49:30 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 4/8] soc: ti: omap-prm: add support for denying idle for reset clockdomain Date: Wed, 7 Aug 2019 10:48:55 +0300 Message-ID: <1565164139-21886-5-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP TI SoCs hardware reset signals require the parent clockdomain to be in force wakeup mode while de-asserting the reset, otherwise it may never complete. To support this, add pdata hooks to control the clockdomain directly. Signed-off-by: Tero Kristo --- drivers/soc/ti/omap_prm.c | 32 ++++++++++++++++++++++++++++---- include/linux/platform_data/ti-prm.h | 21 +++++++++++++++++++++ 2 files changed, 49 insertions(+), 4 deletions(-) create mode 100644 include/linux/platform_data/ti-prm.h diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index d412af3..870515e3 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -16,6 +16,8 @@ #include #include +#include + struct omap_rst_map { s8 rst; s8 st; @@ -24,6 +26,7 @@ struct omap_rst_map { struct omap_prm_data { u32 base; const char *name; + const char *clkdm_name; u16 pwstctrl; u16 pwstst; u16 rstctl; @@ -40,6 +43,8 @@ struct omap_prm { struct omap_reset_data { struct reset_controller_dev rcdev; struct omap_prm *prm; + struct clockdomain *clkdm; + struct device *dev; }; #define to_omap_reset_data(p) container_of((p), struct omap_reset_data, rcdev) @@ -108,6 +113,8 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, int st_bit = id; bool has_rstst; int timeout = 0; + struct ti_prm_platform_data *pdata = dev_get_platdata(reset->dev); + int ret = 0; /* check the current status to avoid de-asserting the line twice */ v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); @@ -125,13 +132,16 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, writel_relaxed(v, reset->prm->base + reset->prm->data->rstst); } + if (pdata->clkdm_deny_idle && reset->clkdm) + pdata->clkdm_deny_idle(reset->clkdm); + /* de-assert the reset control line */ v = readl_relaxed(reset->prm->base + reset->prm->data->rstctl); v &= ~(1 << id); writel_relaxed(v, reset->prm->base + reset->prm->data->rstctl); if (!has_rstst) - return 0; + goto exit; /* wait for the status to be set */ while (1) { @@ -140,13 +150,19 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, if (v) break; timeout++; - if (timeout > OMAP_RESET_MAX_WAIT) - return -EBUSY; + if (timeout > OMAP_RESET_MAX_WAIT) { + ret = -EBUSY; + goto exit; + } udelay(1); } - return 0; +exit: + if (pdata->clkdm_allow_idle && reset->clkdm) + pdata->clkdm_allow_idle(reset->clkdm); + + return ret; } static const struct reset_control_ops omap_reset_ops = { @@ -159,6 +175,8 @@ static int omap_prm_reset_probe(struct platform_device *pdev, struct omap_prm *prm) { struct omap_reset_data *reset; + struct ti_prm_platform_data *pdata = dev_get_platdata(&pdev->dev); + char buf[32]; /* * Check if we have resets. If either rstctl or rstst is @@ -177,9 +195,15 @@ static int omap_prm_reset_probe(struct platform_device *pdev, reset->rcdev.ops = &omap_reset_ops; reset->rcdev.of_node = pdev->dev.of_node; reset->rcdev.nr_resets = OMAP_MAX_RESETS; + reset->dev = &pdev->dev; reset->prm = prm; + sprintf(buf, "%s_clkdm", prm->data->clkdm_name ? prm->data->clkdm_name : + prm->data->name); + + reset->clkdm = pdata->clkdm_lookup(buf); + return devm_reset_controller_register(&pdev->dev, &reset->rcdev); } diff --git a/include/linux/platform_data/ti-prm.h b/include/linux/platform_data/ti-prm.h new file mode 100644 index 0000000..28154c3 --- /dev/null +++ b/include/linux/platform_data/ti-prm.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * TI PRM (Power & Reset Manager) platform data + * + * Copyright (C) 2019 Texas Instruments, Inc. + * + * Tero Kristo + */ + +#ifndef _LINUX_PLATFORM_DATA_TI_PRM_H +#define _LINUX_PLATFORM_DATA_TI_PRM_H + +struct clockdomain; + +struct ti_prm_platform_data { + void (*clkdm_deny_idle)(struct clockdomain *clkdm); + void (*clkdm_allow_idle)(struct clockdomain *clkdm); + struct clockdomain * (*clkdm_lookup)(const char *name); +}; + +#endif /* _LINUX_PLATFORM_DATA_TI_PRM_H */ From patchwork Wed Aug 7 07:48:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081397 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B2605112C for ; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A68BA287A8 for ; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9B1C8287EA; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 457D3287A8 for ; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387471AbfHGHtj (ORCPT ); Wed, 7 Aug 2019 03:49:39 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57910 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387402AbfHGHtj (ORCPT ); Wed, 7 Aug 2019 03:49:39 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777nYsn026506; Wed, 7 Aug 2019 02:49:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164174; bh=CqHLqeTvLwqY9yjJT7RoxOx9D6Uv+3KwF7okndJxyzM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nlM39HucyCjI3kq5RvBT+Tcjdgeso1P1eyTCjh7sZuYgj5wloqH63Qv2M+vxGImD7 qDmP3UHsiqkdSnzTeOuSyR6FbI2UKfXevk6nr3YJf7HEnxF+lp+rBUDRQBtjkDNu0R XdAUZjmHq+bVSBFK8dPXcWsjwq5G7yoTWVEs8EWc= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777nYMs078588 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:34 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:33 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:33 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHh118711; Wed, 7 Aug 2019 02:49:32 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 5/8] soc: ti: omap-prm: add omap4 PRM data Date: Wed, 7 Aug 2019 10:48:56 +0300 Message-ID: <1565164139-21886-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PRM data for omap4 family of SoCs. Signed-off-by: Tero Kristo --- drivers/soc/ti/omap_prm.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index 870515e3..9b8d5945 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -54,7 +54,27 @@ struct omap_reset_data { #define OMAP_PRM_NO_RSTST BIT(0) +struct omap_prm_data omap4_prm_data[] = { + { .name = "mpu", .base = 0x4a306300, .pwstst = 0x4 }, + { .name = "tesla", .base = 0x4a306400, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14 }, + { .name = "abe", .base = 0x4a306500, .pwstst = 0x4 }, + { .name = "always_on_core", .base = 0x4a306600, .pwstst = 0x4 }, + { .name = "core", .base = 0x4a306700, .pwstst = 0x4, .rstctl = 0x210, .rstst = 0x214 }, + { .name = "ivahd", .base = 0x4a306f00, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14 }, + { .name = "cam", .base = 0x4a307000, .pwstst = 0x4 }, + { .name = "dss", .base = 0x4a307100, .pwstst = 0x4 }, + { .name = "gfx", .base = 0x4a307200, .pwstst = 0x4 }, + { .name = "l3init", .base = 0x4a307300, .pwstst = 0x4 }, + { .name = "l4per", .base = 0x4a307400, .pwstst = 0x4 }, + { .name = "cefuse", .base = 0x4a307600, .pwstst = 0x4 }, + { .name = "wkup", .base = 0x4a307700, .pwstst = 0x4 }, + { .name = "emu", .base = 0x4a307900, .pwstst = 0x4 }, + { .name = "device", .base = 0x4a307b00, .rstctl = 0x0, .rstst = 0x4 }, + { }, +}; + static const struct of_device_id omap_prm_id_table[] = { + { .compatible = "ti,omap4-prm-inst", .data = omap4_prm_data }, { }, }; From patchwork Wed Aug 7 07:48:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081399 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CD5D912 for ; Wed, 7 Aug 2019 07:49:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00423287A8 for ; Wed, 7 Aug 2019 07:49:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E8FE0287E9; Wed, 7 Aug 2019 07:49:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96759287C1 for ; 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Wed, 7 Aug 2019 02:49:35 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:35 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:35 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHi118711; Wed, 7 Aug 2019 02:49:33 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 6/8] soc: ti: omap_prm: add data for am33xx Date: Wed, 7 Aug 2019 10:48:57 +0300 Message-ID: <1565164139-21886-7-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PRM instance data for AM33xx SoC. Includes some basic register definitions and reset data for now. Signed-off-by: Tero Kristo --- drivers/soc/ti/omap_prm.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index 9b8d5945..fadfc7f 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -73,8 +73,25 @@ struct omap_prm_data omap4_prm_data[] = { { }, }; +struct omap_rst_map am3_wkup_rst_map[] = { + { .rst = 3, .st = 5 }, + { .rst = -1 }, +}; + +struct omap_prm_data am3_prm_data[] = { + { .name = "per", .base = 0x44e00c00, .pwstctrl = 0xc, .pwstst = 0x8, .flags = OMAP_PRM_NO_RSTST }, + { .name = "wkup", .base = 0x44e00d00, .pwstctrl = 0x4, .pwstst = 0x8, .rstst = 0xc, .rstmap = am3_wkup_rst_map }, + { .name = "mpu", .base = 0x44e00e00, .pwstst = 0x4 }, + { .name = "device", .base = 0x44e00f00, .rstctl = 0x0, .rstst = 0x8 }, + { .name = "rtc", .base = 0x44e01000, .pwstst = 0x4 }, + { .name = "gfx", .base = 0x44e01100, .pwstst = 0x10, .rstctl = 0x4, .rstst = 0x14 }, + { .name = "cefuse", .base = 0x44e01200, .pwstst = 0x4 }, + { }, +}; + static const struct of_device_id omap_prm_id_table[] = { { .compatible = "ti,omap4-prm-inst", .data = omap4_prm_data }, + { .compatible = "ti,am3-prm-inst", .data = am3_prm_data }, { }, }; From patchwork Wed Aug 7 07:48:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081401 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 37ED0912 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2A070287C1 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1E9B1287E9; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B4828287A8 for ; Wed, 7 Aug 2019 07:49:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387481AbfHGHtm (ORCPT ); Wed, 7 Aug 2019 03:49:42 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:35596 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387450AbfHGHtm (ORCPT ); Wed, 7 Aug 2019 03:49:42 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x777naQK124160; Wed, 7 Aug 2019 02:49:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565164177; bh=bwa7pELuDkqr+8qGFfDbMpJD8DewjyhXL2s0BYZTCho=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rk3SKYhGPGSu3EPcvmaMA4kAI4/KMAaGe80c8TF0K3jFZTU0XZ1xbMQ0tREx/AfUQ rG4nhEdL40YYg6PP+xqsCyxU5fge6liv91Uczo71CpdOOfg+5LuvXHB6fVMZ9DY/3o xSNbBOtvmg0wDGG6wWH5Q1P2QH98edijXDboeReM= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777naLk076681 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:36 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:36 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:36 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHj118711; Wed, 7 Aug 2019 02:49:35 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 7/8] soc: ti: omap-prm: add dra7 PRM data Date: Wed, 7 Aug 2019 10:48:58 +0300 Message-ID: <1565164139-21886-8-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PRM data for dra7 family of SoCs. Signed-off-by: Tero Kristo --- drivers/soc/ti/omap_prm.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c index fadfc7f..05b7749 100644 --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -73,6 +73,31 @@ struct omap_prm_data omap4_prm_data[] = { { }, }; +static struct omap_prm_data dra7_prm_data[] = { + { .name = "mpu", .base = 0x4ae06300, .pwstst = 0x4 }, + { .name = "dsp1", .base = 0x4ae06400, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14 }, + { .name = "ipu", .base = 0x4ae06500, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14, .clkdm_name = "ipu1" }, + { .name = "coreaon", .base = 0x4ae06628, .pwstst = 0x4 }, + { .name = "core", .base = 0x4ae06700, .pwstst = 0x4, .rstctl = 0x210, .rstst = 0x214, .clkdm_name = "ipu2" }, + { .name = "iva", .base = 0x4ae06f00, .pwstst = 0x4 }, + { .name = "cam", .base = 0x4ae07000, .pwstst = 0x4 }, + { .name = "dss", .base = 0x4ae07100, .pwstst = 0x4 }, + { .name = "gpu", .base = 0x4ae07200, .pwstst = 0x4 }, + { .name = "l3init", .base = 0x4ae07300, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14 }, + { .name = "l4per", .base = 0x4ae07400, .pwstst = 0x4 }, + { .name = "custefuse", .base = 0x4ae07600, .pwstst = 0x4 }, + { .name = "wkupaon", .base = 0x4ae07724, .pwstst = 0x4 }, + { .name = "emu", .base = 0x4ae07900, .pwstst = 0x4 }, + { .name = "dsp2", .base = 0x4ae07b00, .pwstst = 0x4, .rstctl = 0x10, .rstst = 0x14 }, + { .name = "eve1", .base = 0x4ae07b40, .pwstst = 0x4 }, + { .name = "eve2", .base = 0x4ae07b80, .pwstst = 0x4 }, + { .name = "eve3", .base = 0x4ae07bc0, .pwstst = 0x4 }, + { .name = "eve4", .base = 0x4ae07c00, .pwstst = 0x4 }, + { .name = "rtc", .base = 0x4ae07c60, .pwstst = 0x4 }, + { .name = "vpe", .base = 0x4ae07c80, .pwstst = 0x4 }, + { }, +}; + struct omap_rst_map am3_wkup_rst_map[] = { { .rst = 3, .st = 5 }, { .rst = -1 }, @@ -91,6 +116,7 @@ struct omap_prm_data am3_prm_data[] = { static const struct of_device_id omap_prm_id_table[] = { { .compatible = "ti,omap4-prm-inst", .data = omap4_prm_data }, + { .compatible = "ti,dra7-prm-inst", .data = dra7_prm_data }, { .compatible = "ti,am3-prm-inst", .data = am3_prm_data }, { }, }; From patchwork Wed Aug 7 07:48:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11081403 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 996F21399 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C2CB287A8 for ; Wed, 7 Aug 2019 07:49:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8081A287E9; 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d=ti.com; s=ti-com-17Q1; t=1565164178; bh=j1DK25VG8GHT3iyJbCCQsEPONPyb/wUHsKRxTsAZCgs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bglMYFDufOIGFwVVvXH8fi6eM6KQtdODnEpzPApBX4QnECOVJwZ0Ivc09+SOhrWor uFE65I9H85uUHQ9fwZrMQh67CAjzOp0vzY9sRVXUkqLhJWeMRXNq1zdHXaB5rUcXph WooucnN3g4qbfBAsE4E+z2GDqz7K4VwWNOBqLRos= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x777ncqN078773 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 02:49:38 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 02:49:38 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 02:49:38 -0500 Received: from gomoku.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x777nNHk118711; Wed, 7 Aug 2019 02:49:36 -0500 From: Tero Kristo To: , , , CC: , , Subject: [PATCH 8/8] ARM: OMAP2+: pdata-quirks: add PRM data for reset support Date: Wed, 7 Aug 2019 10:48:59 +0300 Message-ID: <1565164139-21886-9-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565164139-21886-1-git-send-email-t-kristo@ti.com> References: <1565164139-21886-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The parent clockdomain for reset must be in force wakeup mode, otherwise the reset may never complete. Add pdata quirks for this purpose for PRM driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/pdata-quirks.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 6c6f8fc..87e2457 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "clockdomain.h" #include "common.h" @@ -565,6 +566,12 @@ void omap_pcs_legacy_init(int irq, void (*rearm)(void)) pcs_pdata.rearm = rearm; } +static struct ti_prm_platform_data ti_prm_pdata = { + .clkdm_deny_idle = clkdm_deny_idle, + .clkdm_allow_idle = clkdm_allow_idle, + .clkdm_lookup = clkdm_lookup, +}; + /* * GPIOs for TWL are initialized by the I2C bus and need custom * handing until DSS has device tree bindings. @@ -664,6 +671,9 @@ static void __init omap3_mcbsp_init(void) {} /* Common auxdata */ OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata), OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,dra7-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,am3-prm-inst", 0, NULL, &ti_prm_pdata), { /* sentinel */ }, };