From patchwork Thu Aug 8 21:22:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084761 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03D491398 for ; Thu, 8 Aug 2019 21:23:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6D3F28A44 for ; Thu, 8 Aug 2019 21:23:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DAE5A28B2A; Thu, 8 Aug 2019 21:23:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9190A28A44 for ; Thu, 8 Aug 2019 21:23:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390215AbfHHVXg (ORCPT ); Thu, 8 Aug 2019 17:23:36 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:36315 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733295AbfHHVXg (ORCPT ); Thu, 8 Aug 2019 17:23:36 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MnFps-1icdKs0qea-00jKxt; Thu, 08 Aug 2019 23:23:10 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Bartlomiej Zolnierkiewicz Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-fbdev@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH 01/22] ARM: omap1: innovator: pass lcd control address as pdata Date: Thu, 8 Aug 2019 23:22:10 +0200 Message-Id: <20190808212234.2213262-2-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:gYQzCnwbWs8mL7daViFjHUrU0375LB2jW2jmopnOztbOKCOlUH9 wzr6xMzlYNNwM9kds2mG3qevqDGBNAJ3ckfUEAJNYKK2tsSbQCiKiSG2zIoL5FigrrtryXb Y4gOJjw9g/rplk35Su3pjCxkNftH4wqexHHFCHXeHNLLb4peZcfvWmcPJIjtkK+3FpiI1uO R3+EaCP0c583jcXIH3TLw== X-UI-Out-Filterresults: notjunk:1;V03:K0:+scwJx1aJ24=:fzzjaWEd6UPfzIwJQkEsjs 3PTOJzPRcySccl4YgEgKXsQSYLtgS3T1hlqg3ZG2nwTEaklnDQd1wsErnSVNJ2YjuNtkgEUNh iLJMSmvFG/ccgp/BsS5ghJUtr6n8vBlVcGNIvumQMiY/5sE2/504mNQ2uAI03GlBW3LmYwjcL cYCUmNpBsQfxoatS96SDmS+0c56C8BdC5Cs2QkPQ5Zo3VG7V98t2Th5OYJ8U7dD3mEs8wKAau +3mXwnpIAvpMCQ4+862wyYMuYn+63CjZgS/J+sdQEqioMPPONV3Cl5u0Kf07S/WtLpvrrkHpz Fie4Uaa4YHh+u1hpgJyZUkMl8yDDXLwLPhGWtWFfTGVHALI0RwN12IWuUjFYbXDGLn6hSHYyF n11jgojUqdWQF59bUBi7NqCEuGwKXCvylQbWaW1eLg79pLVjw9SZmBgAjoxkEcAuRf/PMfTVb 93uOK5qGjcH/0VJDhP4u5EQNPEkLjhXYrs7f0fGWQIxH2awjzUHHhBaO8E8TZcuCmY7XR/sZw fouqZmyBUeyGE9kyGsRTjLpIisj1GhWIqDXQFQHnaI5xn9abxsiGjPdGL4t507DJ/g2puzCYz mO5yy+hPpJ/V44WQbdwNgmuU61K3Ol0StT+Go+tfZLZu5CGGp1cY8F/dZPnyy3fDcfguqzXsq 3VUbPE24+i8zOqaZL1+UCpVISxqc7h6WID356sPIluGWaulaS4+f6xXxbT5cy3ejlJejzCobv pXs4GXE031dxuO+xu0W3giaP84+bJ+pQrG0nMQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To avoid using the mach/omap1510.h header file, pass the correct address as platform data. Signed-off-by: Arnd Bergmann Acked-by: Bartlomiej Zolnierkiewicz --- arch/arm/mach-omap1/board-innovator.c | 3 +++ drivers/video/fbdev/omap/lcd_inn1510.c | 7 +++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index cbe093f969d5..2425f1bacb33 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -194,6 +194,9 @@ static struct platform_device innovator1510_smc91x_device = { static struct platform_device innovator1510_lcd_device = { .name = "lcd_inn1510", .id = -1, + .dev = { + .platform_data = (void __force *)OMAP1510_FPGA_LCD_PANEL_CONTROL, + } }; static struct platform_device innovator1510_spi_device = { diff --git a/drivers/video/fbdev/omap/lcd_inn1510.c b/drivers/video/fbdev/omap/lcd_inn1510.c index 776e7f8d656e..37ed0c14aa5a 100644 --- a/drivers/video/fbdev/omap/lcd_inn1510.c +++ b/drivers/video/fbdev/omap/lcd_inn1510.c @@ -14,15 +14,17 @@ #include "omapfb.h" +static void __iomem *omap1510_fpga_lcd_panel_control; + static int innovator1510_panel_enable(struct lcd_panel *panel) { - __raw_writeb(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL); + __raw_writeb(0x7, omap1510_fpga_lcd_panel_control); return 0; } static void innovator1510_panel_disable(struct lcd_panel *panel) { - __raw_writeb(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL); + __raw_writeb(0x0, omap1510_fpga_lcd_panel_control); } static struct lcd_panel innovator1510_panel = { @@ -48,6 +50,7 @@ static struct lcd_panel innovator1510_panel = { static int innovator1510_panel_probe(struct platform_device *pdev) { + omap1510_fpga_lcd_panel_control = (void __iomem *)pdev->dev.platform_data; omapfb_register_panel(&innovator1510_panel); return 0; } From patchwork Thu Aug 8 21:22:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084767 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 314F81398 for ; Thu, 8 Aug 2019 21:25:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2081228A44 for ; Thu, 8 Aug 2019 21:25:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1424F28BAB; Thu, 8 Aug 2019 21:25:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 329D528A44 for ; Thu, 8 Aug 2019 21:25:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390219AbfHHVZJ (ORCPT ); Thu, 8 Aug 2019 17:25:09 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:58877 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732327AbfHHVZJ (ORCPT ); Thu, 8 Aug 2019 17:25:09 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MJWgK-1hc7Bs1j2W-00JoM1; Thu, 08 Aug 2019 23:24:36 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Bartlomiej Zolnierkiewicz Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH 02/22] ARM: omap1: make omapfb standalone compilable Date: Thu, 8 Aug 2019 23:22:11 +0200 Message-Id: <20190808212234.2213262-3-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:11i56NfFlknfNnC84C5yQ9TME7FVsp8Y+DmrbBUbFNY0KYTjh7r qwXQfS1rxSZwzWV3GXq9HyioqLR6Y1NlbXTchmgozHhdIZX4fFbNmboEj7Md18xoSkmgaYS SnLPl1CdxRR/02K7+wQDfEoWCS0ny+uZj3ooZAvr5jQUWyV0XTddIYfFZKZgoqHpGTjEEIN Zv4bEIHCYk5aFgjgrwCQw== X-UI-Out-Filterresults: notjunk:1;V03:K0:Kp3KkkDmuLo=:x2OyPkvc2DT2eWNV3abo+4 QJheF9GV8zXOrQbgMx2NBCwhlRbWwsylsLof8719DmVPRyBUB1SItpBw7lp3FVm6aCGikCALt FEMEktzLxyj108G89zZZSTqbV59taLq35kkM8sWcuEJO9UYoP7y5UBb/J7rQHqFWW0Ql00k1B FR0gAKj90PIoghnm+MK0Xpfdhweh3oyVEUzSNP6iE4emJC5k/+ZUQADbOhZEuQQ3cdNMJEUi+ 8uXnr2BKOJcpzx6Ce537od9N7bLbYTkzBdNfkYM6jat1b4ru8cJQ5UtvxDO1bkCFMylr3roUW t4T6T/dCJzGnrZGq8BUC/7TA44/egNfgAdGvHAFFQSG376E+4cYzWTSlp5bXwRFncL7CB0gjd /9WrcovCYjoVK4nDObWDLLKh3xtuM4uNgSmKu1ErYItY3ax2inc7bjrId7u8OxQJGFPqa8VH6 Hv2zmS4x3sLBT5xdxX8danIJeguENiFybA4pSQRbcUraem1KmpPw1e11PsdT7XtM4QKNfZ1AE dwbhblwCysaFAvPgKf7nk3vvs6mTp7/jRPavBV92K8VoxSMmA4Y39xaQ4YtbkraTcjjqXcQ/y tbs67iLZEazULgIeIBsVDMQ4qbprvDf7kB4crhhn4h/HAaBzRvIa3a3EBoPdDNcjrWUsZC6XX vEhThDfJWoa56a/5bGZUBPTijQGCQc+BIiL5K0PLLE+RZ/COGBmT14I4tWT1DlfWQJIYJvFvq m9DnjwZrX6GOvIfJSX113bDsaW6PymUjzOI3VQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The omapfb driver is split into platform specific code for omap1, and driver code that is also specific to omap1. Moving both parts into the driver directory simplifies the structure and avoids the dependency on certain omap machine header files. The interrupt numbers in particular however must not be referenced directly from the driver to allow building in a multiplatform configuration, so these have to be passed through resources, is done for all other omap drivers. Signed-off-by: Arnd Bergmann Acked-by: Bartlomiej Zolnierkiewicz --- arch/arm/mach-omap1/Makefile | 4 -- arch/arm/mach-omap1/fb.c | 19 +++++++- arch/arm/mach-omap1/include/mach/lcdc.h | 44 ------------------- drivers/video/fbdev/Makefile | 2 +- drivers/video/fbdev/omap/Makefile | 5 +++ .../video/fbdev/omap}/lcd_dma.c | 4 +- .../video/fbdev/omap}/lcd_dma.h | 2 - drivers/video/fbdev/omap/lcdc.c | 8 ++-- drivers/video/fbdev/omap/lcdc.h | 35 +++++++++++++++ drivers/video/fbdev/omap/omapfb.h | 2 + drivers/video/fbdev/omap/omapfb_main.c | 16 ++++++- drivers/video/fbdev/omap/sossi.c | 3 +- include/linux/omap-dma.h | 7 ++- 13 files changed, 90 insertions(+), 61 deletions(-) delete mode 100644 arch/arm/mach-omap1/include/mach/lcdc.h rename {arch/arm/mach-omap1 => drivers/video/fbdev/omap}/lcd_dma.c (99%) rename {arch/arm/mach-omap1/include/mach => drivers/video/fbdev/omap}/lcd_dma.h (98%) diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index c757a52d0801..450bbf552b57 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -57,7 +57,3 @@ obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o - -ifneq ($(CONFIG_FB_OMAP),) -obj-y += lcd_dma.o -endif diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c index 0e32a959f254..b093375afc27 100644 --- a/arch/arm/mach-omap1/fb.c +++ b/arch/arm/mach-omap1/fb.c @@ -17,9 +17,12 @@ #include #include #include +#include #include +#include + #if IS_ENABLED(CONFIG_FB_OMAP) static bool omapfb_lcd_configured; @@ -27,6 +30,19 @@ static struct omapfb_platform_data omapfb_config; static u64 omap_fb_dma_mask = ~(u32)0; +struct resource omap_fb_resources[] = { + { + .name = "irq", + .start = INT_LCD_CTRL, + .flags = IORESOURCE_IRQ, + }, + { + .name = "irq", + .start = INT_SOSSI_MATCH, + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device omap_fb_device = { .name = "omapfb", .id = -1, @@ -35,7 +51,8 @@ static struct platform_device omap_fb_device = { .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &omapfb_config, }, - .num_resources = 0, + .num_resources = ARRAY_SIZE(omap_fb_resources), + .resource = omap_fb_resources, }; void __init omapfb_set_lcd_config(const struct omap_lcd_config *config) diff --git a/arch/arm/mach-omap1/include/mach/lcdc.h b/arch/arm/mach-omap1/include/mach/lcdc.h deleted file mode 100644 index 7152db1f5361..000000000000 --- a/arch/arm/mach-omap1/include/mach/lcdc.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-omap1/include/mach/lcdc.h - * - * Extracted from drivers/video/omap/lcdc.c - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak - */ -#ifndef __MACH_LCDC_H__ -#define __MACH_LCDC_H__ - -#define OMAP_LCDC_BASE 0xfffec000 -#define OMAP_LCDC_SIZE 256 -#define OMAP_LCDC_IRQ INT_LCD_CTRL - -#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) -#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) -#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) -#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) -#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) -#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) -#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) -#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) - -#define OMAP_LCDC_STAT_DONE (1 << 0) -#define OMAP_LCDC_STAT_VSYNC (1 << 1) -#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) -#define OMAP_LCDC_STAT_ABC (1 << 3) -#define OMAP_LCDC_STAT_LINE_INT (1 << 4) -#define OMAP_LCDC_STAT_FUF (1 << 5) -#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) - -#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) -#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) -#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) - -#define OMAP_LCDC_IRQ_VSYNC (1 << 2) -#define OMAP_LCDC_IRQ_DONE (1 << 3) -#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) -#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) -#define OMAP_LCDC_IRQ_LINE (1 << 6) -#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) - -#endif /* __MACH_LCDC_H__ */ diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index aab7155884ea..3324301e4c36 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -111,7 +111,7 @@ obj-$(CONFIG_FB_UDL) += udlfb.o obj-$(CONFIG_FB_SMSCUFX) += smscufx.o obj-$(CONFIG_FB_XILINX) += xilinxfb.o obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o -obj-$(CONFIG_FB_OMAP) += omap/ +obj-y += omap/ obj-y += omap2/ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o obj-$(CONFIG_FB_CARMINE) += carminefb.o diff --git a/drivers/video/fbdev/omap/Makefile b/drivers/video/fbdev/omap/Makefile index daaa73a94e7f..b88e02f5cb1f 100644 --- a/drivers/video/fbdev/omap/Makefile +++ b/drivers/video/fbdev/omap/Makefile @@ -5,6 +5,11 @@ obj-$(CONFIG_FB_OMAP) += omapfb.o +ifdef CONFIG_FB_OMAP +# must be built-in +obj-y += lcd_dma.o +endif + objs-yy := omapfb_main.o lcdc.o objs-y$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o diff --git a/arch/arm/mach-omap1/lcd_dma.c b/drivers/video/fbdev/omap/lcd_dma.c similarity index 99% rename from arch/arm/mach-omap1/lcd_dma.c rename to drivers/video/fbdev/omap/lcd_dma.c index a72ac0c02b4f..867a63c06f42 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/drivers/video/fbdev/omap/lcd_dma.c @@ -26,7 +26,9 @@ #include #include -#include + +#include "lcdc.h" +#include "lcd_dma.h" int omap_lcd_dma_running(void) { diff --git a/arch/arm/mach-omap1/include/mach/lcd_dma.h b/drivers/video/fbdev/omap/lcd_dma.h similarity index 98% rename from arch/arm/mach-omap1/include/mach/lcd_dma.h rename to drivers/video/fbdev/omap/lcd_dma.h index 1a3c0cf17899..1b4780197381 100644 --- a/arch/arm/mach-omap1/include/mach/lcd_dma.h +++ b/drivers/video/fbdev/omap/lcd_dma.h @@ -60,6 +60,4 @@ extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres); extern void omap_set_lcd_dma_b1_mirror(int mirror); extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale); -extern int omap_lcd_dma_running(void); - #endif /* __MACH_OMAP1_LCD_DMA_H__ */ diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c index fa73acfc1371..65953b7fbdb9 100644 --- a/drivers/video/fbdev/omap/lcdc.c +++ b/drivers/video/fbdev/omap/lcdc.c @@ -17,7 +17,6 @@ #include #include -#include #include #include @@ -25,6 +24,7 @@ #include "omapfb.h" #include "lcdc.h" +#include "lcd_dma.h" #define MODULE_NAME "lcdc" @@ -713,7 +713,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, } clk_enable(lcdc.lcd_ck); - r = request_irq(OMAP_LCDC_IRQ, lcdc_irq_handler, 0, MODULE_NAME, fbdev); + r = request_irq(fbdev->int_irq, lcdc_irq_handler, 0, MODULE_NAME, fbdev); if (r) { dev_err(fbdev->dev, "unable to get IRQ\n"); goto fail2; @@ -744,7 +744,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, fail4: omap_free_lcd_dma(); fail3: - free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); + free_irq(fbdev->int_irq, lcdc.fbdev); fail2: clk_disable(lcdc.lcd_ck); fail1: @@ -759,7 +759,7 @@ static void omap_lcdc_cleanup(void) free_palette_ram(); free_fbmem(); omap_free_lcd_dma(); - free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); + free_irq(lcdc.fbdev->int_irq, lcdc.fbdev); clk_disable(lcdc.lcd_ck); clk_put(lcdc.lcd_ck); } diff --git a/drivers/video/fbdev/omap/lcdc.h b/drivers/video/fbdev/omap/lcdc.h index 8a7607d861c1..cbbfd9b9e949 100644 --- a/drivers/video/fbdev/omap/lcdc.h +++ b/drivers/video/fbdev/omap/lcdc.h @@ -1,6 +1,41 @@ /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LCDC_H #define LCDC_H +/* + * Copyright (C) 2004 Nokia Corporation + * Author: Imre Deak + */ +#define OMAP_LCDC_BASE 0xfffec000 +#define OMAP_LCDC_SIZE 256 +#define OMAP_LCDC_IRQ INT_LCD_CTRL + +#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) +#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) +#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) +#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) +#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) +#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) +#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) +#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) + +#define OMAP_LCDC_STAT_DONE (1 << 0) +#define OMAP_LCDC_STAT_VSYNC (1 << 1) +#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) +#define OMAP_LCDC_STAT_ABC (1 << 3) +#define OMAP_LCDC_STAT_LINE_INT (1 << 4) +#define OMAP_LCDC_STAT_FUF (1 << 5) +#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) + +#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) +#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) +#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) + +#define OMAP_LCDC_IRQ_VSYNC (1 << 2) +#define OMAP_LCDC_IRQ_DONE (1 << 3) +#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) +#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) +#define OMAP_LCDC_IRQ_LINE (1 << 6) +#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) int omap_lcdc_set_dma_callback(void (*callback)(void *data), void *data); void omap_lcdc_free_dma_callback(void); diff --git a/drivers/video/fbdev/omap/omapfb.h b/drivers/video/fbdev/omap/omapfb.h index d930152c289c..313a051fe7a4 100644 --- a/drivers/video/fbdev/omap/omapfb.h +++ b/drivers/video/fbdev/omap/omapfb.h @@ -204,6 +204,8 @@ struct omapfb_device { struct lcd_panel *panel; /* LCD panel */ const struct lcd_ctrl *ctrl; /* LCD controller */ const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ + int ext_irq; + int int_irq; struct lcd_ctrl_extif *ext_if; /* LCD ctrl external interface */ struct device *dev; diff --git a/drivers/video/fbdev/omap/omapfb_main.c b/drivers/video/fbdev/omap/omapfb_main.c index 90eca64e3144..dc06057de91d 100644 --- a/drivers/video/fbdev/omap/omapfb_main.c +++ b/drivers/video/fbdev/omap/omapfb_main.c @@ -1618,7 +1618,7 @@ static int omapfb_do_probe(struct platform_device *pdev, init_state = 0; - if (pdev->num_resources != 0) { + if (pdev->num_resources != 1) { dev_err(&pdev->dev, "probed for an unknown device\n"); r = -ENODEV; goto cleanup; @@ -1637,6 +1637,20 @@ static int omapfb_do_probe(struct platform_device *pdev, r = -ENOMEM; goto cleanup; } + fbdev->int_irq = platform_get_irq(pdev, 0); + if (!fbdev->int_irq) { + dev_err(&pdev->dev, "unable to get irq\n"); + r = ENXIO; + goto cleanup; + } + + fbdev->ext_irq = platform_get_irq(pdev, 1); + if (!fbdev->ext_irq) { + dev_err(&pdev->dev, "unable to get irq\n"); + r = ENXIO; + goto cleanup; + } + init_state++; fbdev->dev = &pdev->dev; diff --git a/drivers/video/fbdev/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c index 80ac67f27f0d..ade9d452254c 100644 --- a/drivers/video/fbdev/omap/sossi.c +++ b/drivers/video/fbdev/omap/sossi.c @@ -15,6 +15,7 @@ #include #include "omapfb.h" +#include "lcd_dma.h" #include "lcdc.h" #define MODULE_NAME "omapfb-sossi" @@ -638,7 +639,7 @@ static int sossi_init(struct omapfb_device *fbdev) l &= ~(1 << 31); /* REORDERING */ sossi_write_reg(SOSSI_INIT1_REG, l); - if ((r = request_irq(INT_1610_SoSSI_MATCH, sossi_match_irq, + if ((r = request_irq(fbdev->ext_irq, sossi_match_irq, IRQ_TYPE_EDGE_FALLING, "sossi_match", sossi.fbdev->dev)) < 0) { dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n"); diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index ba3cfbb52312..e9d76ac6321d 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -346,8 +346,8 @@ extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth, void omap_dma_global_context_save(void); void omap_dma_global_context_restore(void); -#if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP) -#include +#if IS_ENABLED(CONFIG_FB_OMAP) +extern int omap_lcd_dma_running(void); #else static inline int omap_lcd_dma_running(void) { @@ -356,6 +356,9 @@ static inline int omap_lcd_dma_running(void) #endif #else /* CONFIG_ARCH_OMAP */ +static inline void omap_set_dma_priority(int lch, int dst_port, int priority) +{ +} static inline struct omap_system_dma_plat_info *omap_get_plat_info(void) { From patchwork Thu Aug 8 21:22:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084773 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D3CF1709 for ; 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Thu, 8 Aug 2019 17:25:24 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MFb38-1i6JUE4714-00HBDf; Thu, 08 Aug 2019 23:25:05 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Alan Stern , Greg Kroah-Hartman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , Russell King , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 03/22] ARM: omap1: move omap15xx local bus handling to usb.c Date: Thu, 8 Aug 2019 23:22:12 +0200 Message-Id: <20190808212234.2213262-4-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:rmObN8c4em3z6MADtDn1dH5ygzXHXH23QHeCylcVTnOlhY+ZPCt 9JTDbQhYBjlZCOji0YTVOOiNozPUOmVyu5bSGp5FjvGiqwdn2EjM1DB7Lvl9z8kzYoi0GIi sAsiPqAf3BGfCbkvHO6Xq9hcge9WjUUn9Wt6WXok8Z/6R6Ij7XkWeZ7NqDBuuQY0FACvFTq mg1JUQO8HGF+l4UgCpwXA== X-UI-Out-Filterresults: notjunk:1;V03:K0:mbk8i9bIm40=:m8WNxBYOf+mHNwotPmsJTT bVT0EiIA51AJzcxHr109cLxi1Hz3cezAl8cww4l+fLfdIxu0AJbeUwvkcsyMSRLV+7u0DxlT0 WIM+cSIqflSXl2MdNK5ga13JeFyevwSJdBTJhZzgtRnZoFco5BVGrDZ2+XU/IJcyjP9IG1AW6 Gq7FRGvHhl5EezehOB1IwI1flNqBP1EJPQpfG0/xt4XhWm/t47YhuqA7Rw+PnPPWvsDHUtBH9 dW5xi+BdytYUnjMVpM/N5SqgWZH23xzUVLM7OuQwHp2vjgR9yMSSDDqGfHwCs28yUQiSLF2BA KXcneZ5opCMNRhjEA+ix48uERHEvH2AZb8OarN6qcej78qRNV5i+U+NoALIRntHrhdA0ShLbR CXYJv4g1K+WQlC9YjRgYT7+QlqokNLPoDwsvVEC1d9214PTZ2Bdau5CpdoXL6M4E63mIxC8R0 yenYakopWppiLWGUqPkx7zUQl/JvEMFYnNZuEMDTG9e+0zkCmVu47yyGJadhMhqSWKUbujafH ZrhlTJAfXtkDhNOmE3aa3ZnmPBfrDzp8/5+yVa2ZKR1mbpZ7OC9Gs5ZKSgPwyQ3XLuuV9aW9h Yvp6kZKzYG5aXKHwoPyBCwPArFNnSjStculNF2U0V1OSSIgY5ESRZzIcdYVnjSbtXxFF6FY1l NQUXU2k7WC1F1Or6Ld7HspeYxGz4i7VUKdyNSbtqKPgE1JwsHijsg2tidql05vVd/mR/kXV2O fkdq1gvHPb21UOw6JDQwRGwEp6o2qIckoxnloQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The mach/memory.h file only exists to implement a dma offset for "Local Bus" devices, and that consists of the OHCI USB controller for practical purposes. The generic dma-mapping interface has gained this exact feature some years ago and can do it much more efficiently, so replace the complex __arch_virt_to_dma/__arch_dma_to_pfn/... logic with a much simpler boot time initialization. This should also make any code that performs dma mapping calls at runtime much more efficient, by eliminating the strcmp() along with the computation. Similar, a portion of the ohci-omap driver is just there for configuring the memory translation, this too can get moved into usb.c Signed-off-by: Arnd Bergmann Acked-by: Felipe Balbi --- arch/arm/mach-omap1/include/mach/memory.h | 43 ----------- arch/arm/mach-omap1/include/mach/omap1510.h | 1 - arch/arm/mach-omap1/usb.c | 79 +++++++++++++++++++++ drivers/usb/host/ohci-omap.c | 72 +------------------ include/linux/platform_data/usb-omap1.h | 2 + 5 files changed, 83 insertions(+), 114 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index 1142560e0078..ba3a350479c8 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -9,47 +9,4 @@ /* REVISIT: omap1 legacy drivers still rely on this */ #include -/* - * Bus address is physical address, except for OMAP-1510 Local Bus. - * OMAP-1510 bus address is translated into a Local Bus address if the - * OMAP bus type is lbus. We do the address translation based on the - * device overriding the defaults used in the dma-mapping API. - * Note that the is_lbus_device() test is not very efficient on 1510 - * because of the strncmp(). - */ -#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) - -/* - * OMAP-1510 Local Bus address offset - */ -#define OMAP1510_LB_OFFSET UL(0x30000000) - -#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) -#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) -#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) - -#define __arch_pfn_to_dma(dev, pfn) \ - ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ - if (is_lbus_device(dev)) \ - __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ - __dma; }) - -#define __arch_dma_to_pfn(dev, addr) \ - ({ dma_addr_t __dma = addr; \ - if (is_lbus_device(dev)) \ - __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ - __phys_to_pfn(__dma); \ - }) - -#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ - lbus_to_virt(addr) : \ - __phys_to_virt(addr)); }) - -#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ - (dma_addr_t) (is_lbus_device(dev) ? \ - virt_to_lbus(__addr) : \ - __virt_to_phys(__addr)); }) - -#endif /* CONFIG_ARCH_OMAP15XX */ - #endif diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h index 3d235244bf5c..7af9c0c7c5ab 100644 --- a/arch/arm/mach-omap1/include/mach/omap1510.h +++ b/arch/arm/mach-omap1/include/mach/omap1510.h @@ -159,4 +159,3 @@ #define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) #endif /* __ASM_ARCH_OMAP15XX_H */ - diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index d8e9bbda8f7b..740c876ae46b 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -10,6 +10,7 @@ #include #include #include +#include #include @@ -127,6 +128,7 @@ omap_otg_init(struct omap_usb_config *config) syscon &= ~HST_IDLE_EN; ohci_device->dev.platform_data = config; + status = platform_device_register(ohci_device); if (status) pr_debug("can't register OHCI device, %d\n", status); @@ -533,6 +535,80 @@ static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) } #ifdef CONFIG_ARCH_OMAP15XX +/* OMAP-1510 OHCI has its own MMU for DMA */ +#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ +#define OMAP1510_LB_CLOCK_DIV 0xfffec10c +#define OMAP1510_LB_MMU_CTL 0xfffec208 +#define OMAP1510_LB_MMU_LCK 0xfffec224 +#define OMAP1510_LB_MMU_LD_TLB 0xfffec228 +#define OMAP1510_LB_MMU_CAM_H 0xfffec22c +#define OMAP1510_LB_MMU_CAM_L 0xfffec230 +#define OMAP1510_LB_MMU_RAM_H 0xfffec234 +#define OMAP1510_LB_MMU_RAM_L 0xfffec238 + +/* + * Bus address is physical address, except for OMAP-1510 Local Bus. + * OMAP-1510 bus address is translated into a Local Bus address if the + * OMAP bus type is lbus. + */ +#define OMAP1510_LB_OFFSET UL(0x30000000) +#define OMAP1510_LB_DMA_PFN_OFFSET ((OMAP1510_LB_OFFSET - PAGE_OFFSET) >> PAGE_SHIFT) + +/* + * OMAP-1510 specific Local Bus clock on/off + */ +static int omap_1510_local_bus_power(int on) +{ + if (on) { + omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); + udelay(200); + } else { + omap_writel(0, OMAP1510_LB_MMU_CTL); + } + + return 0; +} + +/* + * OMAP-1510 specific Local Bus initialization + * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. + * See also arch/mach-omap/memory.h for __virt_to_dma() and + * __dma_to_virt() which need to match with the physical + * Local Bus address below. + */ +static int omap_1510_local_bus_init(void) +{ + unsigned int tlb; + unsigned long lbaddr, physaddr; + + omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, + OMAP1510_LB_CLOCK_DIV); + + /* Configure the Local Bus MMU table */ + for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { + lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; + physaddr = tlb * 0x00100000 + PHYS_OFFSET; + omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); + omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, + OMAP1510_LB_MMU_CAM_L); + omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); + omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); + omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); + omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); + } + + /* Enable the walking table */ + omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); + udelay(200); + + return 0; +} + +static void omap_1510_local_bus_reset(void) +{ + omap_1510_local_bus_power(1); + omap_1510_local_bus_init(); +} /* ULPD_DPLL_CTRL */ #define DPLL_IOB (1 << 13) @@ -601,11 +677,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) int status; ohci_device.dev.platform_data = config; + ohci_device.dev.dma_pfn_offset = OMAP1510_LB_DMA_PFN_OFFSET; status = platform_device_register(&ohci_device); if (status) pr_debug("can't register OHCI device, %d\n", status); /* hcd explicitly gates 48MHz */ } + + config->lb_reset = omap_1510_local_bus_reset; #endif } diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index d8d35d456456..f7efe65f01c5 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -40,17 +40,6 @@ #include -/* OMAP-1510 OHCI has its own MMU for DMA */ -#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ -#define OMAP1510_LB_CLOCK_DIV 0xfffec10c -#define OMAP1510_LB_MMU_CTL 0xfffec208 -#define OMAP1510_LB_MMU_LCK 0xfffec224 -#define OMAP1510_LB_MMU_LD_TLB 0xfffec228 -#define OMAP1510_LB_MMU_CAM_H 0xfffec22c -#define OMAP1510_LB_MMU_CAM_L 0xfffec230 -#define OMAP1510_LB_MMU_RAM_H 0xfffec234 -#define OMAP1510_LB_MMU_RAM_L 0xfffec238 - #define DRIVER_DESC "OHCI OMAP driver" #ifdef CONFIG_TPS65010 @@ -113,61 +102,6 @@ static int omap_ohci_transceiver_power(int on) return 0; } -#ifdef CONFIG_ARCH_OMAP15XX -/* - * OMAP-1510 specific Local Bus clock on/off - */ -static int omap_1510_local_bus_power(int on) -{ - if (on) { - omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); - udelay(200); - } else { - omap_writel(0, OMAP1510_LB_MMU_CTL); - } - - return 0; -} - -/* - * OMAP-1510 specific Local Bus initialization - * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. - * See also arch/mach-omap/memory.h for __virt_to_dma() and - * __dma_to_virt() which need to match with the physical - * Local Bus address below. - */ -static int omap_1510_local_bus_init(void) -{ - unsigned int tlb; - unsigned long lbaddr, physaddr; - - omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, - OMAP1510_LB_CLOCK_DIV); - - /* Configure the Local Bus MMU table */ - for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { - lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; - physaddr = tlb * 0x00100000 + PHYS_OFFSET; - omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); - omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, - OMAP1510_LB_MMU_CAM_L); - omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); - omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); - omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); - omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); - } - - /* Enable the walking table */ - omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); - udelay(200); - - return 0; -} -#else -#define omap_1510_local_bus_power(x) {} -#define omap_1510_local_bus_init() {} -#endif - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -237,10 +171,8 @@ static int ohci_omap_reset(struct usb_hcd *hcd) omap_ohci_clock_power(1); - if (cpu_is_omap15xx()) { - omap_1510_local_bus_power(1); - omap_1510_local_bus_init(); - } + if (config->lb_reset) + config->lb_reset(); ret = ohci_setup(hcd); if (ret < 0) diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 43b5ce139c37..878e572a78bf 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -48,6 +48,8 @@ struct omap_usb_config { u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); int (*ocpi_enable)(void); + + void (*lb_reset)(void); }; #endif /* __LINUX_USB_OMAP1_H */ From patchwork Thu Aug 8 21:22:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084779 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 874591709 for ; Thu, 8 Aug 2019 21:26:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 789D8288E0 for ; Thu, 8 Aug 2019 21:26:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6C5D228862; Thu, 8 Aug 2019 21:26:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 02E9C288E0 for ; Thu, 8 Aug 2019 21:26:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733295AbfHHV0C (ORCPT ); Thu, 8 Aug 2019 17:26:02 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:55247 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732327AbfHHV0C (ORCPT ); Thu, 8 Aug 2019 17:26:02 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mw9oq-1iCGs209Ey-00s26z; Thu, 08 Aug 2019 23:25:38 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Alan Stern , Greg Kroah-Hartman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 04/22] ARM: omap1: move ohci phy power handling to board files Date: Thu, 8 Aug 2019 23:22:13 +0200 Message-Id: <20190808212234.2213262-5-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:JOVFoCl4IruBbAq2/W1OlJMnj12jnk0BHfRQXLRVUPvFZ/BkWjI uD870aw7Nu4aFsXKVZbyOS2BCbOqI07ZhFAWvSwi4NG4uZ1+QamwJP0M6iA8Jg5QY+yKiJ9 FFGQEDAlfr7xfXu1qdu6NG5x3iX8cZp+MSbat54QEbZgActZKFxkdfnbAn/mrCp0j7TFIgV ut/HF1/KnWdMc3jRtw0bQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:Jn6kNrwoVF4=:pCDRiVB9Isdg8kO0ofwjp2 soKcsJ+YtWwpsoePvFK1hEhCFfG56WIGFwrUfTlQeOfHiZdg9FMCwe4dEEmrZFIfWtSXwLYZc WumvnzBi1xjf75bSlL4sAxaGa8HwBy8H53910AwuWPrsax6RHBLYdxL1ptcCd+w7ba1HxGvsA 5nxXrpTUYNKeo7ZiW09lDNQpFPGgWbpr/AQMvPAl14ocFTTgKL1XPramCztSH2CB/LtyGesCZ 7Osuk84eDaQ4mK4VJJq1wnJLZRSp7Z8hrK0RuzIuCq68iyJO94QOdfX6EG+QzmQrj0L9LlAkO nKQ3ikWxui4qBk+L1m/LM5NDm5YI2hAAZsSjO2PGCyBa6UFAW4z438Db0iETqhFul4zdi2tdG EfAniHmbEJwIMUZVz/4ECg2KqpPdfYkadSr82eHYTup/SM9skbd1b5cY6Icz7GIXwOXrx8tIy 2qRpX8J25iLXTVN+N5Dk0v4UQ8AOYJSf9qi1afc4IMCNeVbMRHw4ZXxCEM9lMI2tDHEKJD18d /THATWQ/ZJNHp0TAk7HNXwum++xETK3EoAtWNonxczmYFVpM//uB2LZe6u3VzyByA3r2essjt pPhcw9L1rBZmthSiIfGfGqcPOC+CvOd0vCVB01+3BYD/xjzOB3KeCLnWlVZ+UqKaTePFFi+Hv 80npCWaPfK8bSnEF5dgXWnwbLLKVbzfDiwaM2dGp/f5xKmLD16Ma/iO7L25I4r5xxQa/Icebm 4Bx5L+EzhOBSXP8MutPHKlSKQDG63P9nKXRO2A== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Two boards require a a special handler to control their transceiver power. Move the corresponding code into the board files and out of the common code. The osk board already has a dependency on TPS65010, this adds another one, with the same hack to get it to compile with CONFIG_TPS65010=m. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-innovator.c | 19 +++++++++++++++++ arch/arm/mach-omap1/board-osk.c | 19 +++++++++++++++++ drivers/usb/host/ohci-omap.c | 28 ++----------------------- include/linux/platform_data/usb-omap1.h | 2 ++ 4 files changed, 42 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2425f1bacb33..653af63320a8 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -290,6 +290,23 @@ static void __init innovator_init_smc91x(void) } #ifdef CONFIG_ARCH_OMAP15XX +/* + * Board specific gang-switched transceiver power on/off. + */ +static int innovator_omap_ohci_transceiver_power(int on) +{ + if (on) + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + else + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + + return 0; +} + static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ .hmc_mode = 4, @@ -300,6 +317,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = { .register_dev = 1, .pins[0] = 2, + + .transceiver_power = innovator_omap_ohci_transceiver_power, }; static const struct omap_lcd_config innovator1510_lcd_config __initconst = { diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 4df15e693b6e..3be7b3b580d3 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -278,6 +278,23 @@ static void __init osk_init_cf(void) irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } +/* + * Board specific gang-switched transceiver power on/off. + * NOTE: OSK supplies power from DC, not battery. + */ +static int osk_omap_ohci_transceiver_power(int on) +{ + if (!IS_BUILTIN(CONFIG_TPS65010)) + return -ENXIO; + + if (on) + tps65010_set_gpio_out_value(GPIO1, LOW); + else + tps65010_set_gpio_out_value(GPIO1, HIGH); + + return 0; +} + static struct omap_usb_config osk_usb_config __initdata = { /* has usb host connector (A) ... for development it can also * be used, with a NONSTANDARD gender-bending cable/dongle, as @@ -292,6 +309,8 @@ static struct omap_usb_config osk_usb_config __initdata = { .rwc = 1, #endif .pins[0] = 2, + + .transceiver_power = osk_omap_ohci_transceiver_power, }; #ifdef CONFIG_OMAP_OSK_MISTRAL diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index f7efe65f01c5..e92ef3231f2c 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -77,31 +77,6 @@ static void omap_ohci_clock_power(int on) } } -/* - * Board specific gang-switched transceiver power on/off. - * NOTE: OSK supplies power from DC, not battery. - */ -static int omap_ohci_transceiver_power(int on) -{ - if (on) { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (machine_is_omap_osk()) - tps65010_set_gpio_out_value(GPIO1, LOW); - } else { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (machine_is_omap_osk()) - tps65010_set_gpio_out_value(GPIO1, HIGH); - } - - return 0; -} - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -213,7 +188,8 @@ static int ohci_omap_reset(struct usb_hcd *hcd) } /* FIXME hub_wq hub requests should manage power switching */ - omap_ohci_transceiver_power(1); + if (config->transceiver_power) + config->transceiver_power(1); /* board init will have already handled HMC and mux setup. * any external transceiver should already be initialized diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 878e572a78bf..e7b8dc92a269 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -50,6 +50,8 @@ struct omap_usb_config { int (*ocpi_enable)(void); void (*lb_reset)(void); + + int (*transceiver_power)(int on); }; #endif /* __LINUX_USB_OMAP1_H */ From patchwork Thu Aug 8 21:22:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084785 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F1E1D1398 for ; Thu, 8 Aug 2019 21:27:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E216E28AAC for ; Thu, 8 Aug 2019 21:27:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D664928AF4; Thu, 8 Aug 2019 21:27:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 19AB328AAC for ; Thu, 8 Aug 2019 21:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403970AbfHHV1f (ORCPT ); Thu, 8 Aug 2019 17:27:35 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:59993 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732609AbfHHV1f (ORCPT ); Thu, 8 Aug 2019 17:27:35 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mae7u-1iTFkD13hS-00cAUB; Thu, 08 Aug 2019 23:27:11 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley , Felipe Balbi , Greg Kroah-Hartman , Alan Stern Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 05/22] ARM: omap1: move mach/usb.h to include/linux/soc Date: Thu, 8 Aug 2019 23:22:14 +0200 Message-Id: <20190808212234.2213262-6-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:7EGvG9MpSe9Tat/1OUNribL9cDQ0sxKW61daPJqVL1gxJb8OEBR SI9Y51w8PPLJpodpTJzERNyjlfay9T96WdETvnRYbl3xr/qBnhKa1ZWca43USmz9o3DJyVu t9C+a53+DEZl/FsNdTps8DotMHx1K7ibwXsZ1KMj0eQ2DvfiVGdgJ4Yiml3uxHEe3+uWfvu V3X2angRNbQEMC+psMg9A== X-UI-Out-Filterresults: notjunk:1;V03:K0:6raSuf2fSPs=:wswGz7TSCdp6+NKQAd3LV+ 1VzQqn6TcE2KeXFsiXfm75ict2KWKFcc6yl3Ir3rT+HVMJrO85712goOOhgyZTJtuKb8uARXw 9HfSp8RAx72pMfVXkksS0T6Wmw46KXBsf1lcvSEjdorAxfdtdrhBC2BjbmXLQiZRnQokICoc4 SVXx44owCJP7eULDbmM7wsX/0eapZUGoxY25crfKSsnoYfpFwjZK9nlv1j4n1eymS65qreupi RpbBgCS3eRRpm25/7VpOsxve1pH9xPOtL5enxzwBMgciTGHFqCEgLmjM37wEqzcJjuwGZ6P6I m/Tu3FO2B1riROySQq5FcVBB7kwaeouWw/TC3EX5FYsoGG3e+sfR9zQilXVte/kD/ywuYPek0 othyya7ws7YFE3z0XOzoISXPnur06nOn+yExHUkP2y7YlDmLMOmQHiNh2cLcsIOT0WThemZko L2vgYD4B6H9fWGoo5w5loHqFbgxH1HqjhSYSmYCHk8qbNhSEGVZKuC/+hVdoSJUWPV8WqbwHo uTcqWydcd7e83PJbXkdbXIOltuNTahVYFI5CA65z+3/6QYbOk0eaWA8kGvkAeHVtygRQH04e7 PFBaApAuDBMpA9BjMdmO0w1H8idanXAettibgGtEPp4S5toAxksUz1IOg8WMg2UMdAg+RCZHx Vgep4U5+Oy0SUR3XxbDD+8HnOfOHsU2HbUeg9mg1gcAOJweqOeKfDNU/k9hVT90G1qQdQGWCP m0CuqU4ZOuQzLsFfxbMJfT3g/Bum8mX6oacmhA== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The register definitions in this header are used in at least four different places, with little hope of completely cleaning that up. Split up the file into a portion that becomes a linux-wide header under include/linux/soc/ti/, and the parts that are actually only needed by board files. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-ams-delta.c | 2 +- arch/arm/mach-omap1/board-generic.c | 2 +- arch/arm/mach-omap1/board-h2.c | 2 +- arch/arm/mach-omap1/board-h3.c | 2 +- arch/arm/mach-omap1/board-htcherald.c | 2 +- arch/arm/mach-omap1/board-innovator.c | 2 +- arch/arm/mach-omap1/board-nokia770.c | 2 +- arch/arm/mach-omap1/board-osk.c | 2 +- arch/arm/mach-omap1/board-palmte.c | 2 +- arch/arm/mach-omap1/board-palmtt.c | 2 +- arch/arm/mach-omap1/board-palmz71.c | 2 +- arch/arm/mach-omap1/board-sx1.c | 2 +- arch/arm/mach-omap1/clock_data.c | 2 +- arch/arm/mach-omap1/usb.c | 2 +- arch/arm/mach-omap1/usb.h | 25 +++++++++++++++++ drivers/usb/gadget/udc/omap_udc.c | 3 +- drivers/usb/host/ohci-omap.c | 4 +-- drivers/usb/phy/phy-isp1301-omap.c | 2 +- .../usb.h => include/linux/soc/ti/omap1-usb.h | 28 ++++++------------- 19 files changed, 52 insertions(+), 38 deletions(-) create mode 100644 arch/arm/mach-omap1/usb.h rename arch/arm/mach-omap1/include/mach/usb.h => include/linux/soc/ti/omap1-usb.h (86%) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index e47a6fbcfd6e..2d63db557792 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -39,7 +39,7 @@ #include #include "camera.h" -#include +#include "usb.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index c62554990115..8ef0a9b17e92 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -21,7 +21,7 @@ #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index cb7ce627ffe8..92a31727a069 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -41,7 +41,7 @@ #include "flash.h" #include -#include +#include "usb.h" #include "common.h" #include "board-h2.h" diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4249984f9c30..86260498c344 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -45,7 +45,7 @@ #include #include -#include +#include "usb.h" #include "common.h" #include "board-h3.h" diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 258304edf23e..f7220b60eb61 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -31,7 +31,7 @@ #include "mmc.h" #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 653af63320a8..f169e172421d 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -34,7 +34,7 @@ #include #include -#include +#include "usb.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 11511ae2e0a2..e43c852103f5 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -31,7 +31,7 @@ #include #include -#include +#include "usb.h" #include "common.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 3be7b3b580d3..99ebe4503787 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -51,7 +51,7 @@ #include #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index ce6f0fcd9d12..4ac981c5cf74 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -38,7 +38,7 @@ #include #include -#include +#include "usb.h" #include "mmc.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 8a08311c4e05..e48ae5fbe1b1 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -38,7 +38,7 @@ #include #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 034e5bc6a029..37db0ab31528 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -40,7 +40,7 @@ #include #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index bb9ec345e204..0965b1b689ec 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -38,7 +38,7 @@ #include "board-sx1.h" #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 3ebcd96efbff..ef46c5f67cf9 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -22,7 +22,7 @@ #include "soc.h" #include -#include /* for OTG_BASE */ +#include "usb.h" /* for OTG_BASE */ #include "iomap.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 740c876ae46b..a9deda073822 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -16,7 +16,7 @@ #include -#include +#include "usb.h" #include "common.h" diff --git a/arch/arm/mach-omap1/usb.h b/arch/arm/mach-omap1/usb.h new file mode 100644 index 000000000000..08c9344c46e3 --- /dev/null +++ b/arch/arm/mach-omap1/usb.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * fixme correct answer depends on hmc_mode, + * as does (on omap1) any nonzero value for config->otg port number + */ +#include +#include + +#if IS_ENABLED(CONFIG_USB_OMAP) +#define is_usb0_device(config) 1 +#else +#define is_usb0_device(config) 0 +#endif + +#if IS_ENABLED(CONFIG_USB_SUPPORT) +void omap1_usb_init(struct omap_usb_config *pdata); +#else +static inline void omap1_usb_init(struct omap_usb_config *pdata) +{ +} +#endif + +#define OMAP1_OHCI_BASE 0xfffba000 +#define OMAP2_OHCI_BASE 0x4805e000 +#define OMAP_OHCI_BASE OMAP1_OHCI_BASE diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c index f36f0730afab..721c9c3fe5a7 100644 --- a/drivers/usb/gadget/udc/omap_udc.c +++ b/drivers/usb/gadget/udc/omap_udc.c @@ -40,8 +40,9 @@ #include #include +#include -#include +#include #include "omap_udc.h" diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index e92ef3231f2c..841563fba20d 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include #include @@ -37,8 +39,6 @@ #include #include -#include - #define DRIVER_DESC "OHCI OMAP driver" diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c index 7041ba030052..18cf87dcc21f 100644 --- a/drivers/usb/phy/phy-isp1301-omap.c +++ b/drivers/usb/phy/phy-isp1301-omap.c @@ -25,7 +25,7 @@ #include -#include +#include #undef VERBOSE diff --git a/arch/arm/mach-omap1/include/mach/usb.h b/include/linux/soc/ti/omap1-usb.h similarity index 86% rename from arch/arm/mach-omap1/include/mach/usb.h rename to include/linux/soc/ti/omap1-usb.h index 5429d86c7190..67488698601a 100644 --- a/arch/arm/mach-omap1/include/mach/usb.h +++ b/include/linux/soc/ti/omap1-usb.h @@ -1,34 +1,20 @@ /* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __SOC_TI_OMAP1_USB +#define __SOC_TI_OMAP1_USB /* - * FIXME correct answer depends on hmc_mode, - * as does (on omap1) any nonzero value for config->otg port number + * Constants in this file are used all over the place, in platform + * code, as well as the udc, phy and ohci drivers. + * This is not a great design, but unlikely to get fixed after + * such a long time. Don't do this elsewhere. */ -#if IS_ENABLED(CONFIG_USB_OMAP) -#define is_usb0_device(config) 1 -#else -#define is_usb0_device(config) 0 -#endif - -#include - -#if IS_ENABLED(CONFIG_USB_SUPPORT) -void omap1_usb_init(struct omap_usb_config *pdata); -#else -static inline void omap1_usb_init(struct omap_usb_config *pdata) -{ -} -#endif #define OMAP1_OTG_BASE 0xfffb0400 #define OMAP1_UDC_BASE 0xfffb4000 -#define OMAP1_OHCI_BASE 0xfffba000 -#define OMAP2_OHCI_BASE 0x4805e000 #define OMAP2_UDC_BASE 0x4805e200 #define OMAP2_OTG_BASE 0x4805e300 #define OTG_BASE OMAP1_OTG_BASE #define UDC_BASE OMAP1_UDC_BASE -#define OMAP_OHCI_BASE OMAP1_OHCI_BASE /* * OTG and transceiver registers, for OMAPs starting with ARM926 @@ -126,3 +112,5 @@ static inline void omap1_usb_init(struct omap_usb_config *pdata) # define CONF_USB0_ISOLATE_R (1 << 3) # define CONF_USB_PWRDN_DM_R (1 << 2) # define CONF_USB_PWRDN_DP_R (1 << 1) + +#endif From patchwork Thu Aug 8 21:22:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084791 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6B7F1398 for ; Thu, 8 Aug 2019 21:28:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B4AD228AAC for ; Thu, 8 Aug 2019 21:28:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A580728AF4; Thu, 8 Aug 2019 21:28:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3EFEE28AAC for ; Thu, 8 Aug 2019 21:28:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404183AbfHHV2W (ORCPT ); Thu, 8 Aug 2019 17:28:22 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:44225 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732609AbfHHV2W (ORCPT ); Thu, 8 Aug 2019 17:28:22 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MFb38-1i6JXW47cE-00HBDf; Thu, 08 Aug 2019 23:28:05 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 06/22] ARM: omap1: move some headers to include/linux/soc Date: Thu, 8 Aug 2019 23:22:15 +0200 Message-Id: <20190808212234.2213262-7-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:idy6Lea7UmTcnlNgoyrbiJS0Zc9hIIsd5pglu6VTK4FC+iaziM5 Nc1rIHCO8XUywBBgSTYOy22ka2vrty2w4E+3N9N4rx4ncj3X6khdWIngzEI2LfHiwYDkiII TMw40jRvfpPXQqUpKGydTJXa3i4IdGLlXkT78pbmOND5dPyfDvs5Di+8qEgAbZTPNRx86Cg Ypw2o19fyGadsikDFkhgQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:CTXJZb33Cbw=:zqaiPZVfWdY+l2xNafnb8c gWlI2SzVJqyhyHQhAkq0kR3nlH+15Ja8anM3jY8FW5/lkrJdEuSgok/5AUQcMPdxVnOmJXHRH R6QPOY+8+ZGPU0Dc+MNbGcqPn0biNAclDq8pq0BKnt4O0cv1C1dyDU7PTB3qGyyiwPqGitg14 y08xA8wCOlbQ7esCgJ6roV4ewc/IevN89s903L+Ke24I3Kyid2JyhRBJo4Y41tpMzOmiH84qG FB2ohRuTW34/53eptQpfTklllvGKeiPLyeUAOsLASq1zSKBbsoQ6ku0lPLWDNmkcMmHDKid99 n6s8+cwzbvTq+eRLLuySIJXkpjJ1NNA6xcbujlNsf5U3CjunH0fo64XiEiQmLWbagDnHXcQUP 1OxY5cv2S9MK3cU0rBcFm64WoPTf9FBtNYPK4T/0FHQcQf+iEPnoJWYE0kP5X/lSGlLuM5UAt 4DgE9VbuWtjYT+UboEx3aooozEzygn1XH9aBrnRQ83C7XhFU2wiszV2/DAXijeb+XV71X2NGB Zo3vChf2+HSFUg9Vm9rfDNdBUsVWizTMxFpbGH2OnakhNcYyr0No3fBCPTj2DiH2LgSKgrnWm vxoZRMC/IEkgGxeNWaEBi78+ZWdW3fotwaxOQCcrcCRk0b+Ldu0q99sfDOF68sk2KHIjC0Zpn mX48YCoj4homHcBzYGXB0H0OD7q5pNibEoFpbLgXaFgglSoxn6U03t/YR2pcFp1419V4OLCQj zJyBdW2suKB5jjWf468pBJUxZVumwjFPmUv4tQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are three remaining header files that are used by omap1 specific device drivers: - mach/soc.h provides cpu_is_omapXXX abstractions - mach/hardware.h provides omap_read/omap_write functions and physical addresses - mach/mux.h provides an omap specific pinctrl abstraction This is generally not how we do platform abstractions today, and it would be good to completely get rid of these in favor of passing information through platform devices and the pinctrl subsystem. However, given that nobody is working on that, just move it one step forward by splitting out the header files that are used by drivers today from the machine headers that are only used internally. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/include/mach/hardware.h | 128 +------ arch/arm/mach-omap1/include/mach/memory.h | 2 +- arch/arm/mach-omap1/include/mach/mux.h | 299 +---------------- arch/arm/mach-omap1/soc.h | 6 +- arch/arm/plat-omap/dma.c | 4 +- include/linux/soc/ti/omap1-io.h | 143 ++++++++ include/linux/soc/ti/omap1-mux.h | 311 ++++++++++++++++++ .../soc.h => include/linux/soc/ti/omap1-soc.h | 22 -- 8 files changed, 466 insertions(+), 449 deletions(-) create mode 100644 include/linux/soc/ti/omap1-io.h create mode 100644 include/linux/soc/ti/omap1-mux.h rename arch/arm/mach-omap1/include/mach/soc.h => include/linux/soc/ti/omap1-soc.h (90%) diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index e7c8ac7d83e3..05c5cd3e95f4 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -37,19 +37,10 @@ #define __ASM_ARCH_OMAP_HARDWARE_H #include +#include #ifndef __ASSEMBLER__ #include -#include - -/* - * NOTE: Please use ioremap + __raw_read/write where possible instead of these - */ -extern u8 omap_readb(u32 pa); -extern u16 omap_readw(u32 pa); -extern u32 omap_readl(u32 pa); -extern void omap_writeb(u8 v, u32 pa); -extern void omap_writew(u16 v, u32 pa); -extern void omap_writel(u32 v, u32 pa); +#include #include @@ -98,66 +89,6 @@ static inline u32 omap_cs3_phys(void) #define MPU_TIMER_AR (1 << 1) #define MPU_TIMER_ST (1 << 0) -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE (0xfffece00) -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -#define CK_RATEF 1 -#define CK_IDLEF 2 -#define CK_ENABLEF 4 -#define CK_SELECTF 8 -#define SETARM_IDLE_SHIFT - -/* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) - -/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) -#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) -#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) -#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) -#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) - -/* - * --------------------------------------------------------------------------- - * UPLD - * --------------------------------------------------------------------------- - */ -#define ULPD_REG_BASE (0xfffe0800) -#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) -#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) -#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) -# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ -# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ -#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) -# define SOFT_UDC_REQ (1 << 4) -# define SOFT_USB_CLK_REQ (1 << 3) -# define SOFT_DPLL_REQ (1 << 0) -#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) -#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) -#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) -#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) -#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) -# define DIS_MMC2_DPLL_REQ (1 << 11) -# define DIS_MMC1_DPLL_REQ (1 << 10) -# define DIS_UART3_DPLL_REQ (1 << 9) -# define DIS_UART2_DPLL_REQ (1 << 8) -# define DIS_UART1_DPLL_REQ (1 << 7) -# define DIS_USB_HOST_DPLL_REQ (1 << 6) -#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) -#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) - /* * --------------------------------------------------------------------------- * Watchdog timer @@ -213,52 +144,6 @@ static inline u32 omap_cs3_phys(void) #endif -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define MOD_CONF_CTRL_0 0xfffe1080 -#define MOD_CONF_CTRL_1 0xfffe1110 - -/* - * ---------------------------------------------------------------------------- - * Pin multiplexing registers - * ---------------------------------------------------------------------------- - */ -#define FUNC_MUX_CTRL_0 0xfffe1000 -#define FUNC_MUX_CTRL_1 0xfffe1004 -#define FUNC_MUX_CTRL_2 0xfffe1008 -#define COMP_MODE_CTRL_0 0xfffe100c -#define FUNC_MUX_CTRL_3 0xfffe1010 -#define FUNC_MUX_CTRL_4 0xfffe1014 -#define FUNC_MUX_CTRL_5 0xfffe1018 -#define FUNC_MUX_CTRL_6 0xfffe101C -#define FUNC_MUX_CTRL_7 0xfffe1020 -#define FUNC_MUX_CTRL_8 0xfffe1024 -#define FUNC_MUX_CTRL_9 0xfffe1028 -#define FUNC_MUX_CTRL_A 0xfffe102C -#define FUNC_MUX_CTRL_B 0xfffe1030 -#define FUNC_MUX_CTRL_C 0xfffe1034 -#define FUNC_MUX_CTRL_D 0xfffe1038 -#define PULL_DWN_CTRL_0 0xfffe1040 -#define PULL_DWN_CTRL_1 0xfffe1044 -#define PULL_DWN_CTRL_2 0xfffe1048 -#define PULL_DWN_CTRL_3 0xfffe104c -#define PULL_DWN_CTRL_4 0xfffe10ac - -/* OMAP-1610 specific multiplexing registers */ -#define FUNC_MUX_CTRL_E 0xfffe1090 -#define FUNC_MUX_CTRL_F 0xfffe1094 -#define FUNC_MUX_CTRL_10 0xfffe1098 -#define FUNC_MUX_CTRL_11 0xfffe109c -#define FUNC_MUX_CTRL_12 0xfffe10a0 -#define PU_PD_SEL_0 0xfffe10b4 -#define PU_PD_SEL_1 0xfffe10b8 -#define PU_PD_SEL_2 0xfffe10bc -#define PU_PD_SEL_3 0xfffe10c0 -#define PU_PD_SEL_4 0xfffe10c4 - /* Timer32K for 1610 and 1710*/ #define OMAP_TIMER32K_BASE 0xFFFBC400 @@ -299,15 +184,6 @@ static inline u32 omap_cs3_phys(void) #define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) -/* - * ---------------------------------------------------------------------------- - * Pulse-Width Light - * ---------------------------------------------------------------------------- - */ -#define OMAP_PWL_BASE 0xfffb5800 -#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) -#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) - /* * --------------------------------------------------------------------------- * Processor specific defines diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index ba3a350479c8..ee91a6cb548d 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -7,6 +7,6 @@ #define __ASM_ARCH_MEMORY_H /* REVISIT: omap1 legacy drivers still rely on this */ -#include +#include #endif diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/include/mach/mux.h index adfe1f6bd0c5..362abb9f1dcf 100644 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ b/arch/arm/mach-omap1/include/mach/mux.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARCH_MUX_H #define __ASM_ARCH_MUX_H +#include + #define PU_PD_SEL_NA 0 /* No pu_pd reg available */ #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */ @@ -124,301 +126,6 @@ struct pin_config { }; -enum omap7xx_index { - /* OMAP 730 keyboard */ - E2_7XX_KBR0, - J7_7XX_KBR1, - E1_7XX_KBR2, - F3_7XX_KBR3, - D2_7XX_KBR4, - C2_7XX_KBC0, - D3_7XX_KBC1, - E4_7XX_KBC2, - F4_7XX_KBC3, - E3_7XX_KBC4, - - /* USB */ - AA17_7XX_USB_DM, - W16_7XX_USB_PU_EN, - W17_7XX_USB_VBUSI, - W18_7XX_USB_DMCK_OUT, - W19_7XX_USB_DCRST, - - /* MMC */ - MMC_7XX_CMD, - MMC_7XX_CLK, - MMC_7XX_DAT0, - - /* I2C */ - I2C_7XX_SCL, - I2C_7XX_SDA, - - /* SPI */ - SPI_7XX_1, - SPI_7XX_2, - SPI_7XX_3, - SPI_7XX_4, - SPI_7XX_5, - SPI_7XX_6, - - /* UART */ - UART_7XX_1, - UART_7XX_2, -}; - -enum omap1xxx_index { - /* UART1 (BT_UART_GATING)*/ - UART1_TX = 0, - UART1_RTS, - - /* UART2 (COM_UART_GATING)*/ - UART2_TX, - UART2_RX, - UART2_CTS, - UART2_RTS, - - /* UART3 (GIGA_UART_GATING) */ - UART3_TX, - UART3_RX, - UART3_CTS, - UART3_RTS, - UART3_CLKREQ, - UART3_BCLK, /* 12MHz clock out */ - Y15_1610_UART3_RTS, - - /* PWT & PWL */ - PWT, - PWL, - - /* USB master generic */ - R18_USB_VBUS, - R18_1510_USB_GPIO0, - W4_USB_PUEN, - W4_USB_CLKO, - W4_USB_HIGHZ, - W4_GPIO58, - - /* USB1 master */ - USB1_SUSP, - USB1_SEO, - W13_1610_USB1_SE0, - USB1_TXEN, - USB1_TXD, - USB1_VP, - USB1_VM, - USB1_RCV, - USB1_SPEED, - R13_1610_USB1_SPEED, - R13_1710_USB1_SE0, - - /* USB2 master */ - USB2_SUSP, - USB2_VP, - USB2_TXEN, - USB2_VM, - USB2_RCV, - USB2_SEO, - USB2_TXD, - - /* OMAP-1510 GPIO */ - R18_1510_GPIO0, - R19_1510_GPIO1, - M14_1510_GPIO2, - - /* OMAP1610 GPIO */ - P18_1610_GPIO3, - Y15_1610_GPIO17, - - /* OMAP-1710 GPIO */ - R18_1710_GPIO0, - V2_1710_GPIO10, - N21_1710_GPIO14, - W15_1710_GPIO40, - - /* MPUIO */ - MPUIO2, - N15_1610_MPUIO2, - MPUIO4, - MPUIO5, - T20_1610_MPUIO5, - W11_1610_MPUIO6, - V10_1610_MPUIO7, - W11_1610_MPUIO9, - V10_1610_MPUIO10, - W10_1610_MPUIO11, - E20_1610_MPUIO13, - U20_1610_MPUIO14, - E19_1610_MPUIO15, - - /* MCBSP2 */ - MCBSP2_CLKR, - MCBSP2_CLKX, - MCBSP2_DR, - MCBSP2_DX, - MCBSP2_FSR, - MCBSP2_FSX, - - /* MCBSP3 */ - MCBSP3_CLKX, - - /* Misc ballouts */ - BALLOUT_V8_ARMIO3, - N20_HDQ, - - /* OMAP-1610 MMC2 */ - W8_1610_MMC2_DAT0, - V8_1610_MMC2_DAT1, - W15_1610_MMC2_DAT2, - R10_1610_MMC2_DAT3, - Y10_1610_MMC2_CLK, - Y8_1610_MMC2_CMD, - V9_1610_MMC2_CMDDIR, - V5_1610_MMC2_DATDIR0, - W19_1610_MMC2_DATDIR1, - R18_1610_MMC2_CLKIN, - - /* OMAP-1610 External Trace Interface */ - M19_1610_ETM_PSTAT0, - L15_1610_ETM_PSTAT1, - L18_1610_ETM_PSTAT2, - L19_1610_ETM_D0, - J19_1610_ETM_D6, - J18_1610_ETM_D7, - - /* OMAP16XX GPIO */ - P20_1610_GPIO4, - V9_1610_GPIO7, - W8_1610_GPIO9, - N20_1610_GPIO11, - N19_1610_GPIO13, - P10_1610_GPIO22, - V5_1610_GPIO24, - AA20_1610_GPIO_41, - W19_1610_GPIO48, - M7_1610_GPIO62, - V14_16XX_GPIO37, - R9_16XX_GPIO18, - L14_16XX_GPIO49, - - /* OMAP-1610 uWire */ - V19_1610_UWIRE_SCLK, - U18_1610_UWIRE_SDI, - W21_1610_UWIRE_SDO, - N14_1610_UWIRE_CS0, - P15_1610_UWIRE_CS3, - N15_1610_UWIRE_CS1, - - /* OMAP-1610 SPI */ - U19_1610_SPIF_SCK, - U18_1610_SPIF_DIN, - P20_1610_SPIF_DIN, - W21_1610_SPIF_DOUT, - R18_1610_SPIF_DOUT, - N14_1610_SPIF_CS0, - N15_1610_SPIF_CS1, - T19_1610_SPIF_CS2, - P15_1610_SPIF_CS3, - - /* OMAP-1610 Flash */ - L3_1610_FLASH_CS2B_OE, - M8_1610_FLASH_CS2B_WE, - - /* First MMC */ - MMC_CMD, - MMC_DAT1, - MMC_DAT2, - MMC_DAT0, - MMC_CLK, - MMC_DAT3, - - /* OMAP-1710 MMC CMDDIR and DATDIR0 */ - M15_1710_MMC_CLKI, - P19_1710_MMC_CMDDIR, - P20_1710_MMC_DATDIR0, - - /* OMAP-1610 USB0 alternate pin configuration */ - W9_USB0_TXEN, - AA9_USB0_VP, - Y5_USB0_RCV, - R9_USB0_VM, - V6_USB0_TXD, - W5_USB0_SE0, - V9_USB0_SPEED, - V9_USB0_SUSP, - - /* USB2 */ - W9_USB2_TXEN, - AA9_USB2_VP, - Y5_USB2_RCV, - R9_USB2_VM, - V6_USB2_TXD, - W5_USB2_SE0, - - /* 16XX UART */ - R13_1610_UART1_TX, - V14_16XX_UART1_RX, - R14_1610_UART1_CTS, - AA15_1610_UART1_RTS, - R9_16XX_UART2_RX, - L14_16XX_UART3_RX, - - /* I2C OMAP-1610 */ - I2C_SCL, - I2C_SDA, - - /* Keypad */ - F18_1610_KBC0, - D20_1610_KBC1, - D19_1610_KBC2, - E18_1610_KBC3, - C21_1610_KBC4, - G18_1610_KBR0, - F19_1610_KBR1, - H14_1610_KBR2, - E20_1610_KBR3, - E19_1610_KBR4, - N19_1610_KBR5, - - /* Power management */ - T20_1610_LOW_PWR, - - /* MCLK Settings */ - V5_1710_MCLK_ON, - V5_1710_MCLK_OFF, - R10_1610_MCLK_ON, - R10_1610_MCLK_OFF, - - /* CompactFlash controller */ - P11_1610_CF_CD2, - R11_1610_CF_IOIS16, - V10_1610_CF_IREQ, - W10_1610_CF_RESET, - W11_1610_CF_CD1, - - /* parallel camera */ - J15_1610_CAM_LCLK, - J18_1610_CAM_D7, - J19_1610_CAM_D6, - J14_1610_CAM_D5, - K18_1610_CAM_D4, - K19_1610_CAM_D3, - K15_1610_CAM_D2, - K14_1610_CAM_D1, - L19_1610_CAM_D0, - L18_1610_CAM_VS, - L15_1610_CAM_HS, - M19_1610_CAM_RSTZ, - Y15_1610_CAM_OUTCLK, - - /* serial camera */ - H19_1610_CAM_EXCLK, - Y12_1610_CCP_CLKP, - W13_1610_CCP_CLKM, - W14_1610_CCP_DATAP, - Y14_1610_CCP_DATAM, - -}; - struct omap_mux_cfg { struct pin_config *pins; unsigned long size; @@ -429,11 +136,9 @@ struct omap_mux_cfg { /* setup pin muxing in Linux */ extern int omap1_mux_init(void); extern int omap_mux_register(struct omap_mux_cfg *); -extern int omap_cfg_reg(unsigned long reg_cfg); #else /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ static inline int omap1_mux_init(void) { return 0; } -static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } #endif extern int omap2_mux_init(void); diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h index 69daf0187b1d..22931839a666 100644 --- a/arch/arm/mach-omap1/soc.h +++ b/arch/arm/mach-omap1/soc.h @@ -1,4 +1,6 @@ /* - * We can move mach/soc.h here once the drivers are fixed + * We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed */ -#include +#include +#include +#include diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 79f43acf9acb..749d3cae15c0 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -35,7 +35,9 @@ #include #ifdef CONFIG_ARCH_OMAP1 -#include +#include +#include +#include #endif /* diff --git a/include/linux/soc/ti/omap1-io.h b/include/linux/soc/ti/omap1-io.h new file mode 100644 index 000000000000..9a60f45899d3 --- /dev/null +++ b/include/linux/soc/ti/omap1-io.h @@ -0,0 +1,143 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __ASM_ARCH_OMAP_IO_H +#define __ASM_ARCH_OMAP_IO_H + +#ifndef __ASSEMBLER__ +#include + +#ifdef CONFIG_ARCH_OMAP1 +/* + * NOTE: Please use ioremap + __raw_read/write where possible instead of these + */ +extern u8 omap_readb(u32 pa); +extern u16 omap_readw(u32 pa); +extern u32 omap_readl(u32 pa); +extern void omap_writeb(u8 v, u32 pa); +extern void omap_writew(u16 v, u32 pa); +extern void omap_writel(u32 v, u32 pa); +#elif defined(CONFIG_COMPILE_TEST) +static inline u8 omap_readb(u32 pa) { return 0; } +static inline u16 omap_readw(u32 pa) { return 0; } +static inline u32 omap_readl(u32 pa) { return 0; } +static inline void omap_writeb(u8 v, u32 pa) { } +static inline void omap_writew(u16 v, u32 pa) { } +static inline void omap_writel(u32 v, u32 pa) { } +#endif +#endif + +/* + * ---------------------------------------------------------------------------- + * System control registers + * ---------------------------------------------------------------------------- + */ +#define MOD_CONF_CTRL_0 0xfffe1080 +#define MOD_CONF_CTRL_1 0xfffe1110 + +/* + * --------------------------------------------------------------------------- + * UPLD + * --------------------------------------------------------------------------- + */ +#define ULPD_REG_BASE (0xfffe0800) +#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) +#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) +#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) +# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ +# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ +#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) +# define SOFT_UDC_REQ (1 << 4) +# define SOFT_USB_CLK_REQ (1 << 3) +# define SOFT_DPLL_REQ (1 << 0) +#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) +#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) +#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) +#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) +#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) +# define DIS_MMC2_DPLL_REQ (1 << 11) +# define DIS_MMC1_DPLL_REQ (1 << 10) +# define DIS_UART3_DPLL_REQ (1 << 9) +# define DIS_UART2_DPLL_REQ (1 << 8) +# define DIS_UART1_DPLL_REQ (1 << 7) +# define DIS_USB_HOST_DPLL_REQ (1 << 6) +#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) +#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) + +/* + * ---------------------------------------------------------------------------- + * Clocks + * ---------------------------------------------------------------------------- + */ +#define CLKGEN_REG_BASE (0xfffece00) +#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) +#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) +#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) +#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) +#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) +#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) +#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) +#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) + +#define CK_RATEF 1 +#define CK_IDLEF 2 +#define CK_ENABLEF 4 +#define CK_SELECTF 8 +#define SETARM_IDLE_SHIFT + +/* DPLL control registers */ +#define DPLL_CTL (0xfffecf00) + +/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ +#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) +#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) +#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) +#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) +#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) + +/* + * ---------------------------------------------------------------------------- + * Pulse-Width Light + * ---------------------------------------------------------------------------- + */ +#define OMAP_PWL_BASE 0xfffb5800 +#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) +#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) + +/* + * ---------------------------------------------------------------------------- + * Pin multiplexing registers + * ---------------------------------------------------------------------------- + */ +#define FUNC_MUX_CTRL_0 0xfffe1000 +#define FUNC_MUX_CTRL_1 0xfffe1004 +#define FUNC_MUX_CTRL_2 0xfffe1008 +#define COMP_MODE_CTRL_0 0xfffe100c +#define FUNC_MUX_CTRL_3 0xfffe1010 +#define FUNC_MUX_CTRL_4 0xfffe1014 +#define FUNC_MUX_CTRL_5 0xfffe1018 +#define FUNC_MUX_CTRL_6 0xfffe101C +#define FUNC_MUX_CTRL_7 0xfffe1020 +#define FUNC_MUX_CTRL_8 0xfffe1024 +#define FUNC_MUX_CTRL_9 0xfffe1028 +#define FUNC_MUX_CTRL_A 0xfffe102C +#define FUNC_MUX_CTRL_B 0xfffe1030 +#define FUNC_MUX_CTRL_C 0xfffe1034 +#define FUNC_MUX_CTRL_D 0xfffe1038 +#define PULL_DWN_CTRL_0 0xfffe1040 +#define PULL_DWN_CTRL_1 0xfffe1044 +#define PULL_DWN_CTRL_2 0xfffe1048 +#define PULL_DWN_CTRL_3 0xfffe104c +#define PULL_DWN_CTRL_4 0xfffe10ac + +/* OMAP-1610 specific multiplexing registers */ +#define FUNC_MUX_CTRL_E 0xfffe1090 +#define FUNC_MUX_CTRL_F 0xfffe1094 +#define FUNC_MUX_CTRL_10 0xfffe1098 +#define FUNC_MUX_CTRL_11 0xfffe109c +#define FUNC_MUX_CTRL_12 0xfffe10a0 +#define PU_PD_SEL_0 0xfffe10b4 +#define PU_PD_SEL_1 0xfffe10b8 +#define PU_PD_SEL_2 0xfffe10bc +#define PU_PD_SEL_3 0xfffe10c0 +#define PU_PD_SEL_4 0xfffe10c4 + +#endif diff --git a/include/linux/soc/ti/omap1-mux.h b/include/linux/soc/ti/omap1-mux.h new file mode 100644 index 000000000000..59c239b5569c --- /dev/null +++ b/include/linux/soc/ti/omap1-mux.h @@ -0,0 +1,311 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef __SOC_TI_OMAP1_MUX_H +#define __SOC_TI_OMAP1_MUX_H +/* + * This should not really be a global header, it reflects the + * traditional way that omap1 does pin muxing without the + * pinctrl subsystem. + */ + +enum omap7xx_index { + /* OMAP 730 keyboard */ + E2_7XX_KBR0, + J7_7XX_KBR1, + E1_7XX_KBR2, + F3_7XX_KBR3, + D2_7XX_KBR4, + C2_7XX_KBC0, + D3_7XX_KBC1, + E4_7XX_KBC2, + F4_7XX_KBC3, + E3_7XX_KBC4, + + /* USB */ + AA17_7XX_USB_DM, + W16_7XX_USB_PU_EN, + W17_7XX_USB_VBUSI, + W18_7XX_USB_DMCK_OUT, + W19_7XX_USB_DCRST, + + /* MMC */ + MMC_7XX_CMD, + MMC_7XX_CLK, + MMC_7XX_DAT0, + + /* I2C */ + I2C_7XX_SCL, + I2C_7XX_SDA, + + /* SPI */ + SPI_7XX_1, + SPI_7XX_2, + SPI_7XX_3, + SPI_7XX_4, + SPI_7XX_5, + SPI_7XX_6, + + /* UART */ + UART_7XX_1, + UART_7XX_2, +}; + +enum omap1xxx_index { + /* UART1 (BT_UART_GATING)*/ + UART1_TX = 0, + UART1_RTS, + + /* UART2 (COM_UART_GATING)*/ + UART2_TX, + UART2_RX, + UART2_CTS, + UART2_RTS, + + /* UART3 (GIGA_UART_GATING) */ + UART3_TX, + UART3_RX, + UART3_CTS, + UART3_RTS, + UART3_CLKREQ, + UART3_BCLK, /* 12MHz clock out */ + Y15_1610_UART3_RTS, + + /* PWT & PWL */ + PWT, + PWL, + + /* USB master generic */ + R18_USB_VBUS, + R18_1510_USB_GPIO0, + W4_USB_PUEN, + W4_USB_CLKO, + W4_USB_HIGHZ, + W4_GPIO58, + + /* USB1 master */ + USB1_SUSP, + USB1_SEO, + W13_1610_USB1_SE0, + USB1_TXEN, + USB1_TXD, + USB1_VP, + USB1_VM, + USB1_RCV, + USB1_SPEED, + R13_1610_USB1_SPEED, + R13_1710_USB1_SE0, + + /* USB2 master */ + USB2_SUSP, + USB2_VP, + USB2_TXEN, + USB2_VM, + USB2_RCV, + USB2_SEO, + USB2_TXD, + + /* OMAP-1510 GPIO */ + R18_1510_GPIO0, + R19_1510_GPIO1, + M14_1510_GPIO2, + + /* OMAP1610 GPIO */ + P18_1610_GPIO3, + Y15_1610_GPIO17, + + /* OMAP-1710 GPIO */ + R18_1710_GPIO0, + V2_1710_GPIO10, + N21_1710_GPIO14, + W15_1710_GPIO40, + + /* MPUIO */ + MPUIO2, + N15_1610_MPUIO2, + MPUIO4, + MPUIO5, + T20_1610_MPUIO5, + W11_1610_MPUIO6, + V10_1610_MPUIO7, + W11_1610_MPUIO9, + V10_1610_MPUIO10, + W10_1610_MPUIO11, + E20_1610_MPUIO13, + U20_1610_MPUIO14, + E19_1610_MPUIO15, + + /* MCBSP2 */ + MCBSP2_CLKR, + MCBSP2_CLKX, + MCBSP2_DR, + MCBSP2_DX, + MCBSP2_FSR, + MCBSP2_FSX, + + /* MCBSP3 */ + MCBSP3_CLKX, + + /* Misc ballouts */ + BALLOUT_V8_ARMIO3, + N20_HDQ, + + /* OMAP-1610 MMC2 */ + W8_1610_MMC2_DAT0, + V8_1610_MMC2_DAT1, + W15_1610_MMC2_DAT2, + R10_1610_MMC2_DAT3, + Y10_1610_MMC2_CLK, + Y8_1610_MMC2_CMD, + V9_1610_MMC2_CMDDIR, + V5_1610_MMC2_DATDIR0, + W19_1610_MMC2_DATDIR1, + R18_1610_MMC2_CLKIN, + + /* OMAP-1610 External Trace Interface */ + M19_1610_ETM_PSTAT0, + L15_1610_ETM_PSTAT1, + L18_1610_ETM_PSTAT2, + L19_1610_ETM_D0, + J19_1610_ETM_D6, + J18_1610_ETM_D7, + + /* OMAP16XX GPIO */ + P20_1610_GPIO4, + V9_1610_GPIO7, + W8_1610_GPIO9, + N20_1610_GPIO11, + N19_1610_GPIO13, + P10_1610_GPIO22, + V5_1610_GPIO24, + AA20_1610_GPIO_41, + W19_1610_GPIO48, + M7_1610_GPIO62, + V14_16XX_GPIO37, + R9_16XX_GPIO18, + L14_16XX_GPIO49, + + /* OMAP-1610 uWire */ + V19_1610_UWIRE_SCLK, + U18_1610_UWIRE_SDI, + W21_1610_UWIRE_SDO, + N14_1610_UWIRE_CS0, + P15_1610_UWIRE_CS3, + N15_1610_UWIRE_CS1, + + /* OMAP-1610 SPI */ + U19_1610_SPIF_SCK, + U18_1610_SPIF_DIN, + P20_1610_SPIF_DIN, + W21_1610_SPIF_DOUT, + R18_1610_SPIF_DOUT, + N14_1610_SPIF_CS0, + N15_1610_SPIF_CS1, + T19_1610_SPIF_CS2, + P15_1610_SPIF_CS3, + + /* OMAP-1610 Flash */ + L3_1610_FLASH_CS2B_OE, + M8_1610_FLASH_CS2B_WE, + + /* First MMC */ + MMC_CMD, + MMC_DAT1, + MMC_DAT2, + MMC_DAT0, + MMC_CLK, + MMC_DAT3, + + /* OMAP-1710 MMC CMDDIR and DATDIR0 */ + M15_1710_MMC_CLKI, + P19_1710_MMC_CMDDIR, + P20_1710_MMC_DATDIR0, + + /* OMAP-1610 USB0 alternate pin configuration */ + W9_USB0_TXEN, + AA9_USB0_VP, + Y5_USB0_RCV, + R9_USB0_VM, + V6_USB0_TXD, + W5_USB0_SE0, + V9_USB0_SPEED, + V9_USB0_SUSP, + + /* USB2 */ + W9_USB2_TXEN, + AA9_USB2_VP, + Y5_USB2_RCV, + R9_USB2_VM, + V6_USB2_TXD, + W5_USB2_SE0, + + /* 16XX UART */ + R13_1610_UART1_TX, + V14_16XX_UART1_RX, + R14_1610_UART1_CTS, + AA15_1610_UART1_RTS, + R9_16XX_UART2_RX, + L14_16XX_UART3_RX, + + /* I2C OMAP-1610 */ + I2C_SCL, + I2C_SDA, + + /* Keypad */ + F18_1610_KBC0, + D20_1610_KBC1, + D19_1610_KBC2, + E18_1610_KBC3, + C21_1610_KBC4, + G18_1610_KBR0, + F19_1610_KBR1, + H14_1610_KBR2, + E20_1610_KBR3, + E19_1610_KBR4, + N19_1610_KBR5, + + /* Power management */ + T20_1610_LOW_PWR, + + /* MCLK Settings */ + V5_1710_MCLK_ON, + V5_1710_MCLK_OFF, + R10_1610_MCLK_ON, + R10_1610_MCLK_OFF, + + /* CompactFlash controller */ + P11_1610_CF_CD2, + R11_1610_CF_IOIS16, + V10_1610_CF_IREQ, + W10_1610_CF_RESET, + W11_1610_CF_CD1, + + /* parallel camera */ + J15_1610_CAM_LCLK, + J18_1610_CAM_D7, + J19_1610_CAM_D6, + J14_1610_CAM_D5, + K18_1610_CAM_D4, + K19_1610_CAM_D3, + K15_1610_CAM_D2, + K14_1610_CAM_D1, + L19_1610_CAM_D0, + L18_1610_CAM_VS, + L15_1610_CAM_HS, + M19_1610_CAM_RSTZ, + Y15_1610_CAM_OUTCLK, + + /* serial camera */ + H19_1610_CAM_EXCLK, + Y12_1610_CCP_CLKP, + W13_1610_CCP_CLKM, + W14_1610_CCP_DATAP, + Y14_1610_CCP_DATAM, + +}; + +#ifdef CONFIG_OMAP_MUX +extern int omap_cfg_reg(unsigned long reg_cfg); +#else +static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } +#endif + +#endif diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/include/linux/soc/ti/omap1-soc.h similarity index 90% rename from arch/arm/mach-omap1/include/mach/soc.h rename to include/linux/soc/ti/omap1-soc.h index 1897cbabfc93..81008d400bb6 100644 --- a/arch/arm/mach-omap1/include/mach/soc.h +++ b/include/linux/soc/ti/omap1-soc.h @@ -14,14 +14,6 @@ #ifndef __ASM_ARCH_OMAP_CPU_H #define __ASM_ARCH_OMAP_CPU_H -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include - /* * Test if multicore OMAP support is needed */ @@ -176,20 +168,7 @@ IS_OMAP_TYPE(1710, 0x1710) #define cpu_is_omap1621() 0 #define cpu_is_omap1710() 0 -/* These are needed to compile common code */ -#ifdef CONFIG_ARCH_OMAP1 -#define cpu_is_omap242x() 0 -#define cpu_is_omap2430() 0 -#define cpu_is_omap243x() 0 -#define cpu_is_omap24xx() 0 -#define cpu_is_omap34xx() 0 -#define cpu_is_omap44xx() 0 -#define soc_is_omap54xx() 0 -#define soc_is_dra7xx() 0 -#define soc_is_am33xx() 0 #define cpu_class_is_omap1() 1 -#define cpu_class_is_omap2() 0 -#endif /* * Whether we have MULTI_OMAP1 or not, we still need to distinguish @@ -216,5 +195,4 @@ IS_OMAP_TYPE(1710, 0x1710) # define cpu_is_omap1710() is_omap1710() #endif -#endif /* __ASSEMBLY__ */ #endif From patchwork Thu Aug 8 21:22:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084795 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8370114DB for ; Thu, 8 Aug 2019 21:29:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71B2928AB7 for ; Thu, 8 Aug 2019 21:29:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 642A328BAB; Thu, 8 Aug 2019 21:29:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 110C928AB7 for ; Thu, 8 Aug 2019 21:29:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404191AbfHHV3O (ORCPT ); Thu, 8 Aug 2019 17:29:14 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:51859 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404251AbfHHV3O (ORCPT ); Thu, 8 Aug 2019 17:29:14 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mxpqo-1iF0VT3dks-00zD7L; Thu, 08 Aug 2019 23:28:57 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Mark Brown Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , Boris Brezillon , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 07/22] ARM: omap1: move perseus spi pinconf to board file Date: Thu, 8 Aug 2019 23:22:16 +0200 Message-Id: <20190808212234.2213262-8-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:OUywYjmUvR4CggfZfvVTBOs6Wqw61X7ANdp+0I65+P8MCPSSa41 5GvGcAmYjU2DGOzqYVYCAn/KSoqrC1TXd4CnESq/PgpAi3GqLbpTe3IptCS8caaxMlQ7MWB qspivVS8oe8TFvFiGP+yhn+TNtbQ31DZqvBQMB8LsgaAzHiS6rwCdV2Wa5fHzpxxGDK29H2 oVjrpRiT3l+OAdxjzkEqg== X-UI-Out-Filterresults: notjunk:1;V03:K0:HTgsHXt4VYg=:wv/3Tz08gC4O1xmYtn1lnv 0DQVchC6pJEpqwK+9CzLoTkrnBsAxE7wZ+elRXgafIIObsfCNN/YIgTQ1GdzAShuaQlhVUAiI x2put5/QNp+CQKco+ufIo3WHRGRBqey6WIpXX3I0vYqr5zrSFImTvDEr26dWXewa8Mge4eIl9 1zandRW0JCIG0L7TtDX6UFCokfvoWtQFPzY3zsIR/U9cFbYboSkaJl1xb6m8LmTMz1Fy+r3Xo 3IxwAXhdJ539LXs1RLtojMfFqgTVwmfhY2aiC4Mu1N4VhBJRVMUU39ySLQZi7LVc/eOT7qiOt mbUIg0pOs3W84yVSI/V/2eEOCoxIhMCWtiQ8UYSmcrk3HumNFJCiB0TJn2lnbrIByn4XAm24E WznZoc38kwirw1rzqsFaDVwfSRvHkB5IOK392edCP0d7AgSYWCrBKpTvLVWew9EfVojJI/WHc 2mVDRcJiU4P/xzA3rN8j7ED727y6zXc0KrWLV+OLt27wntOZxNuwOIjm9oDiicsH1bvFm7OUC SNkSxxwqlJeNQXllVKUrLsRfTT5UGPZIqVy5go2ubH3J6RHBC1w0pP+0w5WqBW8Cm89usEALa iKtMuH4jjEzc/yH9jf4lu9GQ05158U+qlSFKhqq27BtihJNJhdr4cG8OTguF49oF/z3GoUZbz 0zk3AiGWMmw/7SdHAJ8JjCbDR6tL1hq0xnwyrGxON2pNn9j7RW51LxD6sg3MZJxWqMNYZ+1WU sY7/qqbeEDI/viciS0gwy5RjMHG7ffieopLw0A== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The driver has always had a FIXME about this, and it seems like this trivial code move avoids a mach header inclusion, so just do it. With that out of the way, and the header file inclusions changed to global files, the driver can also be compile-tested on other platforms. Signed-off-by: Arnd Bergmann Acked-by: Mark Brown --- arch/arm/mach-omap1/board-perseus2.c | 6 ++++++ drivers/spi/Kconfig | 2 +- drivers/spi/spi-omap-uwire.c | 15 +++------------ 3 files changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 1aeeb7337d29..da0155107d85 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -289,6 +289,12 @@ static void __init omap_perseus2_init(void) omap_cfg_reg(F4_7XX_KBC3); omap_cfg_reg(E3_7XX_KBC4); + if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) { + /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ + int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; + omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); + } + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_serial_init(); diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 949b18ed9d6b..4e67c155229e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -464,7 +464,7 @@ config SPI_OCTEON config SPI_OMAP_UWIRE tristate "OMAP1 MicroWire" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || (ARM && COMPILE_TEST) select SPI_BITBANG help This hooks up to the MicroWire controller on OMAP1 chips. diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index ce8dbdbce312..278d42a2ec49 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -44,13 +44,10 @@ #include #include -#include #include - -#include - -#include /* OMAP7XX_IO_CONF registers */ - +#include +#include +#include /* FIXME address is now a platform device resource, * and irqs should show there too... @@ -541,12 +538,6 @@ static int __init omap_uwire_init(void) omap_cfg_reg(N14_1610_UWIRE_CS0); omap_cfg_reg(N15_1610_UWIRE_CS1); } - if (machine_is_omap_perseus2()) { - /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ - int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; - omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); - } - return platform_driver_register(&uwire_driver); } From patchwork Thu Aug 8 21:22:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084801 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B8C901709 for ; Thu, 8 Aug 2019 21:30:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A55D528AB7 for ; Thu, 8 Aug 2019 21:30:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 95A1828AF4; Thu, 8 Aug 2019 21:30:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1644928BAB for ; Thu, 8 Aug 2019 21:30:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390430AbfHHVaH (ORCPT ); Thu, 8 Aug 2019 17:30:07 -0400 Received: from mout.kundenserver.de ([212.227.126.134]:59461 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729780AbfHHVaH (ORCPT ); Thu, 8 Aug 2019 17:30:07 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1M3VAI-1hwOCu3Lmc-000coR; Thu, 08 Aug 2019 23:29:38 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Dominik Brodowski Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 08/22] ARM: omap1: move CF chipselect setup to board file Date: Thu, 8 Aug 2019 23:22:17 +0200 Message-Id: <20190808212234.2213262-9-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:RnYUAFwmM2m8m3O3+HxSSuGDaMoTlH+cBY3+Em0tOAfUOFvgiWl DGMc8fUF062WVjG28ZUaUjq8Rg2rNw40pVJ58L5chj9rpHv7J9L6TBrJIbFnL2h5o1QXtr+ N1LXPAFl2IyKboH9pXfEpzkQKV8H24+tFDXlUzWzf7JVy+Fjg4ifDix1Jwg3YkZHCkarvJT lUbx971y+k3+es6cqk4IQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:3VR5CSysz1I=:iP2/yKLl57ITrfMx5hjul6 Bha0XcVmbYovcD/iBBKCj1uzDy6KT6vwjB4AwlmFrHTUgLY8BZ9tMa4Ik7mrU7uwssU8dIisD hsTQV37EhUVgQdj5dgWluuFjcN3+pa0+qH8W6b5QTm5+wheWeI/mTSjcDhLxfQNnE5M27rAoN 6w5kFCm9zXloTf7MTln36UQhMBuBD6KtIy/qB9QqAkBv6VgyfYm4eSf+fZnxuOr9ySD3fXtxq gzhLRHVOq5nbGPWiTU3CdSzJNL9vEYA/k+TyRbOGjMysq24f1xzKvsQXGTnozTh1iOoAV0UN1 nfg991BHUM03zZIqEM95pXgK9tQmmT8B+0FLs/JLIZAwRASO+7qWrnAhW3lrbgcqIHipijx3u u1Iwn6jv+L0/O+2PC7Lm1XH57FCtrqKSc/stl7FR+4o5GeSWmMXogqHTBETKwdGIllisM869y +Ivw/KTqHMoHIyoHfAmV7FOx4KLiohSYfUsdZnaEMwzi/sipZ58arT/gYewDn9Lg2nq3F2u+2 80KDfRMKJtWwoF/0bYnvEudR4BUgBsigLclTvrYtOMpTkK0LA/5GuKjikcV63LsE6SwjMOuaW Zh6xUwqQTt98d4Sui0D7PxTTOOxySM2Ra1SL0fUEGqJEMs86urCOWEVa4Bc9L/Xfk+5Ko5cAq LSrjWl+ZK+HnowMJwtfwlKxQ+lNLoHCvP5dKyjDiWHgSlPIz0yfWER7OdqfmoBiqTsDYvi7zs 28RqK/XWNHaas+ei7eQnVMT0HLgv3qFs9OwM9Q== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is only one board that uses the omap_cf driver, so moving the chipselect configuration there does not lead to code duplication but avoids the use of mach/tc.h in drivers. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-osk.c | 38 ++++++++++++++++++++++++++++----- drivers/pcmcia/Kconfig | 3 ++- drivers/pcmcia/omap_cf.c | 38 ++++++--------------------------- 3 files changed, 42 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 99ebe4503787..38d73da5d13d 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -149,14 +149,14 @@ static struct resource osk5912_cf_resources[] = { [0] = { .flags = IORESOURCE_IRQ, }, + [1] = { + .flags = IORESOURCE_MEM, + }, }; static struct platform_device osk5912_cf_device = { .name = "omap_cf", .id = -1, - .dev = { - .platform_data = (void *) 2 /* CS2 */, - }, .num_resources = ARRAY_SIZE(osk5912_cf_resources), .resource = osk5912_cf_resources, }; @@ -267,13 +267,41 @@ static void __init osk_init_smc91x(void) omap_writel(l, EMIFS_CCS(1)); } -static void __init osk_init_cf(void) +static void __init osk_init_cf(int seg) { + struct resource *res = &osk5912_cf_resources[1]; + omap_cfg_reg(M7_1610_GPIO62); if ((gpio_request(62, "cf_irq")) < 0) { printk("Error requesting gpio 62 for CF irq\n"); return; } + + switch (seg) { + /* NOTE: CS0 could be configured too ... */ + case 1: + res->start = OMAP_CS1_PHYS; + break; + case 2: + res->start = OMAP_CS2_PHYS; + break; + case 3: + res->start = omap_cs3_phys(); + break; + } + + res->end = res->start + SZ_8K - 1; + osk5912_cf_device.dev.platform_data = (void *)(uintptr_t)seg; + + /* NOTE: better EMIFS setup might support more cards; but the + * TRM only shows how to affect regular flash signals, not their + * CF/PCMCIA variants... + */ + pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", __func__, + seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); + omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ + omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ + /* the CF I/O IRQ is really active-low */ irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } @@ -577,7 +605,7 @@ static void __init osk_init(void) u32 l; osk_init_smc91x(); - osk_init_cf(); + osk_init_cf(2); /* CS2 */ /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index e004d8da03dc..ca6e2ac2a92f 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -250,7 +250,8 @@ config PCMCIA_VRC4173 config OMAP_CF tristate "OMAP CompactFlash Controller" - depends on PCMCIA && ARCH_OMAP16XX + depends on PCMCIA + depends on ARCH_OMAP16XX || (ARM && COMPILE_TEST) help Say Y here to support the CompactFlash controller on OMAP. Note that this doesn't support "True IDE" mode. diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c index 0a04eb04f3a2..98df6473034d 100644 --- a/drivers/pcmcia/omap_cf.c +++ b/drivers/pcmcia/omap_cf.c @@ -16,13 +16,12 @@ #include -#include #include #include -#include -#include - +#include +#include +#include /* NOTE: don't expect this to support many I/O cards. The 16xx chips have * hard-wired timings to support Compact Flash memory cards; they won't work @@ -205,6 +204,7 @@ static int __init omap_cf_probe(struct platform_device *pdev) struct omap_cf_socket *cf; int irq; int status; + struct resource *res; seg = (int) pdev->dev.platform_data; if (seg == 0 || seg > 3) @@ -215,6 +215,8 @@ static int __init omap_cf_probe(struct platform_device *pdev) if (irq < 0) return -EINVAL; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + cf = kzalloc(sizeof *cf, GFP_KERNEL); if (!cf) return -ENOMEM; @@ -230,24 +232,7 @@ static int __init omap_cf_probe(struct platform_device *pdev) goto fail0; cf->irq = irq; cf->socket.pci_irq = irq; - - switch (seg) { - /* NOTE: CS0 could be configured too ... */ - case 1: - cf->phys_cf = OMAP_CS1_PHYS; - break; - case 2: - cf->phys_cf = OMAP_CS2_PHYS; - break; - case 3: - cf->phys_cf = omap_cs3_phys(); - break; - default: - goto fail1; - } - cf->iomem.start = cf->phys_cf; - cf->iomem.end = cf->iomem.end + SZ_8K - 1; - cf->iomem.flags = IORESOURCE_MEM; + cf->phys_cf = res->start; /* pcmcia layer only remaps "real" memory */ cf->socket.io_offset = (unsigned long) @@ -269,15 +254,6 @@ static int __init omap_cf_probe(struct platform_device *pdev) pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); - /* NOTE: better EMIFS setup might support more cards; but the - * TRM only shows how to affect regular flash signals, not their - * CF/PCMCIA variants... - */ - pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, - seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); - omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ - omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ - /* CF uses armxor_ck, which is "always" available */ pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, From patchwork Thu Aug 8 21:22:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084807 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA9E91709 for ; Thu, 8 Aug 2019 21:31:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CB26928BCD for ; Thu, 8 Aug 2019 21:31:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BEF4228BAB; Thu, 8 Aug 2019 21:31:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48B8728BCE for ; Thu, 8 Aug 2019 21:31:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733295AbfHHVbR (ORCPT ); Thu, 8 Aug 2019 17:31:17 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:42593 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728020AbfHHVbR (ORCPT ); Thu, 8 Aug 2019 17:31:17 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MRVy9-1hhrWF2GCz-00NOKO; Thu, 08 Aug 2019 23:30:54 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Lee Jones , Daniel Thompson , Jingoo Han , Bartlomiej Zolnierkiewicz Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Tomi Valkeinen , Arnd Bergmann , dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/22] fbdev: omap: avoid using mach/*.h files Date: Thu, 8 Aug 2019 23:22:18 +0200 Message-Id: <20190808212234.2213262-10-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:88szA/Fo8mKxxZtSI6a/3DryoEp3R0RLjKS0a4qc6cmQ6XF/WLN W6t9LZZrLHyweQaVq4It4vpP6q85bngaTLNjJhSu5Zs2FGsc54mk16/FUff6KabydJOjjCe gSmfFkLusQj3C1K+t2nV3Wqk3CMDq1pgtV+FfUcRXuvH8yvWc3/+WkYXaDaoJQ/KokIL5Gr xffTou6CcBEBFvrAC7+Ag== X-UI-Out-Filterresults: notjunk:1;V03:K0:6N8ZFBB2B8Y=:wwhyQ2dKFdjd+6txhxm6GB r5EWrXStpxQkas/tMQjlyNgIuWpDTVEGNewKIx4571rKYanefuhEZP0pD3j2pjFRdNzg5UgW+ IW7CzqHLPdUm85HJLglUX7OqEOcVEbgGAI1kCxHvXS1uOvbmi7D2v1c7w/yFoBi+vwWVS8LMC aDov4Mh+N2gS8ZThs48vRk+9QD7cxwEEL8X/KY9uzByDaCWMzl/TCZ3Jh6fDzEz8gLit7wkEv 4JZLpB3hartGRTwG+xBsKnN88mk4uf/CDeVnuk7PPbUHKr24BUHqNIqEZL5xsH6QHc5aAR7Hz gRGxaUH6+xvfrWQsKR+4BVWyHEWi3DK7jRLdTDHoA9G0e9QOSV2qwxXqDKyLbuYsjUKFLnRLR HnxedBZ1eZoQXa7u0JGSC3gTvrZODSrSNLszP37JOJu5YYZ2Xk3Z/89TeOGvfjXQHd+pY3I+a qgQxEoY3gquwky6+fW1cac+0CMNSLt0rLsz4B/FSaOPcpddCWCFi7g56CFoGYRWStLTdMI3ku VsedmQ+8yonko1eXRZbay8pU8N/GF4B7zrZKut9GQYn0tU3zh3gak2KJPmQQ3rxDT2ay263OF GKprQYzYiToguAEYLSmF0fj+PvLCyShLqvTE0X9bwMYJ74sQrNCo7ua2Qs9aDs+Lb4jZ8A34Q g6EE4OlJUTq14Pq3PRMnoKSvhNov8EeS6ihQ6jSwX2ds7twSs2Uvp3NvVraWllP7kdtbLG4ZL CY7+25N0BR2fUkAk9y/nUxS35Oa1K3St34qBFQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP All the headers we actually need are now in include/linux/soc, so use those versions instead and allow compile-testing on other architectures. Signed-off-by: Arnd Bergmann Acked-by: Bartlomiej Zolnierkiewicz --- drivers/video/backlight/Kconfig | 4 ++-- drivers/video/backlight/omap1_bl.c | 4 ++-- drivers/video/fbdev/omap/Kconfig | 4 ++-- drivers/video/fbdev/omap/lcd_ams_delta.c | 2 +- drivers/video/fbdev/omap/lcd_dma.c | 3 ++- drivers/video/fbdev/omap/lcd_inn1510.c | 2 +- drivers/video/fbdev/omap/lcd_osk.c | 4 ++-- drivers/video/fbdev/omap/lcdc.c | 2 ++ drivers/video/fbdev/omap/omapfb_main.c | 3 +-- drivers/video/fbdev/omap/sossi.c | 1 + 10 files changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 8b081d61773e..195c71130827 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -213,8 +213,8 @@ config BACKLIGHT_LOCOMO config BACKLIGHT_OMAP1 tristate "OMAP1 PWL-based LCD Backlight" - depends on ARCH_OMAP1 - default y + depends on ARCH_OMAP1 || COMPILE_TEST + default ARCH_OMAP1 help This driver controls the LCD backlight level and power for the PWL module of OMAP1 processors. Say Y if your board diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c index 74263021b1b3..69a49384b3de 100644 --- a/drivers/video/backlight/omap1_bl.c +++ b/drivers/video/backlight/omap1_bl.c @@ -14,8 +14,8 @@ #include #include -#include -#include +#include +#include #define OMAPBL_MAX_INTENSITY 0xff diff --git a/drivers/video/fbdev/omap/Kconfig b/drivers/video/fbdev/omap/Kconfig index df2a5d0d4aa2..b1786cf1b486 100644 --- a/drivers/video/fbdev/omap/Kconfig +++ b/drivers/video/fbdev/omap/Kconfig @@ -2,7 +2,7 @@ config FB_OMAP tristate "OMAP frame buffer support" depends on FB - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || (ARM && COMPILE_TEST) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -42,7 +42,7 @@ config FB_OMAP_LCD_MIPID config FB_OMAP_LCD_H3 bool "TPS65010 LCD controller on OMAP-H3" - depends on MACH_OMAP_H3 + depends on MACH_OMAP_H3 || COMPILE_TEST depends on TPS65010=y default y help diff --git a/drivers/video/fbdev/omap/lcd_ams_delta.c b/drivers/video/fbdev/omap/lcd_ams_delta.c index 8e54aae544a0..da2e32615abe 100644 --- a/drivers/video/fbdev/omap/lcd_ams_delta.c +++ b/drivers/video/fbdev/omap/lcd_ams_delta.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include "omapfb.h" diff --git a/drivers/video/fbdev/omap/lcd_dma.c b/drivers/video/fbdev/omap/lcd_dma.c index 867a63c06f42..f85817635a8c 100644 --- a/drivers/video/fbdev/omap/lcd_dma.c +++ b/drivers/video/fbdev/omap/lcd_dma.c @@ -25,7 +25,8 @@ #include -#include +#include +#include #include "lcdc.h" #include "lcd_dma.h" diff --git a/drivers/video/fbdev/omap/lcd_inn1510.c b/drivers/video/fbdev/omap/lcd_inn1510.c index 37ed0c14aa5a..bb915637e9b6 100644 --- a/drivers/video/fbdev/omap/lcd_inn1510.c +++ b/drivers/video/fbdev/omap/lcd_inn1510.c @@ -10,7 +10,7 @@ #include #include -#include +#include #include "omapfb.h" diff --git a/drivers/video/fbdev/omap/lcd_osk.c b/drivers/video/fbdev/omap/lcd_osk.c index 5d5762128c8d..8168ba0d47fd 100644 --- a/drivers/video/fbdev/omap/lcd_osk.c +++ b/drivers/video/fbdev/omap/lcd_osk.c @@ -11,8 +11,8 @@ #include #include -#include -#include +#include +#include #include "omapfb.h" diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c index 65953b7fbdb9..3af758f12afd 100644 --- a/drivers/video/fbdev/omap/lcdc.c +++ b/drivers/video/fbdev/omap/lcdc.c @@ -17,6 +17,8 @@ #include #include +#include +#include #include #include diff --git a/drivers/video/fbdev/omap/omapfb_main.c b/drivers/video/fbdev/omap/omapfb_main.c index dc06057de91d..af73a3f9ac53 100644 --- a/drivers/video/fbdev/omap/omapfb_main.c +++ b/drivers/video/fbdev/omap/omapfb_main.c @@ -19,8 +19,7 @@ #include -#include - +#include #include "omapfb.h" #include "lcdc.h" diff --git a/drivers/video/fbdev/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c index ade9d452254c..6b99d89fbe6e 100644 --- a/drivers/video/fbdev/omap/sossi.c +++ b/drivers/video/fbdev/omap/sossi.c @@ -13,6 +13,7 @@ #include #include +#include #include "omapfb.h" #include "lcd_dma.h" From patchwork Thu Aug 8 21:22:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084813 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D3BE746 for ; Thu, 8 Aug 2019 21:32:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0DF6528BA9 for ; Thu, 8 Aug 2019 21:32:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 01EB928BCE; Thu, 8 Aug 2019 21:32:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 98F9128BA9 for ; Thu, 8 Aug 2019 21:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728020AbfHHVcD (ORCPT ); Thu, 8 Aug 2019 17:32:03 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:43579 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390151AbfHHVcD (ORCPT ); Thu, 8 Aug 2019 17:32:03 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MOm9H-1hgDtV07kV-00Q9Tu; Thu, 08 Aug 2019 23:31:38 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Felipe Balbi , Greg Kroah-Hartman , Alan Stern Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/22] usb: omap: avoid mach/*.h headers Date: Thu, 8 Aug 2019 23:22:19 +0200 Message-Id: <20190808212234.2213262-11-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:K8p91cbBYQ5A6juVoYtAsHFWMTNlYAsjgZ8+WIV+MCLOAHAN+bI 9MmlQhFN1ZowAxZ2w9fUiyN+IDd8DmdzaDEwPUwTeCdhZom/wIlrusHmEAlUofR52EyMf+e 5eRWH1Am5fD3Nt9jU6lvvx7GI4Ud+CVsUuDyp00MS9K9a9/2I83Ahg4E5lqMvM2KP7M60r4 v1lqaRtJAhI5kuZaXg0tA== X-UI-Out-Filterresults: notjunk:1;V03:K0:d64A3weE10U=:stpqXJN3P6K37+8vT1wNmi w2ZB0cYFfx2bIMi755d558sXZJ4Ikum1Pc5j7XFqiKdcZlsJLE4aR4MdO72rRkd1/KfcVcvQz WUf56OUsz83T4vUdgyOZQMuZR3MlKXpGa53RKx6/OLEeEfSRb4D4hMN0spyhJv/TTT7oJs/th 1SVpt9luHJ3d+6AfznWsujYZLEKvV0xsxzmbzTlsstKOS8JgQtoU0WHZJ3LE4jlmvAxDjEaZt zIuSZyXlPGJf+vxOIATOkABFt408UThVINSP/yXFxVcfhhkpFcdCWELRnHEzcaKEBoAoZgK+n NDUUAHNOqFV5/oFLXo8aLJPal7sPHJslOZPbB5ij3vDkEtnVfshyPA6v04LGEaxyUmT6QS+FT 7XxR4EF6ScOzbmnzgvLw42bvw11PuhJiiIHRAcuNJADkMOJIiLv8DCZEnjc4fEQNYpk/8Ie9w 7LjutujJNs8+VMPWkZqp07RNwpW3zxOCZ1xJZwO/VNbPQz0oxsbe+7FCULX+uZZXNaSCv9Uq/ WuZz1xuttxDEkT5xYTDdplbMiJ0Tmzm3NHiiCqh7wLeLDtlC5DObut2TXL/VXVPM+rRYbS8Lk cth6BTlmBj/47eFsfiuczPUILFHZ3PAmbZ2cDSkvp4r5OPKpP6UNeiufJrtKfIVPv91bHBVqt qxlAcwYcjCQbsN+S/9LysYAVKNLFhTy8OiOfZF1NejD4/iyi1cYXJQpcXoYF6Fr5hEjgNK2vv wvNvx4b7vfBdtG9p2QGmSQbbejnM9UZXlH83qw== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The omap usb drivers still rely on mach/*.h headers that are explicitly or implicitly included, but all the required definitions are now in include/linux/soc/ti/, so use those instead and allow compile-testing on other architectures. Signed-off-by: Arnd Bergmann Acked-by: Greg Kroah-Hartman --- drivers/usb/gadget/udc/Kconfig | 2 +- drivers/usb/gadget/udc/omap_udc.c | 2 ++ drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ohci-omap.c | 7 +++---- drivers/usb/phy/Kconfig | 3 ++- drivers/usb/phy/phy-isp1301-omap.c | 4 ++-- 6 files changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig index d354036ff6c8..ac0891a3dbf2 100644 --- a/drivers/usb/gadget/udc/Kconfig +++ b/drivers/usb/gadget/udc/Kconfig @@ -128,7 +128,7 @@ config USB_GR_UDC config USB_OMAP tristate "OMAP USB Device Controller" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || (ARCH_OMAP && COMPILE_TEST) depends on ISP1301_OMAP || !(MACH_OMAP_H2 || MACH_OMAP_H3) help Many Texas Instruments OMAP processors have flexible full diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c index 721c9c3fe5a7..27b6142ea803 100644 --- a/drivers/usb/gadget/udc/omap_udc.c +++ b/drivers/usb/gadget/udc/omap_udc.c @@ -43,6 +43,8 @@ #include #include +#include +#include #include "omap_udc.h" diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 79bbce685583..e566a99bc8c9 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -201,7 +201,7 @@ config USB_EHCI_HCD_NPCM7XX config USB_EHCI_HCD_OMAP tristate "EHCI support for OMAP3 and later chips" - depends on ARCH_OMAP + depends on ARCH_OMAP || COMPILE_TEST depends on NOP_USB_XCEIV default y ---help--- diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 841563fba20d..be3571778b60 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -27,6 +27,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -36,10 +39,6 @@ #include #include -#include - -#include - #define DRIVER_DESC "OHCI OMAP driver" #ifdef CONFIG_TPS65010 diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 24b4f091acb8..c6b2559fd334 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -30,7 +30,8 @@ config FSL_USB2_OTG config ISP1301_OMAP tristate "Philips ISP1301 with OMAP OTG" - depends on I2C && ARCH_OMAP_OTG + depends on I2C + depends on ARCH_OMAP_OTG || (ARM && COMPILE_TEST) depends on USB depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't be 'y' select USB_PHY diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c index 18cf87dcc21f..0f3475e91403 100644 --- a/drivers/usb/phy/phy-isp1301-omap.c +++ b/drivers/usb/phy/phy-isp1301-omap.c @@ -23,9 +23,9 @@ #include #include -#include - +#include #include +#include #undef VERBOSE From patchwork Thu Aug 8 21:22:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084817 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F1B513B1 for ; Thu, 8 Aug 2019 21:32:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2FA0128AA8 for ; Thu, 8 Aug 2019 21:32:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 23EEF28BA9; Thu, 8 Aug 2019 21:32:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C72B328AA8 for ; Thu, 8 Aug 2019 21:32:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403798AbfHHVca (ORCPT ); Thu, 8 Aug 2019 17:32:30 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:59617 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730768AbfHHVca (ORCPT ); Thu, 8 Aug 2019 17:32:30 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MHEPI-1i93Qp43sm-00DK8b; Thu, 08 Aug 2019 23:32:04 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Daniel Lezcano , Thomas Gleixner Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 11/22] clocksource: ti-dmtimer: avoid using mach/hardware.h Date: Thu, 8 Aug 2019 23:22:20 +0200 Message-Id: <20190808212234.2213262-12-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:3tljNrXw83+F4Hazcc57iyTVuqcANP1caRyw1sEvbkwOygXkbr1 2ASndSMUrdeHCNbt1U3/d4g6qDaH9k8V17XP2mqlGCEr/0WkuW4dpT0luK3Ib7tzCq3jePR BGIFP9qnN11wrBgaVcqYGbcuHh66bIzNhqhuwqjrw5DHew75jqoOoa8BFA3OkhD3Df5sApL 8Rp7aRufJofird7OveVzg== X-UI-Out-Filterresults: notjunk:1;V03:K0:c+WCVkEggaY=:c38mMZPYd8pl1vXQe/HjSA DBUWUCNFjnUJbBngyRKBRfKPQh7GsHAImDc+yv3V7nryPEmK/AmVc0yULOOpMsZRogR9HyphU IUkECTgE4tRvMXh9k64YOLT8YnXTq5QuxwoV9XwFj4F3GHhkrsJ6bFp30AnMG/D2f2ZsafdG4 yTzGXMB2SLhbHRGbxywX4gIz7ERYYwsWlbvmjHxGnS1E5p1E0E88XsCZSGQz0MHCmQckQOkE+ 2YsOUR4fllQDmC1aTYZFqJjY+2amkjolTkB+F3G5vrDW3efKKAoga5h4ZujEjLAlahRw8zpK6 lqrPBFihWNmjchEyQkPqsMIMAsrLCia9XhWzLfB6l7e/1hk4ZpBVHK5mKTv1MBj8T8n7dsEEh Y6WSDp9awK/eLo4MwI8Dw4VQSsIXA1AX76bqXMKoA6mmkEVaTW98dgPgPgNNu/6JtWg9WkjrH 5VcOE42yVkZLddcgBxeBhxQ6DQ48Q1VbzXZTuQADwcme5dJZvMC4xgv9ocOHIdf5+4RF4J7Jt 3lVUGDobZk45oXSv3t5vfWa+zh/oo1cRc8w05FzGCgRVvUXucWsIKMtnBI5JsYSvoesblkdiz sWZNvg6+WbPYA+hFDWF3Nc3jlTEm9ppDVyuk5gKxn5tRriaHB0xXHyVyVdYf3FvAiJoz/gBS5 2JRVH49k0FFL7f+CUQC7jnAOzJ34LYZceQlNBkqIsEBjBhM39l9iSQButSSt9PowGTmOyEa8n bXNX4gD8IhG84AdyKAiVXFr1ylArol+ND1mdAA== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As a preparation for future omap1 multiplatform support, stop using mach/hardware.h and instead include the omap1-io.h for low-level register access to MOD_CONF_CTRL_1. Signed-off-by: Arnd Bergmann Acked-by: Daniel Lezcano --- drivers/clocksource/timer-ti-dm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 5394d9dbdfbc..422f96384dc5 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -448,7 +448,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer) } #if defined(CONFIG_ARCH_OMAP1) -#include +#include static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) { From patchwork Thu Aug 8 21:22:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EEEC6746 for ; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D9BB828BCE for ; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9E3628BCF; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 769A528BD3 for ; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390151AbfHHVdH (ORCPT ); Thu, 8 Aug 2019 17:33:07 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:42149 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730768AbfHHVdG (ORCPT ); Thu, 8 Aug 2019 17:33:06 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1M4384-1hvq1D3ixU-0004a5; Thu, 08 Aug 2019 23:32:20 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Greg Kroah-Hartman , Jiri Slaby Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/22] serial: 8250/omap1: include linux/soc/ti/omap1-soc.h Date: Thu, 8 Aug 2019 23:22:21 +0200 Message-Id: <20190808212234.2213262-13-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:z2A+z2co/6ENTJV8BzitLCY3ir62bsxJ3qP0RIDtuRKBSxc8W+s UPlAmrmnNY1b4pYyNJWHze2+YeUDZ39fPMUaKr0ayGZKiv8kD1wSSTQCecLM54dKe66RFbq iCcnWHfAU23Yo48rHq+twDPQTUjVS1dw3p7pkfdu6mpGnBDeMDU9k0KAgVEuXpBMe866k9N drVQSjjKIytwnVomi/7ww== X-UI-Out-Filterresults: notjunk:1;V03:K0:ElvUHXaYh/I=:v35+aAwQWvH4rVEJdqF34z Dlek5Xw/Ls1nDpiDTzd9kSWiltHCOuAOfCYo6Ckspm4mpx/FRuCQrGJvBCpsCddwWu9pmlkQW UsGbYnmzqmoFGAbOGYqIDvMcK9qVPyDHFf9Wgqy4Kqft5lcwMXPqrGnWNqy5gKTytH33pM3Bv 6tmbXUrgtnxSmewUepzYrKzs+hxLbop8xyqQj+0g51Q2gxKSc6RzW+ieQHkLmJUV4h04tcb3n vk2u3PW9tPmmQy2AJrabh+AzXQYAYHQLdwrkgwCOm5fR3lDXeSRPDUNqvjkgdHI7XzNutoXDl D6PUZxROQfXfsHkcj7ox8/2h4Lw4qQf69kDfs6G8INQmKuuO4nBfETWtxFIhTzVasS3hUaxND +HdpXW7jrvxLJHm6LM5mbGaDO+e47dJHLFVwb1bAxJyeYwgC1l9637Zw7BkooP8sC/KhxZiRO l6lS0o7x2Cd8yLYXepmkh+T/g5oDOmgdzHf2WwGNfaMEwuphCk2uLR1vXy7pSU8fo4DFe5bLe FXYWoz0UMXAJntMWHir+JpGEw/yltq+BzVklCQ7z8OrDqI4diNLJ5sw6mp3cE3Lb5qqmqYAl1 CQGlBQVN8GFtqo6FdQifBPOP9L/ZJ9wFxnn3/y/Fsnb97R4DRs3/LTWdSWsTBNcbGIpvhwiQq Rfbmx1ZcSeKg5nG43YcotG6uoh1Ewc2BYofFsJ0qzdbPsFS9Yhn1VYIOzHxmSsEmH0ll/yepL Mi374DjQA0hby5rAVx4umG/4FluKYVzsWcbrmw== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As a preparation for cleaning up the omap1 headers, start including linux/soc/ti/omap1-soc.h directly so we can keep calling cpu_is_omap1510(). Signed-off-by: Arnd Bergmann --- drivers/tty/serial/8250/8250.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 33ad9d6de532..9deee198fae4 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -263,6 +263,7 @@ static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } #endif #ifdef CONFIG_ARCH_OMAP1 +#include static inline int is_omap1_8250(struct uart_8250_port *pt) { int res; From patchwork Thu Aug 8 21:22:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084827 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D0C21709 for ; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F56B28BCE for ; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63B3628BD0; Thu, 8 Aug 2019 21:33:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 452DE28BCF for ; Thu, 8 Aug 2019 21:33:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732601AbfHHVdJ (ORCPT ); Thu, 8 Aug 2019 17:33:09 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:39043 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730768AbfHHVdI (ORCPT ); Thu, 8 Aug 2019 17:33:08 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1N2SXX-1iJjYP1UhL-013u5K; Thu, 08 Aug 2019 23:32:46 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Dmitry Torokhov Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-input@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/22] input: omap: void using mach/*.h headers Date: Thu, 8 Aug 2019 23:22:22 +0200 Message-Id: <20190808212234.2213262-14-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:0qwRTzGn4JfIF8ObhfLNMcpu9yXXizpeKZ8JtVuzRlduJYrIrTu owiYK1M1BeeoZObfRphHoHoFwE+LOiX1ZpIVXkWVJtlA88FwZOwAIEAQbxkA8rw8748tobB L9R6rqG2/KIub8SMBItoK1omiDtfLnP875ZN5v9Eufa/Mx0BciFuGxuBgBOUg7D8lrz107Y qJOAe4I7l7LshByQ3Mdow== X-UI-Out-Filterresults: notjunk:1;V03:K0:JgEEBB+Nyt4=:+ecHhOdRNmpMi0QmvTk9tX AfQJzmotHNEyy9KCrM19P66/zQDazl3bg2tJ+M+2ZhB3w0Pfi5F2qVquAQWHyea8B6OmOZPJJ rMrn2zHs8MJkdSocphIKI+d+42gnDD/CyqvQygING4qU3VnKlyS9aSPz+DHiPY45H5yrXLm4R HGhliXsHWLBfBCLLdHBsQBG9Fn7nb9shKsdKUd0RCTc9H+NL0+jvam/J4a/H+wAnaujdU7WkV 4XjuRJWohQzkqQ2KINCjT11dKquWKHrIDji21hm7+2UL474wQXwVQntB+ITNN2b8MFNzUVZmC UzRqTr4p7HYT5+84yk/XS3iOc51ornjSVYNWtH/cl8KUbxTLmKxrej8ueDXXiSeUkdI7Jp2F9 C8H9xT5Tyu0s/jS8SdeGRPBZaybm2E1MDTXAlAU3xVjqBwTGHtY8955JUx9ZMtj7rj0sbLzEF O5hT3csOX0aeCQnPolpQoAYxL4hfwcqxfb+S2tTn86UspX2zS5u08CxVOrMih2QmL3bXFlExH +GItpsT+J32ExrxVkIgvPttP0pMM6usCnylxJ0moUaHDYy64nITYpqSLMrMzuSjQt3Od+cqg0 lbbtxxfp5L2Hm/EcUBx+kjv3Z3UMMWpJlkOAtvoJGRxpFnc7TP0rgTCTE6fFPUNEEE8WtUlyb oM6GcEl4frLnerFpxkYM7OPEFP/EzV6XTValbc7jE8p/dVKnk8AyKUhD5CpIQaJsfZX62abRe Hnt62LZOJIQW6SH5yDCE75jMXH1QZzmGtmfZNA== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP By using the new linux/soc/ti/omap1-io.h header instead, compile-testing can be enabled, and a CONFIG_ARCH_MULTIPLATFORM conversion of omap1 may eventually be possible. The warning in the header file gets removed in order to allow CONFIG_COMPILE_TEST. Signed-off-by: Arnd Bergmann --- drivers/input/keyboard/Kconfig | 2 +- drivers/input/keyboard/omap-keypad.c | 1 + include/linux/platform_data/keypad-omap.h | 5 ----- 3 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 5f1a3b3ee0fb..b454d262906b 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -658,7 +658,7 @@ config KEYBOARD_IPAQ_MICRO config KEYBOARD_OMAP tristate "TI OMAP keypad support" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || COMPILE_TEST select INPUT_MATRIXKMAP help Say Y here if you want to use the OMAP keypad. diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index 5fe7a5633e33..31da8e878535 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c @@ -24,6 +24,7 @@ #include #include #include +#include #undef NEW_BOARD_LEARNING_MODE diff --git a/include/linux/platform_data/keypad-omap.h b/include/linux/platform_data/keypad-omap.h index 3e7c64c854f4..6f058eb188c4 100644 --- a/include/linux/platform_data/keypad-omap.h +++ b/include/linux/platform_data/keypad-omap.h @@ -5,11 +5,6 @@ #ifndef __KEYPAD_OMAP_H #define __KEYPAD_OMAP_H -#ifndef CONFIG_ARCH_OMAP1 -#warning Please update the board to use matrix-keypad driver -#define omap_readw(reg) 0 -#define omap_writew(val, reg) do {} while (0) -#endif #include struct omap_kp_platform_data { From patchwork Thu Aug 8 21:22:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084831 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 85EF4746 for ; Thu, 8 Aug 2019 21:33:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7531728BCE for ; Thu, 8 Aug 2019 21:33:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 691D228BD3; Thu, 8 Aug 2019 21:33:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8177C28BCE for ; Thu, 8 Aug 2019 21:33:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730768AbfHHVdh (ORCPT ); Thu, 8 Aug 2019 17:33:37 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:40783 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728020AbfHHVdg (ORCPT ); Thu, 8 Aug 2019 17:33:36 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mx0VH-1iGO1F3rXX-00yOIw; Thu, 08 Aug 2019 23:33:11 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Dominik Brodowski Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 14/22] ARM: omap1: use pci_ioremap_io() for omap_cf Date: Thu, 8 Aug 2019 23:22:23 +0200 Message-Id: <20190808212234.2213262-15-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:T0h7JpBfhfIzzYs7SKu4WH/fYD3z37b4wcHxdCbVevtJL0SMgqT MzlFe2+AoIx6riMlQsNqVmF4HbP4A9qrAZpDoYTaYJNHGUGDxJfnK4RioNPDRkftU67cUIM 0EV3FUdLQx3th9oUOUhABs6eV9TtFbK63ICTI9THmC6/PPmRK2yikOBeo1rTEhpHTqw2Omq GGWcW9jBHJVztyQvj1+2Q== X-UI-Out-Filterresults: notjunk:1;V03:K0:gXhQq6dGukQ=:HBAKuxIRKY9jeG1BoJ80W9 eBMGVEbY6rqj0cUwfxjAQ471IvOegHVlF+xzSz4u7bfeGr35FS1bL9Sj+aZJwGPJoOvhkv8/g FXX+6vhT/maYfeJTd2/F7SduLYw2F0edqaSV9TExPZ3NMb1VUaJGYNWzNKyjK684aWsxduMzC a0qtr3GAWoyy+7D8yPAVBseTLUHW9wiWBol3cfOHwyBr/qSw5jt1dAxADs5P5mmjMvYmj1dM4 4pQxDFvn/pjNrsG+kdQPDWCMY7PUhRRmZeZ0J+b3E34uUOKisHqhuxGN1VqH8e8ukIwUxOCBh lLsP5v6P49pUsDuZh0UBLeQHQ2VO2bFwEJ2bv61pu8YEz4CnDf2ljOxXrMl0gGY3DMNUzhn4I Dyo+Q45U35zXtbvOw1CgBATdtQDkIsqKpVszduAUa6gXTxHoDaIn70yhaC33rA6G9lsxGN1xv haHVS/EXhnf+z0lEDBfo1VonrUP2raV0QH77x6V8VEGIYk2iLtsj88zf/Uyu4dnHnNESUfH24 4LDinB2dzm9/vXlkNGAlSe1ERpX708QiQbzTiYGzYAtCVOTdmpdt05JLreM1vaGQ77IqBIpq9 me8HJs6u0BUekqyv9tgC2HMOudt4xvEcNcwg57enFk+Ddidd0nC8ILlvDhCEVE5ACaolsL+vV 4yEQKvRDrHOwzlVOjKbNzl9W/7/xIkucERhLnrkAlCzWmic+L+lPNm0+wH3o3+swSEOvuuV5y aIekoO1WYWBMAGamIwyTr1QbjPOmS5muzbBEZQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ISA I/O space handling in omap_cf is incompatible with PCI drivers in a multiplatform kernel, and requires a custom mach/io.h. Change the driver to use pci_ioremap_io() like PCI drivers do, so the generic ioport access can work across platforms. To actually use that code, we have to select CONFIG_PCI here. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 2 +- arch/arm/mach-omap1/include/mach/io.h | 45 --------------------------- drivers/pcmcia/omap_cf.c | 9 ++---- 3 files changed, 4 insertions(+), 52 deletions(-) delete mode 100644 arch/arm/mach-omap1/include/mach/io.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b7162ac8d756..8263fe7a5e64 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -496,13 +496,13 @@ config ARCH_OMAP1 select ARCH_OMAP select CLKDEV_LOOKUP select CLKSRC_MMIO + select FORCE_PCI if PCCARD select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP select GENERIC_IRQ_MULTI_HANDLER select GPIOLIB select HAVE_IDE select IRQ_DOMAIN - select NEED_MACH_IO_H if PCCARD select NEED_MACH_MEMORY_H select SPARSE_IRQ help diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h deleted file mode 100644 index ce4f8005b26f..000000000000 --- a/arch/arm/mach-omap1/include/mach/io.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/io.h - * - * IO definitions for TI OMAP processors and boards - * - * Copied from arch/arm/mach-sa1100/include/mach/io.h - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) - -#endif diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c index 98df6473034d..9f8ad82f5fce 100644 --- a/drivers/pcmcia/omap_cf.c +++ b/drivers/pcmcia/omap_cf.c @@ -235,9 +235,9 @@ static int __init omap_cf_probe(struct platform_device *pdev) cf->phys_cf = res->start; /* pcmcia layer only remaps "real" memory */ - cf->socket.io_offset = (unsigned long) - ioremap(cf->phys_cf + SZ_4K, SZ_2K); - if (!cf->socket.io_offset) + cf->socket.io_offset = 0x10000; + status = pci_ioremap_io(cf->socket.io_offset, cf->phys_cf + SZ_4K); + if (status) goto fail1; if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) @@ -281,8 +281,6 @@ static int __init omap_cf_probe(struct platform_device *pdev) fail2: release_mem_region(cf->phys_cf, SZ_8K); fail1: - if (cf->socket.io_offset) - iounmap((void __iomem *) cf->socket.io_offset); free_irq(irq, cf); fail0: kfree(cf); @@ -296,7 +294,6 @@ static int __exit omap_cf_remove(struct platform_device *pdev) cf->active = 0; pcmcia_unregister_socket(&cf->socket); del_timer_sync(&cf->timer); - iounmap((void __iomem *) cf->socket.io_offset); release_mem_region(cf->phys_cf, SZ_8K); free_irq(cf->irq, cf); kfree(cf); From patchwork Thu Aug 8 21:41:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F05B61709 for ; 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Thu, 8 Aug 2019 17:43:12 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MA88C-1i31ze2V7C-00BeaO; Thu, 08 Aug 2019 23:42:40 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley , Kevin Hilman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 15/22] ARM: omap1: move mach/*.h into mach directory Date: Thu, 8 Aug 2019 23:41:25 +0200 Message-Id: <20190808214232.2798396-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:0NtHFICYaisIsOL4SLfQ5PnSC40jDWA56cpBCTEaGu/+fYmGvz3 Q0HsNoC6tgm755p1Z8c/MAYXN+ogEOBUuDidEX4OW4EQDv8Z6e0vEsEendSnrGUojWa0giR z2v+fBbyBakCeDbzJ+YvCHVmhWYBuimycrt6wpGFT5ObxSG/Ls8EA3pcgf8ly6USL2qcVdQ nGxjOmzSwBI5jNV5U6w6w== X-UI-Out-Filterresults: notjunk:1;V03:K0:FzN6doZzEkw=:5I1+kCwLJe+7dA7XZWRopu x9RqtUOyw6Y0BEKvCWromcwYw6UXXLVRm6MrFZKKlGA8KsqSB/2WPHd5RbpwBW67uMeXprX7p EDSXSfaXmMGbkvxole5mupFF0ruwLn2pPMFdoQgEb33dXyH51qNGdIPFdvcb6agYk2hPbndgL TfEl5sTpPE9CofTZ8xWi7qm4S4zcySAPm/lH5/hXiRAZuAXsTfqEcd6lphZiF2nbZ+hBeW+Uq z6+NCbmeu5nf/KUHjYa4md897ggNyJwAA29mcCHTyf2uUXFItvMS0bQBl9vn20RFaBVH1dnRd irNbYB+rBK6/KcM9hHR6poviIGz40+omkfKQmDNeabRxkLlqCoKWzcQQ4oPTbUaeDgYr9WKxF 23llxRDIQAU5CxTsKu8OAujDZIuN+/y7OypunV8j0HifMLEQ/VCPUD+GrurND1ZQlsZdT9z2B ERUyOgq5mZL0/WjYl528/HWiwwRCJomSTi1QtAeI+M4q0MdNg0LXNsVvPeHJHVmupxLa9GIgN nBGTqc5hMdKYWCer+AGyE9YhpDYw2ZGxXdL83pZbl4NZuWWbYHKEtYT0axvKgLovDDZvr9YVI RIuVihZkIzErp/TY/nnnGQzAjD7hJvLKi8RgGxv8F6QW1jhWlKGv1z2wJXtJaYzayzDJZAMzh sES9P7LZO5z8Bp9RQZpX6gkgkyn6A6mgU5U4N8xG9mw+l74TD1rKY6+/JkYx+tDaOCphndfrb 5GVrAdcwvEaW+4yGPkqUTirFj37akcP9HHqenQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most of the header files are no longer referenced from outside arch/arm/mach-omap1, so move them all to that place directly and change their users to use the new location. The exceptions are: - mach/tc.h is used by arch/arm/plat-omap/dma.c - mach/compress.h is used by the core architecture code - mach/serial.h is used by mach/compress.h The mach/memory.h is empty and gets removed in the process, avoiding the need for CONFIG_NEED_MACH_MEMORY_H. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-omap1/ams-delta-fiq-handler.S | 3 ++- arch/arm/mach-omap1/ams-delta-fiq.c | 2 ++ arch/arm/mach-omap1/ams-delta-fiq.h | 2 +- arch/arm/mach-omap1/board-ams-delta.c | 5 ++--- arch/arm/mach-omap1/board-fsample.c | 10 ++++----- arch/arm/mach-omap1/board-generic.c | 6 ++---- arch/arm/mach-omap1/board-h2.c | 10 ++++----- arch/arm/mach-omap1/board-h3.c | 12 +++++------ arch/arm/mach-omap1/board-htcherald.c | 8 +++---- arch/arm/mach-omap1/board-innovator.c | 10 ++++----- arch/arm/mach-omap1/board-nokia770.c | 6 ++---- arch/arm/mach-omap1/board-osk.c | 9 ++++---- arch/arm/mach-omap1/board-palmte.c | 12 +++++------ arch/arm/mach-omap1/board-palmtt.c | 12 +++++------ arch/arm/mach-omap1/board-palmz71.c | 12 +++++------ arch/arm/mach-omap1/board-perseus2.c | 7 +++---- arch/arm/mach-omap1/board-sx1-mmc.c | 3 +-- arch/arm/mach-omap1/board-sx1.c | 10 ++++----- arch/arm/mach-omap1/clock.c | 4 ++-- arch/arm/mach-omap1/clock_data.c | 5 ++--- arch/arm/mach-omap1/common.h | 3 +-- arch/arm/mach-omap1/devices.c | 8 +++---- arch/arm/mach-omap1/fb.c | 2 +- arch/arm/mach-omap1/flash.c | 3 ++- arch/arm/mach-omap1/fpga.c | 3 +-- arch/arm/mach-omap1/gpio15xx.c | 3 ++- arch/arm/mach-omap1/gpio16xx.c | 5 +++-- arch/arm/mach-omap1/gpio7xx.c | 3 +-- .../mach-omap1/{include/mach => }/hardware.h | 2 -- arch/arm/mach-omap1/i2c.c | 3 ++- arch/arm/mach-omap1/id.c | 5 ++--- arch/arm/mach-omap1/include/mach/memory.h | 12 ----------- arch/arm/mach-omap1/io.c | 5 ++--- arch/arm/mach-omap1/irq.c | 4 +--- arch/arm/mach-omap1/{include/mach => }/irqs.h | 2 -- arch/arm/mach-omap1/mcbsp.c | 9 ++++---- .../mach-omap1/{include/mach => }/mtd-xip.h | 3 ++- arch/arm/mach-omap1/mux.c | 6 +++--- arch/arm/mach-omap1/{include/mach => }/mux.h | 2 -- arch/arm/mach-omap1/ocpi.c | 4 ++-- .../mach-omap1/{include/mach => }/omap1510.h | 0 .../mach-omap1/{include/mach => }/omap16xx.h | 0 .../mach-omap1/{include/mach => }/omap7xx.h | 0 arch/arm/mach-omap1/pm.c | 7 ++++--- arch/arm/mach-omap1/pm.h | 2 ++ arch/arm/mach-omap1/reset.c | 3 +-- arch/arm/mach-omap1/serial.c | 3 ++- arch/arm/mach-omap1/sleep.S | 2 +- arch/arm/mach-omap1/soc.h | 4 ++-- arch/arm/mach-omap1/sram.S | 4 ++-- arch/arm/mach-omap1/time.c | 2 +- arch/arm/mach-omap1/timer.c | 1 + arch/arm/mach-omap1/timer32k.c | 3 +-- arch/arm/mach-omap1/usb.c | 6 +++--- arch/arm/plat-omap/dma.c | 2 +- arch/arm/plat-omap/include/plat/cpu.h | 21 ------------------- 57 files changed, 118 insertions(+), 178 deletions(-) rename arch/arm/mach-omap1/{include/mach => }/hardware.h (99%) delete mode 100644 arch/arm/mach-omap1/include/mach/memory.h rename arch/arm/mach-omap1/{include/mach => }/irqs.h (99%) rename arch/arm/mach-omap1/{include/mach => }/mtd-xip.h (97%) rename arch/arm/mach-omap1/{include/mach => }/mux.h (98%) rename arch/arm/mach-omap1/{include/mach => }/omap1510.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap16xx.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap7xx.h (100%) delete mode 100644 arch/arm/plat-omap/include/plat/cpu.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8263fe7a5e64..0febd7a1d65f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -503,7 +503,6 @@ config ARCH_OMAP1 select GPIOLIB select HAVE_IDE select IRQ_DOMAIN - select NEED_MACH_MEMORY_H select SPARSE_IRQ help Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index 81159af44862..d2c9481aadba 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -15,11 +15,12 @@ #include #include +#include +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" -#include "soc.h" /* * OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c. diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 43899fa56674..1f62b3de4f87 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -21,7 +21,9 @@ #include #include +#include +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h index fd76df3cce37..7f843caedb7c 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -16,7 +16,7 @@ #ifndef __AMS_DELTA_FIQ_H #define __AMS_DELTA_FIQ_H -#include +#include "irqs.h" /* * Interrupt number used for passing control from FIQ to IRQ. diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 2d63db557792..c937b2f3204b 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -35,12 +35,11 @@ #include #include -#include -#include +#include "mux.h" +#include "hardware.h" #include "camera.h" #include "usb.h" - #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index c3aa6f2e5546..501567930a37 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -23,13 +23,13 @@ #include #include -#include -#include -#include "flash.h" +#include #include +#include -#include - +#include "mux.h" +#include "flash.h" +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 8ef0a9b17e92..3b2bcaf4bb01 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -14,15 +14,13 @@ #include #include -#include #include #include #include -#include - +#include "hardware.h" +#include "mux.h" #include "usb.h" - #include "common.h" /* assume no Mini-AB port */ diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 92a31727a069..3dcb50aff749 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -27,22 +27,20 @@ #include #include #include +#include #include +#include #include #include #include #include -#include -#include #include -#include +#include "mux.h" #include "flash.h" - -#include +#include "hardware.h" #include "usb.h" - #include "common.h" #include "board-h2.h" diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 86260498c344..305d17fa2a8a 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include #include #include @@ -37,16 +39,12 @@ #include #include -#include #include -#include -#include +#include "mux.h" #include "flash.h" - -#include -#include +#include "hardware.h" +#include "irqs.h" #include "usb.h" - #include "common.h" #include "board-h3.h" diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index f7220b60eb61..f8d93d79d5fb 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -23,16 +23,16 @@ #include #include #include +#include #include #include -#include +#include "hardware.h" +#include "omap7xx.h" #include "mmc.h" - -#include +#include "irqs.h" #include "usb.h" - #include "common.h" /* LCD register definition */ diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index f169e172421d..ab5f5fc9fa36 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -23,19 +23,17 @@ #include #include #include +#include #include #include #include -#include -#include "flash.h" #include -#include - -#include +#include "mux.h" +#include "flash.h" +#include "hardware.h" #include "usb.h" - #include "iomap.h" #include "common.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index e43c852103f5..8e0e58495023 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -28,11 +28,9 @@ #include #include -#include - -#include +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #include "clock.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 38d73da5d13d..627f44350c36 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -41,18 +41,17 @@ #include #include #include +#include #include #include #include -#include "flash.h" -#include #include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 4ac981c5cf74..0a54cfc2f78d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -25,21 +25,19 @@ #include #include #include +#include +#include #include #include #include #include -#include "flash.h" -#include #include -#include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "mmc.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index e48ae5fbe1b1..b0e64915f103 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -24,22 +24,20 @@ #include #include #include +#include #include #include +#include #include #include #include -#include "flash.h" -#include -#include #include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #define PALMTT_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 37db0ab31528..f6ff582eda2e 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -28,20 +28,18 @@ #include #include #include +#include +#include #include #include #include -#include "flash.h" -#include -#include #include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #define PALMZ71_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index da0155107d85..a91775c62b7b 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -19,17 +19,16 @@ #include #include #include +#include #include #include #include #include -#include +#include "mux.h" #include "flash.h" - -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 6192b1da75cb..f1c160924dfe 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -12,9 +12,8 @@ #include #include -#include +#include "hardware.h" #include "board-sx1.h" - #include "mmc.h" #if IS_ENABLED(CONFIG_MMC_OMAP) diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 0965b1b689ec..01a47fc68a55 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -26,20 +26,18 @@ #include #include #include +#include +#include #include #include #include #include "flash.h" -#include -#include -#include +#include "mux.h" #include "board-sx1.h" - -#include +#include "hardware.h" #include "usb.h" - #include "common.h" /* Write to I2C device */ diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index bd5be82101f3..24db9b723a6f 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -16,11 +16,11 @@ #include #include #include +#include #include -#include - +#include "hardware.h" #include "soc.h" #include "iomap.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index ef46c5f67cf9..36f04da4b939 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -16,14 +16,13 @@ #include #include #include +#include #include /* for machine_is_* */ #include "soc.h" - -#include +#include "hardware.h" #include "usb.h" /* for OTG_BASE */ - #include "iomap.h" #include "clock.h" #include "sram.h" diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 504b959ba5cf..5ceff05e15c0 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -31,8 +31,7 @@ #include -#include - +#include "irqs.h" #include "soc.h" #include "i2c.h" diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 3c4900ac72fc..36b03410b210 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -14,16 +14,16 @@ #include #include +#include #include #include -#include +#include "mux.h" -#include +#include "omap7xx.h" #include "camera.h" -#include - +#include "hardware.h" #include "common.h" #include "clock.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c index b093375afc27..a4538c231f66 100644 --- a/arch/arm/mach-omap1/fb.c +++ b/arch/arm/mach-omap1/fb.c @@ -21,7 +21,7 @@ #include -#include +#include "irqs.h" #if IS_ENABLED(CONFIG_FB_OMAP) diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 40e43ce5329f..5e5b20f73c1b 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c @@ -6,11 +6,12 @@ #include #include #include +#include #include + #include "flash.h" -#include void omap1_set_vpp(struct platform_device *pdev, int enable) { diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index f03ed523f20f..4c71a195969f 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -24,8 +24,7 @@ #include #include -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 312a0924d786..fa0a285c40b4 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -18,8 +18,9 @@ #include #include +#include -#include +#include "irqs.h" #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE #define OMAP1510_GPIO_BASE 0xFFFCE000 diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 5b7a29b294d4..4787bf281eae 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -18,9 +18,10 @@ #include #include +#include -#include - +#include "hardware.h" +#include "irqs.h" #include "soc.h" #define OMAP1610_GPIO1_BASE 0xfffbe400 diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 0e5f68de23bf..c97c74aa8756 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -19,8 +19,7 @@ #include #include -#include - +#include "irqs.h" #include "soc.h" #define OMAP7XX_GPIO1_BASE 0xfffbc000 diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/hardware.h similarity index 99% rename from arch/arm/mach-omap1/include/mach/hardware.h rename to arch/arm/mach-omap1/hardware.h index 05c5cd3e95f4..2cfc342c069c 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-omap1/include/mach/hardware.h - * * Hardware definitions for TI OMAP processors and boards * * NOTE: Please put device driver specific defines into a separate header diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index 5e6d81b1624c..f574eb0bcc0b 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -7,7 +7,8 @@ #include #include -#include + +#include "mux.h" #include "soc.h" #define OMAP_I2C_SIZE 0x3f diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 91556e374152..c3bb1b71fdf3 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -12,12 +12,11 @@ #include #include #include +#include #include #include "soc.h" - -#include - +#include "hardware.h" #include "common.h" #define OMAP_DIE_ID_0 0xfffe1800 diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h deleted file mode 100644 index ee91a6cb548d..000000000000 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-omap1/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* REVISIT: omap1 legacy drivers still rely on this */ -#include - -#endif diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 5a173fc2a1ca..cf425aeeb240 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -9,14 +9,13 @@ #include #include #include +#include #include #include -#include #include -#include - +#include "mux.h" #include "iomap.h" #include "common.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index b11edc8a46f0..6b51387b27ac 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -47,9 +47,7 @@ #include #include "soc.h" - -#include - +#include "hardware.h" #include "common.h" #define IRQ_BANK(irq) ((irq) >> 5) diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/irqs.h similarity index 99% rename from arch/arm/mach-omap1/include/mach/irqs.h rename to arch/arm/mach-omap1/irqs.h index 30bf007700cf..2851acfe5ff3 100644 --- a/arch/arm/mach-omap1/include/mach/irqs.h +++ b/arch/arm/mach-omap1/irqs.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/irqs.h - * * Copyright (C) Greg Lonnon 2001 * Updated for OMAP-1610 by Tony Lindgren * diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index f36c34f47f11..b7bc7e4b426c 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -15,14 +15,13 @@ #include #include #include - #include -#include -#include "soc.h" +#include #include -#include - +#include "mux.h" +#include "soc.h" +#include "irqs.h" #include "iomap.h" #define DPS_RSTCT2_PER_EN (1 << 0) diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/mtd-xip.h similarity index 97% rename from arch/arm/mach-omap1/include/mach/mtd-xip.h rename to arch/arm/mach-omap1/mtd-xip.h index d09b2bc4920f..b675d501b13d 100644 --- a/arch/arm/mach-omap1/include/mach/mtd-xip.h +++ b/arch/arm/mach-omap1/mtd-xip.h @@ -14,7 +14,8 @@ #ifndef __ARCH_OMAP_MTD_XIP_H__ #define __ARCH_OMAP_MTD_XIP_H__ -#include +#include "hardware.h" +#include #define OMAP_MPU_TIMER_BASE (0xfffec500) #define OMAP_MPU_TIMER_OFFSET 0x100 diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 972665bf52d6..2d9458ff1d29 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -12,10 +12,10 @@ #include #include #include +#include -#include - -#include +#include "hardware.h" +#include "mux.h" #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/mux.h similarity index 98% rename from arch/arm/mach-omap1/include/mach/mux.h rename to arch/arm/mach-omap1/mux.h index 362abb9f1dcf..46e5b94e27a2 100644 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ b/arch/arm/mach-omap1/mux.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/mux.h - * * Table of the Omap register configurations for the FUNC_MUX and * PULL_DWN combinations. * diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c index 380ea2de58c1..c4a33ace4a8b 100644 --- a/arch/arm/mach-omap1/ocpi.c +++ b/arch/arm/mach-omap1/ocpi.c @@ -20,9 +20,9 @@ #include #include #include +#include -#include - +#include "hardware.h" #include "common.h" #define OCPI_BASE 0xfffec320 diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/omap1510.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap1510.h rename to arch/arm/mach-omap1/omap1510.h diff --git a/arch/arm/mach-omap1/include/mach/omap16xx.h b/arch/arm/mach-omap1/omap16xx.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap16xx.h rename to arch/arm/mach-omap1/omap16xx.h diff --git a/arch/arm/mach-omap1/include/mach/omap7xx.h b/arch/arm/mach-omap1/omap7xx.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap7xx.h rename to arch/arm/mach-omap1/omap7xx.h diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index d068958d6f8a..dd3743c891b7 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -52,13 +52,14 @@ #include #include +#include #include -#include #include #include -#include - +#include "hardware.h" +#include "mux.h" +#include "irqs.h" #include "iomap.h" #include "clock.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index cd926dcb5e7f..d9165709c532 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -34,6 +34,8 @@ #ifndef __ARCH_ARM_MACH_OMAP1_PM_H #define __ARCH_ARM_MACH_OMAP1_PM_H +#include + /* * ---------------------------------------------------------------------------- * Register and offset definitions to be used in PM assembler code diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index af2c120b0c4e..2eee6a6965ff 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -6,8 +6,7 @@ #include #include -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 9eb591fbfd89..d6d1843337a5 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -19,8 +19,9 @@ #include -#include +#include +#include "mux.h" #include "pm.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index a908c51839a4..f111b79512ce 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -36,7 +36,7 @@ #include -#include +#include "hardware.h" #include "iomap.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h index 22931839a666..5fb57fdd9c2b 100644 --- a/arch/arm/mach-omap1/soc.h +++ b/arch/arm/mach-omap1/soc.h @@ -1,6 +1,6 @@ /* * We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed */ -#include -#include +#include "hardware.h" +#include "irqs.h" #include diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 37f34fcd65fb..89f4dc1b70f0 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -6,11 +6,11 @@ */ #include +#include #include -#include - +#include "hardware.h" #include "iomap.h" .text diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 524977a31a49..7cc1a968230e 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -47,10 +47,10 @@ #include -#include #include #include +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c index 4447210c9b0d..39e40ca40246 100644 --- a/arch/arm/mach-omap1/timer.c +++ b/arch/arm/mach-omap1/timer.c @@ -26,6 +26,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 0ae6c52a7d70..c884508a8c9f 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -52,8 +52,7 @@ #include -#include - +#include "hardware.h" #include "common.h" /* diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index a9deda073822..fda1322bcc1b 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -11,13 +11,13 @@ #include #include #include +#include #include -#include - +#include "hardware.h" +#include "mux.h" #include "usb.h" - #include "common.h" /* These routines should handle the standard chip-specific modes diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 749d3cae15c0..38e5773fbb86 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -35,9 +35,9 @@ #include #ifdef CONFIG_ARCH_OMAP1 -#include #include #include +#include #endif /* diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h deleted file mode 100644 index 36f4c352cc66..000000000000 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * OMAP cpu type detection - * - * Copyright (C) 2004, 2008 Nokia Corporation - * - * Copyright (C) 2009-11 Texas Instruments. - * - * Written by Tony Lindgren - * - * Added OMAP4/5 specific defines - Santosh Shilimkar - */ - -#ifndef __ASM_ARCH_OMAP_CPU_H -#define __ASM_ARCH_OMAP_CPU_H - -#ifdef CONFIG_ARCH_OMAP1 -#include -#endif - -#endif From patchwork Thu Aug 8 21:41:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C5E313B1 for ; Thu, 8 Aug 2019 21:43:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23A8528BC6 for ; Thu, 8 Aug 2019 21:43:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 17A4B28BD0; Thu, 8 Aug 2019 21:43:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0919D28BC6 for ; Thu, 8 Aug 2019 21:43:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733140AbfHHVno (ORCPT ); Thu, 8 Aug 2019 17:43:44 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:56213 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733295AbfHHVno (ORCPT ); Thu, 8 Aug 2019 17:43:44 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MGhi0-1i9bYi2gEs-00DsZM; Thu, 08 Aug 2019 23:43:02 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley , Kevin Hilman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 16/22] ARM: omap1: move clk support into a single file Date: Thu, 8 Aug 2019 23:41:26 +0200 Message-Id: <20190808214232.2798396-2-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:esNHGviDobkgGOdcVSEFZe01urPRNHC2Mha6XfJrImPmyRZiCEw mK2n3I7x/p+OzgjiP0Af9UVZZ5DXvUshrOr6cYQLFPojbw+ag93wpDeaYJt7lRhusiha1xZ qbuk/oPK+c63S2jJviggkye41tC8EMRnHHGllWudUrGf1PWLlDGfv/LDDuRgkPd4U+3QngF 1ugdtKkLzOSaVSB/N3+FA== X-UI-Out-Filterresults: notjunk:1;V03:K0:QS6dRrmqwwA=:OoEPpbFvGeVrTJDY9LOFik EdEHX2VbeyFLWml4uqhbRMAHL7EjBFbTBwJ7OXOtCBKfMUN3YxmEly0sE4WK2lAVwJ73y1RV2 nO9q/TJUISuw145gCsgN5v41K1eKQntWcXB3b9ohWbPM7/v34IC/vuVwE9DgtJl/EToqrfpSx m25djJBPva9EtkiGma4KOt5Pw33ptAu0bujUip4iMUQpbWylyKtezJBLUvCAg15q6kRKPNmlj fw0V9ni5lHppxSqcGs08nFkztlfIJWm6ktcNX4GjECYcKYX0naCQLzyq4xUvkMBdnzH5Yrk4P t/AG2SveaD1gfkauB+W+QwzhESLqkpksmJt7u/nlsEPNBrID2B0En6vpIubybqtyggVIHecRr 3hyC7Rdy3nzhQkNeVHlu5eM+SXbZxMXi07dYYv08seDIowCRJy3fKemd8skB0Zgot4TfI+92b 0IXplxrW/5+4L8lwm0PiedObNWTnrceGTF2V5HYgcDC8MCYqLLN6Kw3SAZ8KegPbiXQDwYDDJ /gYw8xDdgk8Y4dcaUeQsDnIM/QwfPRo0zE+9R5bb9an4jCqJs4thF1971GCncDFiw2KlC1Apa +J+rLUKJW2jsCmC16af8WL4ALqKzB2B4iKMl+pN58i7XMCKPRckVSSRsU+HfK43FqV8J3IDvq m7fgD3FGf1HaZa/lfqrIb9OLrpCbOiS831FsSDwwlrYMPEd3DTcXB316z1tHn3s+MAHO98/AI mMQrTXtBzfC0HI+Hgwyj7JEbowIMJAJISNsLdg== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The omap1 clock support is traditionally split into the clock.c, clock_data.c and opp_data.c files. As a preparation for cleaning this up, move everything into one file. No functional change, each added line comes from an existing file. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/Makefile | 2 +- arch/arm/mach-omap1/board-nokia770.c | 1 - arch/arm/mach-omap1/clock.c | 1215 +++++++++++++++++++++++++- arch/arm/mach-omap1/clock.h | 288 ------ arch/arm/mach-omap1/clock_data.c | 920 ------------------- arch/arm/mach-omap1/common.h | 2 + arch/arm/mach-omap1/devices.c | 1 - arch/arm/mach-omap1/io.c | 1 - arch/arm/mach-omap1/opp.h | 26 - arch/arm/mach-omap1/opp_data.c | 51 -- arch/arm/mach-omap1/pm.c | 1 - 11 files changed, 1216 insertions(+), 1292 deletions(-) delete mode 100644 arch/arm/mach-omap1/clock.h delete mode 100644 arch/arm/mach-omap1/clock_data.c delete mode 100644 arch/arm/mach-omap1/opp.h delete mode 100644 arch/arm/mach-omap1/opp_data.c diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 450bbf552b57..1337d7a2754c 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -6,7 +6,7 @@ # Common support obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ serial.o devices.o dma.o fb.o -obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o +obj-y += clock.o reset.o pm_bus.o timer.o ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),) obj-y += mcbsp.o diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 8e0e58495023..4f7e2fe58d63 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -32,7 +32,6 @@ #include "hardware.h" #include "usb.h" #include "common.h" -#include "clock.h" #include "mmc.h" #define ADS7846_PENDOWN_GPIO 15 diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 24db9b723a6f..bc51d5e24a9e 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include #include @@ -23,9 +25,318 @@ #include "hardware.h" #include "soc.h" #include "iomap.h" -#include "clock.h" -#include "opp.h" #include "sram.h" +#include "usb.h" + +struct module; +struct clk; + +struct omap_clk { + u16 cpu; + struct clk_lookup lk; +}; + +#define CLK(dev, con, ck, cp) \ + { \ + .cpu = cp, \ + .lk = { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + }, \ + } + +/* Platform flags for the clkdev-OMAP integration code */ +#define CK_310 (1 << 0) +#define CK_7XX (1 << 1) /* 7xx, 850 */ +#define CK_1510 (1 << 2) +#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ +#define CK_1710 (1 << 4) /* 1710 extra for rate selection */ + + +/* Temporary, needed during the common clock framework conversion */ +#define __clk_get_name(clk) (clk->name) +#define __clk_get_parent(clk) (clk->parent) +#define __clk_get_rate(clk) (clk->rate) + +/** + * struct clkops - some clock function pointers + * @enable: fn ptr that enables the current clock in hardware + * @disable: fn ptr that enables the current clock in hardware + * @find_idlest: function returning the IDLEST register for the clock's IP blk + * @find_companion: function returning the "companion" clk reg for the clock + * @allow_idle: fn ptr that enables autoidle for the current clock in hardware + * @deny_idle: fn ptr that disables autoidle for the current clock in hardware + * + * A "companion" clk is an accompanying clock to the one being queried + * that must be enabled for the IP module connected to the clock to + * become accessible by the hardware. Neither @find_idlest nor + * @find_companion should be needed; that information is IP + * block-specific; the hwmod code has been created to handle this, but + * until hwmod data is ready and drivers have been converted to use PM + * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and + * @find_companion must, unfortunately, remain. + */ +struct clkops { + int (*enable)(struct clk *); + void (*disable)(struct clk *); + void (*find_idlest)(struct clk *, void __iomem **, + u8 *, u8 *); + void (*find_companion)(struct clk *, void __iomem **, + u8 *); + void (*allow_idle)(struct clk *); + void (*deny_idle)(struct clk *); +}; + +/* + * struct clk.flags possibilities + * + * XXX document the rest of the clock flags here + * + * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL + * bits share the same register. This flag allows the + * omap4_dpllmx*() code to determine which GATE_CTRL bit field + * should be used. This is a temporary solution - a better approach + * would be to associate clock type-specific data with the clock, + * similar to the struct dpll_data approach. + */ +#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ +#define CLOCK_IDLE_CONTROL (1 << 1) +#define CLOCK_NO_IDLE_PARENT (1 << 2) +#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ +#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ +#define CLOCK_CLKOUTX2 (1 << 5) + +/** + * struct clk - OMAP struct clk + * @node: list_head connecting this clock into the full clock list + * @ops: struct clkops * for this clock + * @name: the name of the clock in the hardware (used in hwmod data and debug) + * @parent: pointer to this clock's parent struct clk + * @children: list_head connecting to the child clks' @sibling list_heads + * @sibling: list_head connecting this clk to its parent clk's @children + * @rate: current clock rate + * @enable_reg: register to write to enable the clock (see @enable_bit) + * @recalc: fn ptr that returns the clock's current rate + * @set_rate: fn ptr that can change the clock's current rate + * @round_rate: fn ptr that can round the clock's current rate + * @init: fn ptr to do clock-specific initialization + * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) + * @usecount: number of users that have requested this clock to be enabled + * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div + * @flags: see "struct clk.flags possibilities" above + * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) + * @src_offset: bitshift for source selection bitfield (OMAP1 only) + * + * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * clock code converted to use clksel. + * + * XXX @usecount is poorly named. It should be "enable_count" or + * something similar. "users" in the description refers to kernel + * code (core code or drivers) that have called clk_enable() and not + * yet called clk_disable(); the usecount of parent clocks is also + * incremented by the clock code when clk_enable() is called on child + * clocks and decremented by the clock code when clk_disable() is + * called on child clocks. + * + * XXX @clkdm, @usecount, @children, @sibling should be marked for + * internal use only. + * + * @children and @sibling are used to optimize parent-to-child clock + * tree traversals. (child-to-parent traversals use @parent.) + * + * XXX The notion of the clock's current rate probably needs to be + * separated from the clock's target rate. + */ +struct clk { + struct list_head node; + const struct clkops *ops; + const char *name; + struct clk *parent; + struct list_head children; + struct list_head sibling; /* node for children */ + unsigned long rate; + void __iomem *enable_reg; + unsigned long (*recalc)(struct clk *); + int (*set_rate)(struct clk *, unsigned long); + long (*round_rate)(struct clk *, unsigned long); + void (*init)(struct clk *); + u8 enable_bit; + s8 usecount; + u8 fixed_div; + u8 flags; + u8 rate_offset; + u8 src_offset; +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) + struct dentry *dent; /* For visible tree hierarchy */ +#endif +}; + +struct clk_functions { + int (*clk_enable)(struct clk *clk); + void (*clk_disable)(struct clk *clk); + long (*clk_round_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_rate)(struct clk *clk, unsigned long rate); + int (*clk_set_parent)(struct clk *clk, struct clk *parent); + void (*clk_allow_idle)(struct clk *clk); + void (*clk_deny_idle)(struct clk *clk); + void (*clk_disable_unused)(struct clk *clk); +}; + +extern int clk_init(struct clk_functions *custom_clocks); +extern void clk_preinit(struct clk *clk); +extern int clk_register(struct clk *clk); +extern void clk_reparent(struct clk *child, struct clk *parent); +extern void clk_unregister(struct clk *clk); +extern void propagate_rate(struct clk *clk); +extern void recalculate_root_clocks(void); +extern unsigned long followparent_recalc(struct clk *clk); +extern void clk_enable_init_clocks(void); +unsigned long omap_fixed_divisor_recalc(struct clk *clk); +extern struct clk *omap_clk_get_by_name(const char *name); +extern int omap_clk_enable_autoidle_all(void); +extern int omap_clk_disable_autoidle_all(void); + +extern const struct clkops clkops_null; + +extern struct clk dummy_ck; + +extern int omap1_clk_enable(struct clk *clk); +extern void omap1_clk_disable(struct clk *clk); +extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); +extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_ckctl_recalc(struct clk *clk); +extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_sossi_recalc(struct clk *clk); +extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); +extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); +extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); +extern unsigned long omap1_uart_recalc(struct clk *clk); +extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); +extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); +extern void omap1_init_ext_clk(struct clk *clk); +extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); +extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); +extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); +extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); +extern unsigned long omap1_watchdog_recalc(struct clk *clk); + +#ifdef CONFIG_OMAP_RESET_CLOCKS +extern void omap1_clk_disable_unused(struct clk *clk); +#else +#define omap1_clk_disable_unused NULL +#endif + +struct uart_clk { + struct clk clk; + unsigned long sysc_addr; +}; + +/* Provide a method for preventing idling some ARM IDLECT clocks */ +struct arm_idlect1_clk { + struct clk clk; + unsigned long no_idle_count; + __u8 idlect_shift; +}; + +/* ARM_CKCTL bit shifts */ +#define CKCTL_PERDIV_OFFSET 0 +#define CKCTL_LCDDIV_OFFSET 2 +#define CKCTL_ARMDIV_OFFSET 4 +#define CKCTL_DSPDIV_OFFSET 6 +#define CKCTL_TCDIV_OFFSET 8 +#define CKCTL_DSPMMUDIV_OFFSET 10 +/*#define ARM_TIMXO 12*/ +#define EN_DSPCK 13 +/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */ +/* DSP_CKCTL bit shifts */ +#define CKCTL_DSPPERDIV_OFFSET 0 + +/* ARM_IDLECT2 bit shifts */ +#define EN_WDTCK 0 +#define EN_XORPCK 1 +#define EN_PERCK 2 +#define EN_LCDCK 3 +#define EN_LBCK 4 /* Not on 1610/1710 */ +/*#define EN_HSABCK 5*/ +#define EN_APICK 6 +#define EN_TIMCK 7 +#define DMACK_REQ 8 +#define EN_GPIOCK 9 /* Not on 1610/1710 */ +/*#define EN_LBFREECK 10*/ +#define EN_CKOUT_ARM 11 + +/* ARM_IDLECT3 bit shifts */ +#define EN_OCPI_CK 0 +#define EN_TC1_CK 2 +#define EN_TC2_CK 4 + +/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */ +#define EN_DSPTIMCK 5 + +/* Various register defines for clock controls scattered around OMAP chip */ +#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */ +#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */ +#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */ +#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */ +#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */ +#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874 +#define COM_CLK_DIV_CTRL_SEL 0xfffe0878 +#define SOFT_REQ_REG 0xfffe0834 +#define SOFT_REQ_REG2 0xfffe0880 + +extern __u32 arm_idlect1_mask; +extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; + +extern const struct clkops clkops_dspck; +extern const struct clkops clkops_dummy; +extern const struct clkops clkops_uart_16xx; +extern const struct clkops clkops_generic; + +/* used for passing SoC type to omap1_{select,round_to}_table_rate() */ +extern u32 cpu_mask; + + +/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ +#define IDL_CLKOUT_ARM_SHIFT 12 +#define IDLTIM_ARM_SHIFT 9 +#define IDLAPI_ARM_SHIFT 8 +#define IDLIF_ARM_SHIFT 6 +#define IDLLB_ARM_SHIFT 4 /* undocumented? */ +#define OMAP1510_IDLLCD_ARM_SHIFT 3 /* undocumented? */ +#define IDLPER_ARM_SHIFT 2 +#define IDLXORP_ARM_SHIFT 1 +#define IDLWDT_ARM_SHIFT 0 + +/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_UART3_CLK_MODE_R 31 +#define CONF_MOD_UART2_CLK_MODE_R 30 +#define CONF_MOD_UART1_CLK_MODE_R 29 +#define CONF_MOD_MMC_SD_CLK_REQ_R 23 +#define CONF_MOD_MCBSP3_AUXON 20 + +/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ +#define CONF_MOD_SOSSI_CLK_EN_R 16 + +/* Some OTG_SYSCON_2-specific bit fields */ +#define OTG_SYSCON_2_UHOST_EN_SHIFT 8 + +/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ +#define SOFT_MMC2_DPLL_REQ_SHIFT 13 +#define SOFT_MMC_DPLL_REQ_SHIFT 12 +#define SOFT_UART3_DPLL_REQ_SHIFT 11 +#define SOFT_UART2_DPLL_REQ_SHIFT 10 +#define SOFT_UART1_DPLL_REQ_SHIFT 9 +#define SOFT_USB_OTG_DPLL_REQ_SHIFT 8 +#define SOFT_CAM_DPLL_REQ_SHIFT 7 +#define SOFT_COM_MCKO_REQ_SHIFT 6 +#define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */ +#define USB_REQ_EN_SHIFT 4 +#define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */ +#define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */ +#define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ +#define SOFT_DPLL_REQ_SHIFT 0 + __u32 arm_idlect1_mask; struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; @@ -187,6 +498,54 @@ unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) return clk->parent->rate / dsor; } +/*------------------------------------------------------------------------- + * Omap1 MPU rate table + *-------------------------------------------------------------------------*/ +struct mpu_rate { + unsigned long rate; + unsigned long xtal; + unsigned long pll_rate; + __u16 ckctl_val; + __u16 dpllctl_val; + u32 flags; +}; + +struct mpu_rate omap1_rate_table[] = { + /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL + * NOTE: Comment order here is different from bits in CKCTL value: + * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv + */ + { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */ + CK_1710 }, + { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */ + CK_7XX }, + { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */ + CK_16XX }, + { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */ + CK_16XX }, + { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */ + CK_16XX }, + { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */ + CK_16XX }, + { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */ + CK_16XX }, + { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */ + CK_7XX }, + { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */ + CK_16XX|CK_7XX }, + { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */ + CK_1510 }, + { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */ + CK_16XX|CK_1510|CK_310|CK_7XX }, + { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */ + CK_16XX|CK_1510|CK_310|CK_7XX }, + { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */ + CK_16XX|CK_1510|CK_310|CK_7XX }, + { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */ + CK_16XX|CK_1510|CK_310|CK_7XX }, + { 0, 0, 0, 0, 0 }, +}; + /* MPU virtual clock functions */ int omap1_select_table_rate(struct clk *clk, unsigned long rate) { @@ -1029,3 +1388,855 @@ static int __init clk_debugfs_init(void) late_initcall(clk_debugfs_init); #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ + +/* + * Omap1 clocks + */ + +static struct clk ck_ref = { + .name = "ck_ref", + .ops = &clkops_null, + .rate = 12000000, +}; + +static struct clk ck_dpll1 = { + .name = "ck_dpll1", + .ops = &clkops_null, + .parent = &ck_ref, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ FIX: SoSSI, SSR ] + */ +static struct arm_idlect1_clk ck_dpll1out = { + .clk = { + .name = "ck_dpll1out", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | + ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_CKOUT_ARM, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDL_CLKOUT_ARM_SHIFT, +}; + +static struct clk sossi_ck = { + .name = "ck_sossi", + .ops = &clkops_generic, + .parent = &ck_dpll1out.clk, + .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), + .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, + .recalc = &omap1_sossi_recalc, + .set_rate = &omap1_set_sossi_rate, +}; + +static struct clk arm_ck = { + .name = "arm_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .rate_offset = CKCTL_ARMDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct arm_idlect1_clk armper_ck = { + .clk = { + .name = "armper_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_PERCK, + .rate_offset = CKCTL_PERDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = IDLPER_ARM_SHIFT, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ GPIO code for 1510 ] + */ +static struct clk arm_gpio_ck = { + .name = "ick", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_GPIOCK, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk armxor_ck = { + .clk = { + .name = "armxor_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_XORPCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLXORP_ARM_SHIFT, +}; + +static struct arm_idlect1_clk armtim_ck = { + .clk = { + .name = "armtim_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_TIMCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLTIM_ARM_SHIFT, +}; + +static struct arm_idlect1_clk armwdt_ck = { + .clk = { + .name = "armwdt_ck", + .ops = &clkops_generic, + .parent = &ck_ref, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_WDTCK, + .fixed_div = 14, + .recalc = &omap_fixed_divisor_recalc, + }, + .idlect_shift = IDLWDT_ARM_SHIFT, +}; + +static struct clk arminth_ck16xx = { + .name = "arminth_ck", + .ops = &clkops_null, + .parent = &arm_ck, + .recalc = &followparent_recalc, + /* Note: On 16xx the frequency can be divided by 2 by programming + * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 + * + * 1510 version is in TC clocks. + */ +}; + +static struct clk dsp_ck = { + .name = "dsp_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), + .enable_bit = EN_DSPCK, + .rate_offset = CKCTL_DSPDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct clk dspmmu_ck = { + .name = "dspmmu_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .rate_offset = CKCTL_DSPMMUDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct clk dspper_ck = { + .name = "dspper_ck", + .ops = &clkops_dspck, + .parent = &ck_dpll1, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_PERCK, + .rate_offset = CKCTL_PERDIV_OFFSET, + .recalc = &omap1_ckctl_recalc_dsp_domain, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = &omap1_clk_set_rate_dsp_domain, +}; + +static struct clk dspxor_ck = { + .name = "dspxor_ck", + .ops = &clkops_dspck, + .parent = &ck_ref, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_XORPCK, + .recalc = &followparent_recalc, +}; + +static struct clk dsptim_ck = { + .name = "dsptim_ck", + .ops = &clkops_dspck, + .parent = &ck_ref, + .enable_reg = DSP_IDLECT2, + .enable_bit = EN_DSPTIMCK, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk tc_ck = { + .clk = { + .name = "tc_ck", + .ops = &clkops_null, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .rate_offset = CKCTL_TCDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = IDLIF_ARM_SHIFT, +}; + +static struct clk arminth_ck1510 = { + .name = "arminth_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, + /* Note: On 1510 the frequency follows TC_CK + * + * 16xx version is in MPU clocks. + */ +}; + +static struct clk tipb_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "tipb_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk l3_ocpi_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "l3_ocpi_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_OCPI_CK, + .recalc = &followparent_recalc, +}; + +static struct clk tc1_ck = { + .name = "tc1_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_TC1_CK, + .recalc = &followparent_recalc, +}; + +/* + * FIXME: This clock seems to be necessary but no-one has asked for its + * activation. [ pm.c (SRAM), CCP, Camera ] + */ +static struct clk tc2_ck = { + .name = "tc2_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = ENABLE_ON_INIT, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .enable_bit = EN_TC2_CK, + .recalc = &followparent_recalc, +}; + +static struct clk dma_ck = { + /* No-idle controlled by "tc_ck" */ + .name = "dma_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk dma_lcdfree_ck = { + .name = "dma_lcdfree_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct arm_idlect1_clk api_ck = { + .clk = { + .name = "api_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_APICK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLAPI_ARM_SHIFT, +}; + +static struct arm_idlect1_clk lb_ck = { + .clk = { + .name = "lb_ck", + .ops = &clkops_generic, + .parent = &tc_ck.clk, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LBCK, + .recalc = &followparent_recalc, + }, + .idlect_shift = IDLLB_ARM_SHIFT, +}; + +static struct clk rhea1_ck = { + .name = "rhea1_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk rhea2_ck = { + .name = "rhea2_ck", + .ops = &clkops_null, + .parent = &tc_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk lcd_ck_16xx = { + .name = "lcd_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LCDCK, + .rate_offset = CKCTL_LCDDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, +}; + +static struct arm_idlect1_clk lcd_ck_1510 = { + .clk = { + .name = "lcd_ck", + .ops = &clkops_generic, + .parent = &ck_dpll1, + .flags = CLOCK_IDLE_CONTROL, + .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .enable_bit = EN_LCDCK, + .rate_offset = CKCTL_LCDDIV_OFFSET, + .recalc = &omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, + }, + .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart1_1510 = { + .name = "uart1_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ +static struct uart_clk uart1_16xx = { + .clk = { + .name = "uart1_ck", + .ops = &clkops_uart_16xx, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART1_CLK_MODE_R, + }, + .sysc_addr = 0xfffb0054, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart2_ck = { + .name = "uart2_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART2_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX does this need SYSC register handling? + */ +static struct clk uart3_1510 = { + .name = "uart3_ck", + .ops = &clkops_null, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 12000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, + .set_rate = &omap1_set_uart_rate, + .recalc = &omap1_uart_recalc, +}; + +/* + * XXX The enable_bit here is misused - it simply switches between 12MHz + * and 48MHz. Reimplement with clksel. + * + * XXX SYSC register handling does not belong in the clock framework + */ +static struct uart_clk uart3_16xx = { + .clk = { + .name = "uart3_ck", + .ops = &clkops_uart_16xx, + /* Direct from ULPD, no real parent */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_UART3_CLK_MODE_R, + }, + .sysc_addr = 0xfffb9854, +}; + +static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ + .name = "usb_clko", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 6000000, + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), + .enable_bit = USB_MCLK_EN_BIT, +}; + +static struct clk usb_hhc_ck1510 = { + .name = "usb_hhc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = USB_HOST_HHC_UHOST_EN, +}; + +static struct clk usb_hhc_ck16xx = { + .name = "usb_hhc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, + /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ + .flags = ENABLE_REG_32BIT, + .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ + .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT +}; + +static struct clk usb_dc_ck = { + .name = "usb_dc_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 48000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, +}; + +static struct clk uart1_7xx = { + .name = "uart1_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 9, +}; + +static struct clk uart2_7xx = { + .name = "uart2_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 11, +}; + +static struct clk mclk_1510 = { + .name = "mclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, +}; + +static struct clk mclk_16xx = { + .name = "mclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), + .enable_bit = COM_ULPD_PLL_CLK_REQ, + .set_rate = &omap1_set_ext_clk_rate, + .round_rate = &omap1_round_ext_clk_rate, + .init = &omap1_init_ext_clk, +}; + +static struct clk bclk_1510 = { + .name = "bclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .rate = 12000000, +}; + +static struct clk bclk_16xx = { + .name = "bclk", + .ops = &clkops_generic, + /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), + .enable_bit = SWD_ULPD_PLL_CLK_REQ, + .set_rate = &omap1_set_ext_clk_rate, + .round_rate = &omap1_round_ext_clk_rate, + .init = &omap1_init_ext_clk, +}; + +static struct clk mmc1_ck = { + .name = "mmc1_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, +}; + +/* + * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as + * CONF_MOD_MCBSP3_AUXON ?? + */ +static struct clk mmc2_ck = { + .name = "mmc2_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .enable_bit = 20, +}; + +static struct clk mmc3_ck = { + .name = "mmc3_ck", + .ops = &clkops_generic, + /* Functional clock is direct from ULPD, interface clock is ARMPER */ + .parent = &armper_ck.clk, + .rate = 48000000, + .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, +}; + +static struct clk virtual_ck_mpu = { + .name = "mpu", + .ops = &clkops_null, + .parent = &arm_ck, /* Is smarter alias for */ + .recalc = &followparent_recalc, + .set_rate = &omap1_select_table_rate, + .round_rate = &omap1_round_to_table_rate, +}; + +/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK +remains active during MPU idle whenever this is enabled */ +static struct clk i2c_fck = { + .name = "i2c_fck", + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, + .parent = &armxor_ck.clk, + .recalc = &followparent_recalc, +}; + +static struct clk i2c_ick = { + .name = "i2c_ick", + .ops = &clkops_null, + .flags = CLOCK_NO_IDLE_PARENT, + .parent = &armper_ck.clk, + .recalc = &followparent_recalc, +}; + +/* + * clkdev integration + */ + +static struct omap_clk omap_clks[] = { + /* non-ULPD clocks */ + CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), + /* CK_GEN1 clocks */ + CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), + CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), + CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310), + CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), + CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), + /* CK_GEN2 clocks */ + CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), + /* CK_GEN3 clocks */ + CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), + CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), + CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), + CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), + CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), + CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), + CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), + CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), + CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), + CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), + /* ULPD clocks */ + CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), + CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), + CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), + CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), + CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), + CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), + CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX), + CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), + CLK(NULL, "mclk", &mclk_16xx, CK_16XX), + CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), + CLK(NULL, "bclk", &bclk_16xx, CK_16XX), + CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), + CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), + CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), + CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), + /* Virtual clocks */ + CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), + CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX), + CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), + CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), + CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), + CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), + CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), + CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), + CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), +}; + +/* + * init + */ + +static void __init omap1_show_rates(void) +{ + pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", + ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, + ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, + arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); +} + +u32 cpu_mask; + +int __init omap1_clk_init(void) +{ + struct omap_clk *c; + int crystal_type = 0; /* Default 12 MHz */ + u32 reg; + +#ifdef CONFIG_DEBUG_LL + /* + * Resets some clocks that may be left on from bootloader, + * but leaves serial clocks on. + */ + omap_writel(0x3 << 29, MOD_CONF_CTRL_0); +#endif + + /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ + reg = omap_readw(SOFT_REQ_REG) & (1 << 4); + omap_writew(reg, SOFT_REQ_REG); + if (!cpu_is_omap15xx()) + omap_writew(0, SOFT_REQ_REG2); + + /* By default all idlect1 clocks are allowed to idle */ + arm_idlect1_mask = ~0; + + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + clk_preinit(c->lk.clk); + + cpu_mask = 0; + if (cpu_is_omap1710()) + cpu_mask |= CK_1710; + if (cpu_is_omap16xx()) + cpu_mask |= CK_16XX; + if (cpu_is_omap1510()) + cpu_mask |= CK_1510; + if (cpu_is_omap7xx()) + cpu_mask |= CK_7XX; + if (cpu_is_omap310()) + cpu_mask |= CK_310; + + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) + if (c->cpu & cpu_mask) { + clkdev_add(&c->lk); + clk_register(c->lk.clk); + } + + /* Pointers to these clocks are needed by code in clock.c */ + api_ck_p = clk_get(NULL, "api_ck"); + ck_dpll1_p = clk_get(NULL, "ck_dpll1"); + ck_ref_p = clk_get(NULL, "ck_ref"); + + if (cpu_is_omap7xx()) + ck_ref.rate = 13000000; + if (cpu_is_omap16xx() && crystal_type == 2) + ck_ref.rate = 19200000; + + pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", + omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), + omap_readw(ARM_CKCTL)); + + /* We want to be in syncronous scalable mode */ + omap_writew(0x1000, ARM_SYSST); + + + /* + * Initially use the values set by bootloader. Determine PLL rate and + * recalculate dependent clocks as if kernel had changed PLL or + * divisors. See also omap1_clk_late_init() that can reprogram dpll1 + * after the SRAM is initialized. + */ + { + unsigned pll_ctl_val = omap_readw(DPLL_CTL); + + ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */ + if (pll_ctl_val & 0x10) { + /* PLL enabled, apply multiplier and divisor */ + if (pll_ctl_val & 0xf80) + ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7; + ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1; + } else { + /* PLL disabled, apply bypass divisor */ + switch (pll_ctl_val & 0xc) { + case 0: + break; + case 0x4: + ck_dpll1.rate /= 2; + break; + default: + ck_dpll1.rate /= 4; + break; + } + } + } + propagate_rate(&ck_dpll1); + /* Cache rates for clocks connected to ck_ref (not dpll1) */ + propagate_rate(&ck_ref); + omap1_show_rates(); + if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { + /* Select slicer output as OMAP input clock */ + omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, + OMAP7XX_PCC_UPLD_CTRL); + } + + /* Amstrad Delta wants BCLK high when inactive */ + if (machine_is_ams_delta()) + omap_writel(omap_readl(ULPD_CLOCK_CTRL) | + (1 << SDW_MCLK_INV_BIT), + ULPD_CLOCK_CTRL); + + /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ + /* (on 730, bit 13 must not be cleared) */ + if (cpu_is_omap7xx()) + omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); + else + omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); + + /* Put DSP/MPUI into reset until needed */ + omap_writew(0, ARM_RSTCT1); + omap_writew(1, ARM_RSTCT2); + omap_writew(0x400, ARM_IDLECT1); + + /* + * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8) + * of the ARM_IDLECT2 register must be set to zero. The power-on + * default value of this bit is one. + */ + omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ + + /* + * Only enable those clocks we will need, let the drivers + * enable other clocks as necessary + */ + clk_enable(&armper_ck.clk); + clk_enable(&armxor_ck.clk); + clk_enable(&armtim_ck.clk); /* This should be done by timer code */ + + if (cpu_is_omap15xx()) + clk_enable(&arm_gpio_ck); + + return 0; +} + +#define OMAP1_DPLL1_SANE_VALUE 60000000 + +void __init omap1_clk_late_init(void) +{ + unsigned long rate = ck_dpll1.rate; + + /* Find the highest supported frequency and enable it */ + if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + pr_err("System frequencies not set, using default. Check your config.\n"); + /* + * Reprogramming the DPLL is tricky, it must be done from SRAM. + */ + omap_sram_reprogram_clock(0x2290, 0x0005); + ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; + } + propagate_rate(&ck_dpll1); + omap1_show_rates(); + loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate); +} diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h deleted file mode 100644 index f3b8811f5ac0..000000000000 --- a/arch/arm/mach-omap1/clock.h +++ /dev/null @@ -1,288 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/arch/arm/mach-omap1/clock.h - * - * Copyright (C) 2004 - 2005, 2009 Nokia corporation - * Written by Tuukka Tikkanen - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - */ - -#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H -#define __ARCH_ARM_MACH_OMAP1_CLOCK_H - -#include -#include - -#include - -struct module; -struct clk; - -struct omap_clk { - u16 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -/* Platform flags for the clkdev-OMAP integration code */ -#define CK_310 (1 << 0) -#define CK_7XX (1 << 1) /* 7xx, 850 */ -#define CK_1510 (1 << 2) -#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ -#define CK_1710 (1 << 4) /* 1710 extra for rate selection */ - - -/* Temporary, needed during the common clock framework conversion */ -#define __clk_get_name(clk) (clk->name) -#define __clk_get_parent(clk) (clk->parent) -#define __clk_get_rate(clk) (clk->rate) - -/** - * struct clkops - some clock function pointers - * @enable: fn ptr that enables the current clock in hardware - * @disable: fn ptr that enables the current clock in hardware - * @find_idlest: function returning the IDLEST register for the clock's IP blk - * @find_companion: function returning the "companion" clk reg for the clock - * @allow_idle: fn ptr that enables autoidle for the current clock in hardware - * @deny_idle: fn ptr that disables autoidle for the current clock in hardware - * - * A "companion" clk is an accompanying clock to the one being queried - * that must be enabled for the IP module connected to the clock to - * become accessible by the hardware. Neither @find_idlest nor - * @find_companion should be needed; that information is IP - * block-specific; the hwmod code has been created to handle this, but - * until hwmod data is ready and drivers have been converted to use PM - * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and - * @find_companion must, unfortunately, remain. - */ -struct clkops { - int (*enable)(struct clk *); - void (*disable)(struct clk *); - void (*find_idlest)(struct clk *, void __iomem **, - u8 *, u8 *); - void (*find_companion)(struct clk *, void __iomem **, - u8 *); - void (*allow_idle)(struct clk *); - void (*deny_idle)(struct clk *); -}; - -/* - * struct clk.flags possibilities - * - * XXX document the rest of the clock flags here - * - * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL - * bits share the same register. This flag allows the - * omap4_dpllmx*() code to determine which GATE_CTRL bit field - * should be used. This is a temporary solution - a better approach - * would be to associate clock type-specific data with the clock, - * similar to the struct dpll_data approach. - */ -#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ -#define CLOCK_IDLE_CONTROL (1 << 1) -#define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ -#define CLOCK_CLKOUTX2 (1 << 5) - -/** - * struct clk - OMAP struct clk - * @node: list_head connecting this clock into the full clock list - * @ops: struct clkops * for this clock - * @name: the name of the clock in the hardware (used in hwmod data and debug) - * @parent: pointer to this clock's parent struct clk - * @children: list_head connecting to the child clks' @sibling list_heads - * @sibling: list_head connecting this clk to its parent clk's @children - * @rate: current clock rate - * @enable_reg: register to write to enable the clock (see @enable_bit) - * @recalc: fn ptr that returns the clock's current rate - * @set_rate: fn ptr that can change the clock's current rate - * @round_rate: fn ptr that can round the clock's current rate - * @init: fn ptr to do clock-specific initialization - * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) - * @usecount: number of users that have requested this clock to be enabled - * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div - * @flags: see "struct clk.flags possibilities" above - * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * @src_offset: bitshift for source selection bitfield (OMAP1 only) - * - * XXX @rate_offset, @src_offset should probably be removed and OMAP1 - * clock code converted to use clksel. - * - * XXX @usecount is poorly named. It should be "enable_count" or - * something similar. "users" in the description refers to kernel - * code (core code or drivers) that have called clk_enable() and not - * yet called clk_disable(); the usecount of parent clocks is also - * incremented by the clock code when clk_enable() is called on child - * clocks and decremented by the clock code when clk_disable() is - * called on child clocks. - * - * XXX @clkdm, @usecount, @children, @sibling should be marked for - * internal use only. - * - * @children and @sibling are used to optimize parent-to-child clock - * tree traversals. (child-to-parent traversals use @parent.) - * - * XXX The notion of the clock's current rate probably needs to be - * separated from the clock's target rate. - */ -struct clk { - struct list_head node; - const struct clkops *ops; - const char *name; - struct clk *parent; - struct list_head children; - struct list_head sibling; /* node for children */ - unsigned long rate; - void __iomem *enable_reg; - unsigned long (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); - u8 enable_bit; - s8 usecount; - u8 fixed_div; - u8 flags; - u8 rate_offset; - u8 src_offset; -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif -}; - -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -}; - -extern int clk_init(struct clk_functions *custom_clocks); -extern void clk_preinit(struct clk *clk); -extern int clk_register(struct clk *clk); -extern void clk_reparent(struct clk *child, struct clk *parent); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); -extern unsigned long followparent_recalc(struct clk *clk); -extern void clk_enable_init_clocks(void); -unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern struct clk *omap_clk_get_by_name(const char *name); -extern int omap_clk_enable_autoidle_all(void); -extern int omap_clk_disable_autoidle_all(void); - -extern const struct clkops clkops_null; - -extern struct clk dummy_ck; - -int omap1_clk_init(void); -void omap1_clk_late_init(void); -extern int omap1_clk_enable(struct clk *clk); -extern void omap1_clk_disable(struct clk *clk); -extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_ckctl_recalc(struct clk *clk); -extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_sossi_recalc(struct clk *clk); -extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); -extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); -extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_uart_recalc(struct clk *clk); -extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); -extern void omap1_init_ext_clk(struct clk *clk); -extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern unsigned long omap1_watchdog_recalc(struct clk *clk); - -#ifdef CONFIG_OMAP_RESET_CLOCKS -extern void omap1_clk_disable_unused(struct clk *clk); -#else -#define omap1_clk_disable_unused NULL -#endif - -struct uart_clk { - struct clk clk; - unsigned long sysc_addr; -}; - -/* Provide a method for preventing idling some ARM IDLECT clocks */ -struct arm_idlect1_clk { - struct clk clk; - unsigned long no_idle_count; - __u8 idlect_shift; -}; - -/* ARM_CKCTL bit shifts */ -#define CKCTL_PERDIV_OFFSET 0 -#define CKCTL_LCDDIV_OFFSET 2 -#define CKCTL_ARMDIV_OFFSET 4 -#define CKCTL_DSPDIV_OFFSET 6 -#define CKCTL_TCDIV_OFFSET 8 -#define CKCTL_DSPMMUDIV_OFFSET 10 -/*#define ARM_TIMXO 12*/ -#define EN_DSPCK 13 -/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */ -/* DSP_CKCTL bit shifts */ -#define CKCTL_DSPPERDIV_OFFSET 0 - -/* ARM_IDLECT2 bit shifts */ -#define EN_WDTCK 0 -#define EN_XORPCK 1 -#define EN_PERCK 2 -#define EN_LCDCK 3 -#define EN_LBCK 4 /* Not on 1610/1710 */ -/*#define EN_HSABCK 5*/ -#define EN_APICK 6 -#define EN_TIMCK 7 -#define DMACK_REQ 8 -#define EN_GPIOCK 9 /* Not on 1610/1710 */ -/*#define EN_LBFREECK 10*/ -#define EN_CKOUT_ARM 11 - -/* ARM_IDLECT3 bit shifts */ -#define EN_OCPI_CK 0 -#define EN_TC1_CK 2 -#define EN_TC2_CK 4 - -/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */ -#define EN_DSPTIMCK 5 - -/* Various register defines for clock controls scattered around OMAP chip */ -#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */ -#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */ -#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */ -#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */ -#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */ -#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874 -#define COM_CLK_DIV_CTRL_SEL 0xfffe0878 -#define SOFT_REQ_REG 0xfffe0834 -#define SOFT_REQ_REG2 0xfffe0880 - -extern __u32 arm_idlect1_mask; -extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; - -extern const struct clkops clkops_dspck; -extern const struct clkops clkops_dummy; -extern const struct clkops clkops_uart_16xx; -extern const struct clkops clkops_generic; - -/* used for passing SoC type to omap1_{select,round_to}_table_rate() */ -extern u32 cpu_mask; - -#endif diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c deleted file mode 100644 index 36f04da4b939..000000000000 --- a/arch/arm/mach-omap1/clock_data.c +++ /dev/null @@ -1,920 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/clock_data.c - * - * Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation - * Written by Tuukka Tikkanen - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - * - * To do: - * - Clocks that are only available on some chips should be marked with the - * chips that they are present on. - */ - -#include -#include -#include -#include -#include -#include - -#include /* for machine_is_* */ - -#include "soc.h" -#include "hardware.h" -#include "usb.h" /* for OTG_BASE */ -#include "iomap.h" -#include "clock.h" -#include "sram.h" - -/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ -#define IDL_CLKOUT_ARM_SHIFT 12 -#define IDLTIM_ARM_SHIFT 9 -#define IDLAPI_ARM_SHIFT 8 -#define IDLIF_ARM_SHIFT 6 -#define IDLLB_ARM_SHIFT 4 /* undocumented? */ -#define OMAP1510_IDLLCD_ARM_SHIFT 3 /* undocumented? */ -#define IDLPER_ARM_SHIFT 2 -#define IDLXORP_ARM_SHIFT 1 -#define IDLWDT_ARM_SHIFT 0 - -/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ -#define CONF_MOD_UART3_CLK_MODE_R 31 -#define CONF_MOD_UART2_CLK_MODE_R 30 -#define CONF_MOD_UART1_CLK_MODE_R 29 -#define CONF_MOD_MMC_SD_CLK_REQ_R 23 -#define CONF_MOD_MCBSP3_AUXON 20 - -/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ -#define CONF_MOD_SOSSI_CLK_EN_R 16 - -/* Some OTG_SYSCON_2-specific bit fields */ -#define OTG_SYSCON_2_UHOST_EN_SHIFT 8 - -/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ -#define SOFT_MMC2_DPLL_REQ_SHIFT 13 -#define SOFT_MMC_DPLL_REQ_SHIFT 12 -#define SOFT_UART3_DPLL_REQ_SHIFT 11 -#define SOFT_UART2_DPLL_REQ_SHIFT 10 -#define SOFT_UART1_DPLL_REQ_SHIFT 9 -#define SOFT_USB_OTG_DPLL_REQ_SHIFT 8 -#define SOFT_CAM_DPLL_REQ_SHIFT 7 -#define SOFT_COM_MCKO_REQ_SHIFT 6 -#define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */ -#define USB_REQ_EN_SHIFT 4 -#define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */ -#define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */ -#define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ -#define SOFT_DPLL_REQ_SHIFT 0 - -/* - * Omap1 clocks - */ - -static struct clk ck_ref = { - .name = "ck_ref", - .ops = &clkops_null, - .rate = 12000000, -}; - -static struct clk ck_dpll1 = { - .name = "ck_dpll1", - .ops = &clkops_null, - .parent = &ck_ref, -}; - -/* - * FIXME: This clock seems to be necessary but no-one has asked for its - * activation. [ FIX: SoSSI, SSR ] - */ -static struct arm_idlect1_clk ck_dpll1out = { - .clk = { - .name = "ck_dpll1out", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | - ENABLE_ON_INIT, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_CKOUT_ARM, - .recalc = &followparent_recalc, - }, - .idlect_shift = IDL_CLKOUT_ARM_SHIFT, -}; - -static struct clk sossi_ck = { - .name = "ck_sossi", - .ops = &clkops_generic, - .parent = &ck_dpll1out.clk, - .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), - .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, - .recalc = &omap1_sossi_recalc, - .set_rate = &omap1_set_sossi_rate, -}; - -static struct clk arm_ck = { - .name = "arm_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .rate_offset = CKCTL_ARMDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct arm_idlect1_clk armper_ck = { - .clk = { - .name = "armper_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_PERCK, - .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = IDLPER_ARM_SHIFT, -}; - -/* - * FIXME: This clock seems to be necessary but no-one has asked for its - * activation. [ GPIO code for 1510 ] - */ -static struct clk arm_gpio_ck = { - .name = "ick", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = ENABLE_ON_INIT, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_GPIOCK, - .recalc = &followparent_recalc, -}; - -static struct arm_idlect1_clk armxor_ck = { - .clk = { - .name = "armxor_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = IDLXORP_ARM_SHIFT, -}; - -static struct arm_idlect1_clk armtim_ck = { - .clk = { - .name = "armtim_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_TIMCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = IDLTIM_ARM_SHIFT, -}; - -static struct arm_idlect1_clk armwdt_ck = { - .clk = { - .name = "armwdt_ck", - .ops = &clkops_generic, - .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_WDTCK, - .fixed_div = 14, - .recalc = &omap_fixed_divisor_recalc, - }, - .idlect_shift = IDLWDT_ARM_SHIFT, -}; - -static struct clk arminth_ck16xx = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &arm_ck, - .recalc = &followparent_recalc, - /* Note: On 16xx the frequency can be divided by 2 by programming - * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 - * - * 1510 version is in TC clocks. - */ -}; - -static struct clk dsp_ck = { - .name = "dsp_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), - .enable_bit = EN_DSPCK, - .rate_offset = CKCTL_DSPDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct clk dspmmu_ck = { - .name = "dspmmu_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .rate_offset = CKCTL_DSPMMUDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct clk dspper_ck = { - .name = "dspper_ck", - .ops = &clkops_dspck, - .parent = &ck_dpll1, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_PERCK, - .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc_dsp_domain, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = &omap1_clk_set_rate_dsp_domain, -}; - -static struct clk dspxor_ck = { - .name = "dspxor_ck", - .ops = &clkops_dspck, - .parent = &ck_ref, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, -}; - -static struct clk dsptim_ck = { - .name = "dsptim_ck", - .ops = &clkops_dspck, - .parent = &ck_ref, - .enable_reg = DSP_IDLECT2, - .enable_bit = EN_DSPTIMCK, - .recalc = &followparent_recalc, -}; - -static struct arm_idlect1_clk tc_ck = { - .clk = { - .name = "tc_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .rate_offset = CKCTL_TCDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = IDLIF_ARM_SHIFT, -}; - -static struct clk arminth_ck1510 = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, - /* Note: On 1510 the frequency follows TC_CK - * - * 16xx version is in MPU clocks. - */ -}; - -static struct clk tipb_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "tipb_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk l3_ocpi_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "l3_ocpi_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_OCPI_CK, - .recalc = &followparent_recalc, -}; - -static struct clk tc1_ck = { - .name = "tc1_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_TC1_CK, - .recalc = &followparent_recalc, -}; - -/* - * FIXME: This clock seems to be necessary but no-one has asked for its - * activation. [ pm.c (SRAM), CCP, Camera ] - */ -static struct clk tc2_ck = { - .name = "tc2_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .flags = ENABLE_ON_INIT, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), - .enable_bit = EN_TC2_CK, - .recalc = &followparent_recalc, -}; - -static struct clk dma_ck = { - /* No-idle controlled by "tc_ck" */ - .name = "dma_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk dma_lcdfree_ck = { - .name = "dma_lcdfree_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct arm_idlect1_clk api_ck = { - .clk = { - .name = "api_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_APICK, - .recalc = &followparent_recalc, - }, - .idlect_shift = IDLAPI_ARM_SHIFT, -}; - -static struct arm_idlect1_clk lb_ck = { - .clk = { - .name = "lb_ck", - .ops = &clkops_generic, - .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LBCK, - .recalc = &followparent_recalc, - }, - .idlect_shift = IDLLB_ARM_SHIFT, -}; - -static struct clk rhea1_ck = { - .name = "rhea1_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk rhea2_ck = { - .name = "rhea2_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk lcd_ck_16xx = { - .name = "lcd_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LCDCK, - .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, -}; - -static struct arm_idlect1_clk lcd_ck_1510 = { - .clk = { - .name = "lcd_ck", - .ops = &clkops_generic, - .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), - .enable_bit = EN_LCDCK, - .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, - }, - .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, -}; - -/* - * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. - * - * XXX does this need SYSC register handling? - */ -static struct clk uart1_1510 = { - .name = "uart1_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_UART1_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -/* - * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. - * - * XXX SYSC register handling does not belong in the clock framework - */ -static struct uart_clk uart1_16xx = { - .clk = { - .name = "uart1_ck", - .ops = &clkops_uart_16xx, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_UART1_CLK_MODE_R, - }, - .sysc_addr = 0xfffb0054, -}; - -/* - * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. - * - * XXX does this need SYSC register handling? - */ -static struct clk uart2_ck = { - .name = "uart2_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_UART2_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -/* - * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. - * - * XXX does this need SYSC register handling? - */ -static struct clk uart3_1510 = { - .name = "uart3_ck", - .ops = &clkops_null, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_UART3_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, -}; - -/* - * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. - * - * XXX SYSC register handling does not belong in the clock framework - */ -static struct uart_clk uart3_16xx = { - .clk = { - .name = "uart3_ck", - .ops = &clkops_uart_16xx, - /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_UART3_CLK_MODE_R, - }, - .sysc_addr = 0xfffb9854, -}; - -static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ - .name = "usb_clko", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 6000000, - .flags = ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), - .enable_bit = USB_MCLK_EN_BIT, -}; - -static struct clk usb_hhc_ck1510 = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ - .flags = ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = USB_HOST_HHC_UHOST_EN, -}; - -static struct clk usb_hhc_ck16xx = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, - /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ - .flags = ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ - .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT -}; - -static struct clk usb_dc_ck = { - .name = "usb_dc_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 48000000, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, -}; - -static struct clk uart1_7xx = { - .name = "uart1_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 12000000, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 9, -}; - -static struct clk uart2_7xx = { - .name = "uart2_ck", - .ops = &clkops_generic, - /* Direct from ULPD, no parent */ - .rate = 12000000, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 11, -}; - -static struct clk mclk_1510 = { - .name = "mclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .rate = 12000000, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, -}; - -static struct clk mclk_16xx = { - .name = "mclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), - .enable_bit = COM_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, -}; - -static struct clk bclk_1510 = { - .name = "bclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .rate = 12000000, -}; - -static struct clk bclk_16xx = { - .name = "bclk", - .ops = &clkops_generic, - /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), - .enable_bit = SWD_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, -}; - -static struct clk mmc1_ck = { - .name = "mmc1_ck", - .ops = &clkops_generic, - /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, -}; - -/* - * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as - * CONF_MOD_MCBSP3_AUXON ?? - */ -static struct clk mmc2_ck = { - .name = "mmc2_ck", - .ops = &clkops_generic, - /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), - .enable_bit = 20, -}; - -static struct clk mmc3_ck = { - .name = "mmc3_ck", - .ops = &clkops_generic, - /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, - .rate = 48000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, -}; - -static struct clk virtual_ck_mpu = { - .name = "mpu", - .ops = &clkops_null, - .parent = &arm_ck, /* Is smarter alias for */ - .recalc = &followparent_recalc, - .set_rate = &omap1_select_table_rate, - .round_rate = &omap1_round_to_table_rate, -}; - -/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK -remains active during MPU idle whenever this is enabled */ -static struct clk i2c_fck = { - .name = "i2c_fck", - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armxor_ck.clk, - .recalc = &followparent_recalc, -}; - -static struct clk i2c_ick = { - .name = "i2c_ick", - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armper_ck.clk, - .recalc = &followparent_recalc, -}; - -/* - * clkdev integration - */ - -static struct omap_clk omap_clks[] = { - /* non-ULPD clocks */ - CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), - /* CK_GEN1 clocks */ - CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), - CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), - CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310), - CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), - CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), - /* CK_GEN2 clocks */ - CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), - /* CK_GEN3 clocks */ - CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), - CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), - CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), - CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), - CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), - CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), - CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), - CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), - CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), - CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), - /* ULPD clocks */ - CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), - CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), - CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), - CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), - CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), - CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), - CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX), - CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), - CLK(NULL, "mclk", &mclk_16xx, CK_16XX), - CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), - CLK(NULL, "bclk", &bclk_16xx, CK_16XX), - CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), - CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), - CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), - /* Virtual clocks */ - CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), - CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX), - CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), - CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), - CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), - CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), -}; - -/* - * init - */ - -static void __init omap1_show_rates(void) -{ - pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", - ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, - ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, - arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); -} - -u32 cpu_mask; - -int __init omap1_clk_init(void) -{ - struct omap_clk *c; - int crystal_type = 0; /* Default 12 MHz */ - u32 reg; - -#ifdef CONFIG_DEBUG_LL - /* - * Resets some clocks that may be left on from bootloader, - * but leaves serial clocks on. - */ - omap_writel(0x3 << 29, MOD_CONF_CTRL_0); -#endif - - /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ - reg = omap_readw(SOFT_REQ_REG) & (1 << 4); - omap_writew(reg, SOFT_REQ_REG); - if (!cpu_is_omap15xx()) - omap_writew(0, SOFT_REQ_REG2); - - /* By default all idlect1 clocks are allowed to idle */ - arm_idlect1_mask = ~0; - - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(c->lk.clk); - - cpu_mask = 0; - if (cpu_is_omap1710()) - cpu_mask |= CK_1710; - if (cpu_is_omap16xx()) - cpu_mask |= CK_16XX; - if (cpu_is_omap1510()) - cpu_mask |= CK_1510; - if (cpu_is_omap7xx()) - cpu_mask |= CK_7XX; - if (cpu_is_omap310()) - cpu_mask |= CK_310; - - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - if (c->cpu & cpu_mask) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); - } - - /* Pointers to these clocks are needed by code in clock.c */ - api_ck_p = clk_get(NULL, "api_ck"); - ck_dpll1_p = clk_get(NULL, "ck_dpll1"); - ck_ref_p = clk_get(NULL, "ck_ref"); - - if (cpu_is_omap7xx()) - ck_ref.rate = 13000000; - if (cpu_is_omap16xx() && crystal_type == 2) - ck_ref.rate = 19200000; - - pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", - omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), - omap_readw(ARM_CKCTL)); - - /* We want to be in syncronous scalable mode */ - omap_writew(0x1000, ARM_SYSST); - - - /* - * Initially use the values set by bootloader. Determine PLL rate and - * recalculate dependent clocks as if kernel had changed PLL or - * divisors. See also omap1_clk_late_init() that can reprogram dpll1 - * after the SRAM is initialized. - */ - { - unsigned pll_ctl_val = omap_readw(DPLL_CTL); - - ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */ - if (pll_ctl_val & 0x10) { - /* PLL enabled, apply multiplier and divisor */ - if (pll_ctl_val & 0xf80) - ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7; - ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1; - } else { - /* PLL disabled, apply bypass divisor */ - switch (pll_ctl_val & 0xc) { - case 0: - break; - case 0x4: - ck_dpll1.rate /= 2; - break; - default: - ck_dpll1.rate /= 4; - break; - } - } - } - propagate_rate(&ck_dpll1); - /* Cache rates for clocks connected to ck_ref (not dpll1) */ - propagate_rate(&ck_ref); - omap1_show_rates(); - if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { - /* Select slicer output as OMAP input clock */ - omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, - OMAP7XX_PCC_UPLD_CTRL); - } - - /* Amstrad Delta wants BCLK high when inactive */ - if (machine_is_ams_delta()) - omap_writel(omap_readl(ULPD_CLOCK_CTRL) | - (1 << SDW_MCLK_INV_BIT), - ULPD_CLOCK_CTRL); - - /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ - /* (on 730, bit 13 must not be cleared) */ - if (cpu_is_omap7xx()) - omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); - else - omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); - - /* Put DSP/MPUI into reset until needed */ - omap_writew(0, ARM_RSTCT1); - omap_writew(1, ARM_RSTCT2); - omap_writew(0x400, ARM_IDLECT1); - - /* - * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8) - * of the ARM_IDLECT2 register must be set to zero. The power-on - * default value of this bit is one. - */ - omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ - - /* - * Only enable those clocks we will need, let the drivers - * enable other clocks as necessary - */ - clk_enable(&armper_ck.clk); - clk_enable(&armxor_ck.clk); - clk_enable(&armtim_ck.clk); /* This should be done by timer code */ - - if (cpu_is_omap15xx()) - clk_enable(&arm_gpio_ck); - - return 0; -} - -#define OMAP1_DPLL1_SANE_VALUE 60000000 - -void __init omap1_clk_late_init(void) -{ - unsigned long rate = ck_dpll1.rate; - - /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { - pr_err("System frequencies not set, using default. Check your config.\n"); - /* - * Reprogramming the DPLL is tricky, it must be done from SRAM. - */ - omap_sram_reprogram_clock(0x2290, 0x0005); - ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; - } - propagate_rate(&ck_dpll1); - omap1_show_rates(); - loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate); -} diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 5ceff05e15c0..fb360902c6fc 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -77,6 +77,8 @@ void omap1_init_irq(void); void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs); void omap1_init_late(void); void omap1_restart(enum reboot_mode, const char *); +int omap1_clk_init(void); +void omap1_clk_late_init(void); extern void __init omap_check_revision(void); diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 36b03410b210..01213ad07b5c 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -25,7 +25,6 @@ #include "camera.h" #include "hardware.h" #include "common.h" -#include "clock.h" #include "mmc.h" #include "sram.h" diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index cf425aeeb240..b0465a956ea8 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -18,7 +18,6 @@ #include "mux.h" #include "iomap.h" #include "common.h" -#include "clock.h" /* * The machine specific code may provide the extra mapping besides the diff --git a/arch/arm/mach-omap1/opp.h b/arch/arm/mach-omap1/opp.h deleted file mode 100644 index 5b8b9c8edfe3..000000000000 --- a/arch/arm/mach-omap1/opp.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/arch/arm/mach-omap1/opp.h - * - * Copyright (C) 2004 - 2005 Nokia corporation - * Written by Tuukka Tikkanen - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - */ - -#ifndef __ARCH_ARM_MACH_OMAP1_OPP_H -#define __ARCH_ARM_MACH_OMAP1_OPP_H - -#include - -struct mpu_rate { - unsigned long rate; - unsigned long xtal; - unsigned long pll_rate; - __u16 ckctl_val; - __u16 dpllctl_val; - u32 flags; -}; - -extern struct mpu_rate omap1_rate_table[]; - -#endif diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c deleted file mode 100644 index a27ca7dc03a2..000000000000 --- a/arch/arm/mach-omap1/opp_data.c +++ /dev/null @@ -1,51 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-omap1/opp_data.c - * - * Copyright (C) 2004 - 2005 Nokia corporation - * Written by Tuukka Tikkanen - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - */ - -#include "clock.h" -#include "opp.h" - -/*------------------------------------------------------------------------- - * Omap1 MPU rate table - *-------------------------------------------------------------------------*/ -struct mpu_rate omap1_rate_table[] = { - /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL - * NOTE: Comment order here is different from bits in CKCTL value: - * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv - */ - { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */ - CK_1710 }, - { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */ - CK_7XX }, - { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */ - CK_16XX }, - { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */ - CK_16XX }, - { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */ - CK_16XX }, - { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */ - CK_16XX }, - { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */ - CK_16XX }, - { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */ - CK_7XX }, - { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */ - CK_16XX|CK_7XX }, - { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */ - CK_1510 }, - { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */ - CK_16XX|CK_1510|CK_310|CK_7XX }, - { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */ - CK_16XX|CK_1510|CK_310|CK_7XX }, - { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */ - CK_16XX|CK_1510|CK_310|CK_7XX }, - { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */ - CK_16XX|CK_1510|CK_310|CK_7XX }, - { 0, 0, 0, 0, 0 }, -}; - diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index dd3743c891b7..754119028138 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -61,7 +61,6 @@ #include "mux.h" #include "irqs.h" #include "iomap.h" -#include "clock.h" #include "pm.h" #include "soc.h" #include "sram.h" From patchwork Thu Aug 8 21:41:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084849 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 711AE1709 for ; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E08A28BC6 for ; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 522A428BC9; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B79E428BD0 for ; Thu, 8 Aug 2019 21:44:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733295AbfHHVnr (ORCPT ); Thu, 8 Aug 2019 17:43:47 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:40427 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390501AbfHHVnq (ORCPT ); Thu, 8 Aug 2019 17:43:46 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MMFdY-1hdko81SK6-00JGNw; Thu, 08 Aug 2019 23:43:14 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 17/22] ARM: omap1: remove some dead clock code Date: Thu, 8 Aug 2019 23:41:27 +0200 Message-Id: <20190808214232.2798396-3-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:KdAcg2K45cxcjuD+1lFeNverRo4wXC0I14A27oYzWwByGkUvdgD vgZ+L0u5wbdpPGYYDwPJ/H40AlNMGIz1ibgpmA8P3fTW5xOoYQKmUQSupknlxbIsUtWhSnJ nNxplpZBZZP33tRvr15RIKPraRMb3EU1cX89bVwOIHnjowCrv/f64BcUojWaeUd6Q4Qs+dj z2ttP+fjjsWmXBTnruKaQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:3M7oiyDqC7s=:PEtu9MAbpidC5/3nYSU/0H 5sIq4f/RRmodYDyj6F21P5UzP2rI6LzKX6i+wtRm1Sqns2piFrCI/SRERZU9S84gUD09RaOrE e46PaujwKyjD1INZ62xn9/ngq3XN++6L1gukUkGncyzDs2SW624dpFvaXS6v4PZ34qcvtuPgh U+dy7GLGrAWlNr4xwyZDGcTdPF1cktO7zMQ3qds6P2L3A+DPqPGzBo9mGZI4eRemm3R6KWb/d 41kLB1/7nygfK1o220NvQdf/7+RT0wtEbNNgSXF+sBRfzCCQZwVGW9ZHjcomM9osmAR76+7+A DX7CKj3okGq5ixUxsB3coUQgiNARBh6LU8hvBy+30k+T/GnyioB3oTgp1itapERzoNZpsYtL4 Wdp2MTM3dOgsD75YFGZ7oJxqEYvOmKjqfoN/NXMoh4OYdk/d484ZG8ZLaDcicew/49yF8GE8S A+o992UxQQCAm8aSoJTyPKHW+pei3qKuNAIHRN6vI32qqJCsFo2TuGqGRMdwV5YILnKMILnLO Gjtb0CpBiIo7nug/p/mqkmgLepK0FmJc0xVycmAQQHImn9DlgUELEvkWJRoDsFWdiv68yU0Cj zmvY10tVXYDqg7a9uIXzR0VKVWwzttR6ZW64IlA6yEiWoeVglUrmi4h5BSneu/Hmvfcr+XBK1 ttMRFdmz1gJhFAOAbu4+PoI9Rr9pERtmOKEfZ7eXMLM7ZC0H6X7wvfATNmGrHXImYRwDVI57J GalzMQGefyoEyaguKsivjffAWvz6pVkDt/Y6Qw== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Mark all internal functions as 'static', remove forward declarations and those functions that have no caller, as well as any unused macros or struct fields. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 409 +++++++++--------------------------- 1 file changed, 96 insertions(+), 313 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index bc51d5e24a9e..b2b0355fae4c 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -28,7 +28,6 @@ #include "sram.h" #include "usb.h" -struct module; struct clk; struct omap_clk { @@ -53,25 +52,14 @@ struct omap_clk { #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ - -/* Temporary, needed during the common clock framework conversion */ -#define __clk_get_name(clk) (clk->name) -#define __clk_get_parent(clk) (clk->parent) -#define __clk_get_rate(clk) (clk->rate) - /** * struct clkops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware - * @find_idlest: function returning the IDLEST register for the clock's IP blk - * @find_companion: function returning the "companion" clk reg for the clock - * @allow_idle: fn ptr that enables autoidle for the current clock in hardware - * @deny_idle: fn ptr that disables autoidle for the current clock in hardware * * A "companion" clk is an accompanying clock to the one being queried * that must be enabled for the IP module connected to the clock to * become accessible by the hardware. Neither @find_idlest nor - * @find_companion should be needed; that information is IP * block-specific; the hwmod code has been created to handle this, but * until hwmod data is ready and drivers have been converted to use PM * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and @@ -80,12 +68,6 @@ struct omap_clk { struct clkops { int (*enable)(struct clk *); void (*disable)(struct clk *); - void (*find_idlest)(struct clk *, void __iomem **, - u8 *, u8 *); - void (*find_companion)(struct clk *, void __iomem **, - u8 *); - void (*allow_idle)(struct clk *); - void (*deny_idle)(struct clk *); }; /* @@ -93,19 +75,10 @@ struct clkops { * * XXX document the rest of the clock flags here * - * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL - * bits share the same register. This flag allows the - * omap4_dpllmx*() code to determine which GATE_CTRL bit field - * should be used. This is a temporary solution - a better approach - * would be to associate clock type-specific data with the clock, - * similar to the struct dpll_data approach. */ #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) #define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ -#define CLOCK_CLKOUTX2 (1 << 5) /** * struct clk - OMAP struct clk @@ -126,9 +99,8 @@ struct clkops { * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div * @flags: see "struct clk.flags possibilities" above * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * @src_offset: bitshift for source selection bitfield (OMAP1 only) * - * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * XXX @rate_offset, should probably be removed and OMAP1 * clock code converted to use clksel. * * XXX @usecount is poorly named. It should be "enable_count" or @@ -166,67 +138,11 @@ struct clk { u8 fixed_div; u8 flags; u8 rate_offset; - u8 src_offset; #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) struct dentry *dent; /* For visible tree hierarchy */ #endif }; -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -}; - -extern int clk_init(struct clk_functions *custom_clocks); -extern void clk_preinit(struct clk *clk); -extern int clk_register(struct clk *clk); -extern void clk_reparent(struct clk *child, struct clk *parent); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); -extern unsigned long followparent_recalc(struct clk *clk); -extern void clk_enable_init_clocks(void); -unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern struct clk *omap_clk_get_by_name(const char *name); -extern int omap_clk_enable_autoidle_all(void); -extern int omap_clk_disable_autoidle_all(void); - -extern const struct clkops clkops_null; - -extern struct clk dummy_ck; - -extern int omap1_clk_enable(struct clk *clk); -extern void omap1_clk_disable(struct clk *clk); -extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_ckctl_recalc(struct clk *clk); -extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_sossi_recalc(struct clk *clk); -extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); -extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); -extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_uart_recalc(struct clk *clk); -extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); -extern void omap1_init_ext_clk(struct clk *clk); -extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern unsigned long omap1_watchdog_recalc(struct clk *clk); - -#ifdef CONFIG_OMAP_RESET_CLOCKS -extern void omap1_clk_disable_unused(struct clk *clk); -#else -#define omap1_clk_disable_unused NULL -#endif - struct uart_clk { struct clk clk; unsigned long sysc_addr; @@ -286,16 +202,9 @@ struct arm_idlect1_clk { #define SOFT_REQ_REG2 0xfffe0880 extern __u32 arm_idlect1_mask; -extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; - -extern const struct clkops clkops_dspck; -extern const struct clkops clkops_dummy; -extern const struct clkops clkops_uart_16xx; -extern const struct clkops clkops_generic; /* used for passing SoC type to omap1_{select,round_to}_table_rate() */ -extern u32 cpu_mask; - +static u32 cpu_mask; /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ #define IDL_CLKOUT_ARM_SHIFT 12 @@ -337,9 +246,8 @@ extern u32 cpu_mask; #define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ #define SOFT_DPLL_REQ_SHIFT 0 - __u32 arm_idlect1_mask; -struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +static struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); @@ -349,13 +257,13 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -unsigned long omap1_uart_recalc(struct clk *clk) +static unsigned long omap1_uart_recalc(struct clk *clk) { unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -unsigned long omap1_sossi_recalc(struct clk *clk) +static unsigned long omap1_sossi_recalc(struct clk *clk) { u32 div = omap_readl(MOD_CONF_CTRL_1); @@ -472,7 +380,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -unsigned long omap1_ckctl_recalc(struct clk *clk) +static unsigned long omap1_ckctl_recalc(struct clk *clk) { /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); @@ -480,24 +388,6 @@ unsigned long omap1_ckctl_recalc(struct clk *clk) return clk->parent->rate / dsor; } -unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) -{ - int dsor; - - /* Calculate divisor encoded as 2-bit exponent - * - * The clock control bits are in DSP domain, - * so api_ck is needed for access. - * Note that DSP_CKCTL virt addr = phys addr, so - * we must use __raw_readw() instead of omap_readw(). - */ - omap1_clk_enable(api_ck_p); - dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); - omap1_clk_disable(api_ck_p); - - return clk->parent->rate / dsor; -} - /*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ @@ -510,7 +400,7 @@ struct mpu_rate { u32 flags; }; -struct mpu_rate omap1_rate_table[] = { +static struct mpu_rate omap1_rate_table[] = { /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL * NOTE: Comment order here is different from bits in CKCTL value: * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv @@ -547,7 +437,7 @@ struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -int omap1_select_table_rate(struct clk *clk, unsigned long rate) +static int omap1_select_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; @@ -582,7 +472,7 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate) return 0; } -int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -602,7 +492,7 @@ int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) return 0; } -long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp = calc_dsor_exp(clk, rate); if (dsor_exp < 0) @@ -612,7 +502,7 @@ long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } -int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -632,7 +522,7 @@ int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) return 0; } -long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) +static long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; @@ -683,7 +573,7 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -int omap1_set_uart_rate(struct clk *clk, unsigned long rate) +static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) { unsigned int val; @@ -701,7 +591,7 @@ int omap1_set_uart_rate(struct clk *clk, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) { unsigned dsor; __u16 ratio_bits; @@ -719,7 +609,7 @@ int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) return 0; } -int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) { u32 l; int div; @@ -742,12 +632,12 @@ int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) return 0; } -long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) { return 96000000 / calc_ext_dsor(rate); } -void omap1_init_ext_clk(struct clk *clk) +static void omap1_init_ext_clk(struct clk *clk) { unsigned dsor; __u16 ratio_bits; @@ -765,7 +655,19 @@ void omap1_init_ext_clk(struct clk *clk) clk-> rate = 96000000 / dsor; } -int omap1_clk_enable(struct clk *clk) +static void omap1_clk_disable(struct clk *clk) +{ + if (clk->usecount > 0 && !(--clk->usecount)) { + clk->ops->disable(clk); + if (likely(clk->parent)) { + omap1_clk_disable(clk->parent); + if (clk->flags & CLOCK_NO_IDLE_PARENT) + omap1_clk_allow_idle(clk->parent); + } + } +} + +static omap1_clk_enable(struct clk *clk) { int ret = 0; @@ -793,18 +695,6 @@ int omap1_clk_enable(struct clk *clk) return ret; } -void omap1_clk_disable(struct clk *clk) -{ - if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk); - if (likely(clk->parent)) { - omap1_clk_disable(clk->parent); - if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(clk->parent); - } - } -} - static int omap1_clk_enable_generic(struct clk *clk) { __u16 regval16; @@ -848,11 +738,29 @@ static void omap1_clk_disable_generic(struct clk *clk) } } -const struct clkops clkops_generic = { +static const struct clkops clkops_generic = { .enable = omap1_clk_enable_generic, .disable = omap1_clk_disable_generic, }; +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +{ + int dsor; + + /* Calculate divisor encoded as 2-bit exponent + * + * The clock control bits are in DSP domain, + * so api_ck is needed for access. + * Note that DSP_CKCTL virt addr = phys addr, so + * we must use __raw_readw() instead of omap_readw(). + */ + omap1_clk_enable(api_ck_p); + dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); + omap1_clk_disable(api_ck_p); + + return clk->parent->rate / dsor; +} + static int omap1_clk_enable_dsp_domain(struct clk *clk) { int retval; @@ -874,7 +782,7 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk) } } -const struct clkops clkops_dspck = { +static const struct clkops clkops_dspck = { .enable = omap1_clk_enable_dsp_domain, .disable = omap1_clk_disable_dsp_domain, }; @@ -909,12 +817,12 @@ static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) } /* XXX SYSC register handling does not belong in the clock framework */ -const struct clkops clkops_uart_16xx = { +static const struct clkops clkops_uart_16xx = { .enable = omap1_clk_enable_uart_functional_16xx, .disable = omap1_clk_disable_uart_functional_16xx, }; -long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) { if (clk->round_rate != NULL) return clk->round_rate(clk, rate); @@ -922,7 +830,7 @@ long omap1_clk_round_rate(struct clk *clk, unsigned long rate) return clk->rate; } -int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) { int ret = -EINVAL; @@ -931,40 +839,21 @@ int omap1_clk_set_rate(struct clk *clk, unsigned long rate) return ret; } -/* - * Omap1 clock reset and init functions - */ - -#ifdef CONFIG_OMAP_RESET_CLOCKS - -void omap1_clk_disable_unused(struct clk *clk) +/* Propagate rate to children */ +static void propagate_rate(struct clk *tclk) { - __u32 regval32; + struct clk *clkp; - /* Clocks in the DSP domain need api_ck. Just assume bootloader - * has not enabled any DSP clocks */ - if (clk->enable_reg == DSP_IDLECT2) { - pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->name); - return; + list_for_each_entry(clkp, &tclk->children, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); } - - /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = __raw_readw(clk->enable_reg); - - if ((regval32 & (1 << clk->enable_bit)) == 0) - return; - - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); - printk(" done\n"); } -#endif - +/* + * Omap1 clock reset and init functions + */ int clk_enable(struct clk *clk) { @@ -1077,7 +966,7 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -unsigned long followparent_recalc(struct clk *clk) +static unsigned long followparent_recalc(struct clk *clk) { return clk->parent->rate; } @@ -1086,56 +975,13 @@ unsigned long followparent_recalc(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -unsigned long omap_fixed_divisor_recalc(struct clk *clk) +static unsigned long omap_fixed_divisor_recalc(struct clk *clk) { WARN_ON(!clk->fixed_div); return clk->parent->rate / clk->fixed_div; } -void clk_reparent(struct clk *child, struct clk *parent) -{ - list_del_init(&child->sibling); - if (parent) - list_add(&child->sibling, &parent->children); - child->parent = parent; - - /* now do the debugfs renaming to reattach the child - to the proper parent */ -} - -/* Propagate rate to children */ -void propagate_rate(struct clk *tclk) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -static LIST_HEAD(root_clks); - -/** - * recalculate_root_clocks - recalculate and propagate all root clocks - * - * Recalculates all root clocks (clocks with no parent), which if the - * clock's .recalc is set correctly, should also propagate their rates. - * Called at init. - */ -void recalculate_root_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &root_clks, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - /** * clk_preinit - initialize any fields in the struct clk before clk init * @clk: struct clk * to initialize @@ -1143,12 +989,12 @@ void recalculate_root_clocks(void) * Initialize any struct clk fields needed before normal clk initialization * can run. No return value. */ -void clk_preinit(struct clk *clk) +static void clk_preinit(struct clk *clk) { INIT_LIST_HEAD(&clk->children); } -int clk_register(struct clk *clk) +static int clk_register(struct clk *clk) { if (clk == NULL || IS_ERR(clk)) return -EINVAL; @@ -1162,8 +1008,6 @@ int clk_register(struct clk *clk) mutex_lock(&clocks_mutex); if (clk->parent) list_add(&clk->sibling, &clk->parent->children); - else - list_add(&clk->sibling, &root_clks); list_add(&clk->node, &clocks); if (clk->init) @@ -1172,87 +1016,6 @@ int clk_register(struct clk *clk) return 0; } -EXPORT_SYMBOL(clk_register); - -void clk_unregister(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - - mutex_lock(&clocks_mutex); - list_del(&clk->sibling); - list_del(&clk->node); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_unregister); - -void clk_enable_init_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &clocks, node) - if (clkp->flags & ENABLE_ON_INIT) - clk_enable(clkp); -} - -/** - * omap_clk_get_by_name - locate OMAP struct clk by its name - * @name: name of the struct clk to locate - * - * Locate an OMAP struct clk by its name. Assumes that struct clk - * names are unique. Returns NULL if not found or a pointer to the - * struct clk if found. - */ -struct clk *omap_clk_get_by_name(const char *name) -{ - struct clk *c; - struct clk *ret = NULL; - - mutex_lock(&clocks_mutex); - - list_for_each_entry(c, &clocks, node) { - if (!strcmp(c->name, name)) { - ret = c; - break; - } - } - - mutex_unlock(&clocks_mutex); - - return ret; -} - -int omap_clk_enable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->allow_idle) - c->ops->allow_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - -int omap_clk_disable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->deny_idle) - c->ops->deny_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} /* * Low level helpers @@ -1266,7 +1029,7 @@ static void clkll_disable_null(struct clk *clk) { } -const struct clkops clkops_null = { +static const struct clkops clkops_null = { .enable = clkll_enable_null, .disable = clkll_disable_null, }; @@ -1276,7 +1039,7 @@ const struct clkops clkops_null = { * * Used for clock aliases that are needed on some OMAPs, but not others */ -struct clk dummy_ck = { +static struct clk dummy_ck = { .name = "dummy", .ops = &clkops_null, }; @@ -1289,6 +1052,32 @@ struct clk dummy_ck = { /* * Disable any unused clocks left on by the bootloader */ +static void omap1_clk_disable_unused(struct clk *clk) +{ + __u32 regval32; + + /* Clocks in the DSP domain need api_ck. Just assume bootloader + * has not enabled any DSP clocks */ + if (clk->enable_reg == DSP_IDLECT2) { + pr_info("Skipping reset check for DSP domain clock \"%s\"\n", + clk->name); + return; + } + + /* Is the clock already disabled? */ + if (clk->flags & ENABLE_REG_32BIT) + regval32 = __raw_readl(clk->enable_reg); + else + regval32 = __raw_readw(clk->enable_reg); + + if ((regval32 & (1 << clk->enable_bit)) == 0) + return; + + printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); + clk->ops->disable(clk); + printk(" done\n"); +} + static int __init clk_disable_unused(void) { struct clk *ck; @@ -1311,7 +1100,6 @@ static int __init clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -late_initcall(omap_clk_enable_autoidle_all); #endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) @@ -1414,8 +1202,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .name = "ck_dpll1out", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | - ENABLE_ON_INIT, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, @@ -1468,7 +1255,6 @@ static struct clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, @@ -1638,7 +1424,6 @@ static struct clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, @@ -2079,8 +1864,6 @@ static void __init omap1_show_rates(void) arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); } -u32 cpu_mask; - int __init omap1_clk_init(void) { struct omap_clk *c; From patchwork Thu Aug 8 21:41:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084845 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 390C313B1 for ; Thu, 8 Aug 2019 21:44:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 240A828BD3 for ; Thu, 8 Aug 2019 21:44:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 135AC28BC6; Thu, 8 Aug 2019 21:44:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0B0D428BC6 for ; Thu, 8 Aug 2019 21:44:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390151AbfHHVnz (ORCPT ); Thu, 8 Aug 2019 17:43:55 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:44535 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390510AbfHHVnw (ORCPT ); Thu, 8 Aug 2019 17:43:52 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MXYAj-1hp3Kg2zJ1-00YytR; Thu, 08 Aug 2019 23:43:21 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 18/22] ARM: omap1: clk: rework 'struct clk' Date: Thu, 8 Aug 2019 23:41:28 +0200 Message-Id: <20190808214232.2798396-4-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:F1b8+uHEy5radsEKMgXla6olW2Kqfyge+cZDihAIBDh3TRLHR5R gSorV8P6RQiQhUgQ1sMWIgTIGZsB2qiuAS+U6tovqQoNZLGbtuPd6WkSpHr3frzSKq0yH8S r5lu+RLy8zqPsu26Ieoc5gk6gpUQcyi4Q7pTh1MjSBwvO+mrHXhQV4eZHoE++kFjZlBuUW0 9UOryq6i591QEDC8+rAZQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:OKEy0Y5Am+s=:m1VP6DQbuBve5wUr011IvC btOCW/hpzrEoTeTOGRmj/EBIIJJlNw0GCrWawllPJygdd3soRvSIelDM+Wh59x3lCl+viJ0DE 3R9phVeaQ7utF375qAyoY2dQLI2oV5xpPGbpps8U71dqt797pgPjFdgdaEURQHcsi0yjOz2Ue ISmrbTTydW0a0UgwdHBtKI/2JsDOA63IICTiJ3fbZK2N2PbA2geRcV83HPHbsFrADHzsOpgQ8 u/rqY2QQhX6myo7j8zg+71+qJz1bpliOmEFlTKhknTWPHzcI+QWpWuI5BmrECZlZrFLFw2IMd N9q38tNFfAlqgINREw4mEbNvCqQELE8pFQUsWLMnauVT/05lazj0JOlZ4rivtiOQKDM/n+eOE 8WtP3WPB/4UuWsp/yVGhX20TRzPgwlZGbfsQ6O95JyEWned1x5Oo3ObNkPyy8tXoU5AacO14h fCBwR7pMn++EpSuBKkO8L6qfdx0MOe351fC4i0JEYa7G0yMKkpd5YaKrxb4ubaSw8sV1bQYwa GO5gbOLWBfon5pAClBhel1Ky9Cbn1xLKNUscIu0Y8fsHPxKD8nhaPYu2TNsbKUfGIxX81yzis eYdqt3fuaoAwM2Fhv0IsCKVKOjLKQN63AjlvodXKxbwjsD3GhXEvvhscvUVJcqoSvL1oWgJQv 9Ra8wTyO8S12JF+C0GI2dVr60AdE7iT3zCCqSCdVnioP7nWsPUhitc9sPtSfFawTrj22PLBm5 MsDwjN2cfEItC1OKRMqGTmDAvfKJBY5J6fdaBQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To get closer to the way the common_clk code works, rename the omap1 struct clk to 'omap1_clk', and add trivial 'clk_hw' and 'clk' wrapper to work like the generic counterparts. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 364 ++++++++++++++++++++---------------- 1 file changed, 205 insertions(+), 159 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index b2b0355fae4c..577686f61b3b 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -28,20 +28,20 @@ #include "sram.h" #include "usb.h" -struct clk; +struct omap1_clk; -struct omap_clk { +struct omap1_clk_lookup { u16 cpu; struct clk_lookup lk; }; #define CLK(dev, con, ck, cp) \ { \ - .cpu = cp, \ + .cpu = cp, \ .lk = { \ + .clk_hw = (&(ck)->clk_hw), \ .dev_id = dev, \ .con_id = con, \ - .clk = ck, \ }, \ } @@ -53,7 +53,7 @@ struct omap_clk { #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ /** - * struct clkops - some clock function pointers + * struct clk_ops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware * @@ -65,13 +65,13 @@ struct omap_clk { * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and * @find_companion must, unfortunately, remain. */ -struct clkops { - int (*enable)(struct clk *); - void (*disable)(struct clk *); +struct clk_ops { + int (*enable)(struct clk_hw *); + void (*disable)(struct clk_hw *); }; /* - * struct clk.flags possibilities + * struct omap1_clk.flags possibilities * * XXX document the rest of the clock flags here * @@ -81,7 +81,7 @@ struct clkops { #define CLOCK_NO_IDLE_PARENT (1 << 2) /** - * struct clk - OMAP struct clk + * struct omap1_clk - OMAP struct clk * @node: list_head connecting this clock into the full clock list * @ops: struct clkops * for this clock * @name: the name of the clock in the hardware (used in hwmod data and debug) @@ -121,18 +121,27 @@ struct clkops { * separated from the clock's target rate. */ struct clk { + struct clk_hw *clk_hw; +}; + +struct clk_hw { + struct clk clk; +}; + +struct omap1_clk { + struct clk_hw clk_hw; struct list_head node; - const struct clkops *ops; + const struct clk_ops *ops; const char *name; - struct clk *parent; + struct omap1_clk *parent; struct list_head children; struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; - unsigned long (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); + unsigned long (*recalc)(struct clk_hw *); + int (*set_rate)(struct clk_hw *, unsigned long); + long (*round_rate)(struct clk_hw *, unsigned long); + void (*init)(struct clk_hw *); u8 enable_bit; s8 usecount; u8 fixed_div; @@ -143,14 +152,16 @@ struct clk { #endif }; +#define to_omap1_clk(__hw) container_of((__hw), struct omap1_clk, clk_hw) + struct uart_clk { - struct clk clk; + struct omap1_clk clk; unsigned long sysc_addr; }; /* Provide a method for preventing idling some ARM IDLECT clocks */ struct arm_idlect1_clk { - struct clk clk; + struct omap1_clk clk; unsigned long no_idle_count; __u8 idlect_shift; }; @@ -217,20 +228,20 @@ static u32 cpu_mask; #define IDLXORP_ARM_SHIFT 1 #define IDLWDT_ARM_SHIFT 0 -/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ +/* Some MOD_CONF_CTRL_0 bit shifts - used in struct omap1_clk.enable_bit */ #define CONF_MOD_UART3_CLK_MODE_R 31 #define CONF_MOD_UART2_CLK_MODE_R 30 #define CONF_MOD_UART1_CLK_MODE_R 29 #define CONF_MOD_MMC_SD_CLK_REQ_R 23 #define CONF_MOD_MCBSP3_AUXON 20 -/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ +/* Some MOD_CONF_CTRL_1 bit shifts - used in struct omap1_clk.enable_bit */ #define CONF_MOD_SOSSI_CLK_EN_R 16 /* Some OTG_SYSCON_2-specific bit fields */ #define OTG_SYSCON_2_UHOST_EN_SHIFT 8 -/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ +/* Some SOFT_REQ_REG bit fields - used in struct omap1_clk.enable_bit */ #define SOFT_MMC2_DPLL_REQ_SHIFT 13 #define SOFT_MMC_DPLL_REQ_SHIFT 12 #define SOFT_UART3_DPLL_REQ_SHIFT 11 @@ -247,7 +258,7 @@ static u32 cpu_mask; #define SOFT_DPLL_REQ_SHIFT 0 __u32 arm_idlect1_mask; -static struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +static struct clk_hw *api_ck_p, *ck_dpll1_p, *ck_ref_p; static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); @@ -257,14 +268,16 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -static unsigned long omap1_uart_recalc(struct clk *clk) +static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -static unsigned long omap1_sossi_recalc(struct clk *clk) +static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; @@ -273,9 +286,10 @@ static unsigned long omap1_sossi_recalc(struct clk *clk) return clk->parent->rate / div; } -static void omap1_clk_allow_idle(struct clk *clk) +static void omap1_clk_allow_idle(struct clk_hw *clk_hw) { - struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; + struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct arm_idlect1_clk * iclk = container_of(clk, struct arm_idlect1_clk, clk); if (!(clk->flags & CLOCK_IDLE_CONTROL)) return; @@ -284,9 +298,10 @@ static void omap1_clk_allow_idle(struct clk *clk) arm_idlect1_mask |= 1 << iclk->idlect_shift; } -static void omap1_clk_deny_idle(struct clk *clk) +static void omap1_clk_deny_idle(struct clk_hw *clk_hw) { - struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; + struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct arm_idlect1_clk * iclk = container_of(clk, struct arm_idlect1_clk, clk); if (!(clk->flags & CLOCK_IDLE_CONTROL)) return; @@ -348,7 +363,7 @@ static __u16 verify_ckctl_value(__u16 newval) return newval; } -static int calc_dsor_exp(struct clk *clk, unsigned long rate) +static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) { /* Note: If target frequency is too low, this function will return 4, * which is invalid value. Caller must check for this value and act @@ -362,7 +377,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) * DSPMMU_CK >= TC_CK */ unsigned long realrate; - struct clk * parent; + struct omap1_clk * parent; unsigned dsor_exp; parent = clk->parent; @@ -380,8 +395,9 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk *clk) +static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); @@ -437,13 +453,13 @@ static struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -static int omap1_select_table_rate(struct clk *clk, unsigned long rate) +static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; unsigned long ref_rate; - ref_rate = ck_ref_p->rate; + ref_rate = to_omap1_clk(ck_ref_p)->rate; for (ptr = omap1_rate_table; ptr->rate; ptr++) { if (!(ptr->flags & cpu_mask)) @@ -467,13 +483,14 @@ static int omap1_select_table_rate(struct clk *clk, unsigned long rate) omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); /* XXX Do we need to recalculate the tree below DPLL1 at this point? */ - ck_dpll1_p->rate = ptr->pll_rate; + to_omap1_clk(ck_dpll1_p)->rate = ptr->pll_rate; return 0; } -static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; @@ -492,8 +509,9 @@ static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) return 0; } -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp = calc_dsor_exp(clk, rate); if (dsor_exp < 0) return dsor_exp; @@ -502,8 +520,9 @@ static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; @@ -522,14 +541,14 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) +static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; long highest_rate; unsigned long ref_rate; - ref_rate = ck_ref_p->rate; + ref_rate = to_omap1_clk(ck_ref_p)->rate; highest_rate = -EINVAL; @@ -573,8 +592,9 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) +static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val; val = __raw_readl(clk->enable_reg); @@ -591,8 +611,9 @@ static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; __u16 ratio_bits; @@ -609,8 +630,9 @@ static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) return 0; } -static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 l; int div; unsigned long p_rate; @@ -632,13 +654,14 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) { return 96000000 / calc_ext_dsor(rate); } -static void omap1_init_ext_clk(struct clk *clk) +static void omap1_init_ext_clk(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; __u16 ratio_bits; @@ -655,36 +678,39 @@ static void omap1_init_ext_clk(struct clk *clk) clk-> rate = 96000000 / dsor; } -static void omap1_clk_disable(struct clk *clk) +static void omap1_clk_disable(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk); + clk->ops->disable(&clk->clk_hw); if (likely(clk->parent)) { - omap1_clk_disable(clk->parent); + omap1_clk_disable(&clk->parent->clk_hw); if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(clk->parent); + omap1_clk_allow_idle(&clk->parent->clk_hw); } } } -static omap1_clk_enable(struct clk *clk) +static omap1_clk_enable(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret = 0; if (clk->usecount++ == 0) { if (clk->parent) { - ret = omap1_clk_enable(clk->parent); + ret = omap1_clk_enable(&clk->parent->clk_hw); if (ret) goto err; if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_deny_idle(clk->parent); + omap1_clk_deny_idle(&clk->parent->clk_hw); } - ret = clk->ops->enable(clk); + ret = clk->ops->enable(&clk->clk_hw); if (ret) { if (clk->parent) - omap1_clk_disable(clk->parent); + omap1_clk_disable(&clk->parent->clk_hw); goto err; } } @@ -695,8 +721,9 @@ static omap1_clk_enable(struct clk *clk) return ret; } -static int omap1_clk_enable_generic(struct clk *clk) +static int omap1_clk_enable_generic(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); __u16 regval16; __u32 regval32; @@ -719,8 +746,9 @@ static int omap1_clk_enable_generic(struct clk *clk) return 0; } -static void omap1_clk_disable_generic(struct clk *clk) +static void omap1_clk_disable_generic(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); __u16 regval16; __u32 regval32; @@ -738,13 +766,14 @@ static void omap1_clk_disable_generic(struct clk *clk) } } -static const struct clkops clkops_generic = { +static const struct clk_ops clkops_generic = { .enable = omap1_clk_enable_generic, .disable = omap1_clk_disable_generic, }; -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor; /* Calculate divisor encoded as 2-bit exponent @@ -761,42 +790,44 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) return clk->parent->rate / dsor; } -static int omap1_clk_enable_dsp_domain(struct clk *clk) +static int omap1_clk_enable_dsp_domain(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int retval; retval = omap1_clk_enable(api_ck_p); if (!retval) { - retval = omap1_clk_enable_generic(clk); + retval = omap1_clk_enable_generic(&clk->clk_hw); omap1_clk_disable(api_ck_p); } return retval; } -static void omap1_clk_disable_dsp_domain(struct clk *clk) +static void omap1_clk_disable_dsp_domain(struct clk_hw *clk_hw) { if (omap1_clk_enable(api_ck_p) == 0) { - omap1_clk_disable_generic(clk); + omap1_clk_disable_generic(clk_hw); omap1_clk_disable(api_ck_p); } } -static const struct clkops clkops_dspck = { +static const struct clk_ops clkops_dspck = { .enable = omap1_clk_enable_dsp_domain, .disable = omap1_clk_disable_dsp_domain, }; /* XXX SYSC register handling does not belong in the clock framework */ -static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) +static int omap1_clk_enable_uart_functional_16xx(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret; struct uart_clk *uclk; - ret = omap1_clk_enable_generic(clk); + ret = omap1_clk_enable_generic(&clk->clk_hw); if (ret == 0) { /* Set smart idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; + uclk = container_of(clk, struct uart_clk, clk); omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8, uclk->sysc_addr); } @@ -805,48 +836,52 @@ static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) } /* XXX SYSC register handling does not belong in the clock framework */ -static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) +static void omap1_clk_disable_uart_functional_16xx(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); struct uart_clk *uclk; /* Set force idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; + uclk = container_of(clk, struct uart_clk, clk); omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); - omap1_clk_disable_generic(clk); + omap1_clk_disable_generic(clk_hw); } /* XXX SYSC register handling does not belong in the clock framework */ -static const struct clkops clkops_uart_16xx = { +static const struct clk_ops clkops_uart_16xx = { .enable = omap1_clk_enable_uart_functional_16xx, .disable = omap1_clk_disable_uart_functional_16xx, }; -static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk->round_rate != NULL) - return clk->round_rate(clk, rate); + return clk->round_rate(clk_hw, rate); return clk->rate; } -static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret = -EINVAL; if (clk->set_rate) - ret = clk->set_rate(clk, rate); + ret = clk->set_rate(clk_hw, rate); return ret; } /* Propagate rate to children */ -static void propagate_rate(struct clk *tclk) +static void propagate_rate(struct omap1_clk *tclk) { - struct clk *clkp; + struct omap1_clk *clkp; list_for_each_entry(clkp, &tclk->children, sibling) { if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); + clkp->rate = clkp->recalc(&clkp->clk_hw); propagate_rate(clkp); } } @@ -864,7 +899,7 @@ int clk_enable(struct clk *clk) return -EINVAL; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_enable(clk); + ret = omap1_clk_enable(clk->clk_hw); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -874,19 +909,20 @@ EXPORT_SYMBOL(clk_enable); void clk_disable(struct clk *clk) { unsigned long flags; + struct omap1_clk *_clk = to_omap1_clk(clk->clk_hw); if (clk == NULL || IS_ERR(clk)) return; spin_lock_irqsave(&clockfw_lock, flags); - if (clk->usecount == 0) { + if (_clk->usecount == 0) { pr_err("Trying disable clock %s with 0 usecount\n", - clk->name); + _clk->name); WARN_ON(1); goto out; } - omap1_clk_disable(clk); + omap1_clk_disable(clk->clk_hw); out: spin_unlock_irqrestore(&clockfw_lock, flags); @@ -902,7 +938,7 @@ unsigned long clk_get_rate(struct clk *clk) return 0; spin_lock_irqsave(&clockfw_lock, flags); - ret = clk->rate; + ret = to_omap1_clk(clk->clk_hw)->rate; spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -922,7 +958,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate) return 0; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_round_rate(clk, rate); + ret = omap1_clk_round_rate(clk->clk_hw, rate); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -938,9 +974,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) return ret; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_set_rate(clk, rate); + ret = omap1_clk_set_rate(clk->clk_hw, rate); if (ret == 0) - propagate_rate(clk); + propagate_rate(to_omap1_clk(clk->clk_hw)); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -957,7 +993,9 @@ EXPORT_SYMBOL(clk_set_parent); struct clk *clk_get_parent(struct clk *clk) { - return clk->parent; + struct omap1_clk *parent = to_omap1_clk(clk->clk_hw)->parent; + + return &parent->clk_hw.clk; } EXPORT_SYMBOL(clk_get_parent); @@ -966,8 +1004,10 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -static unsigned long followparent_recalc(struct clk *clk) +static unsigned long followparent_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + return clk->parent->rate; } @@ -975,27 +1015,31 @@ static unsigned long followparent_recalc(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -static unsigned long omap_fixed_divisor_recalc(struct clk *clk) +static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + WARN_ON(!clk->fixed_div); return clk->parent->rate / clk->fixed_div; } /** - * clk_preinit - initialize any fields in the struct clk before clk init - * @clk: struct clk * to initialize + * clk_preinit - initialize any fields in the struct omap1_clk before clk init + * @clk: struct omap1_clk * to initialize * - * Initialize any struct clk fields needed before normal clk initialization + * Initialize any struct omap1_clk fields needed before normal clk initialization * can run. No return value. */ -static void clk_preinit(struct clk *clk) +static void clk_preinit(struct omap1_clk *clk) { INIT_LIST_HEAD(&clk->children); } -static int clk_register(struct clk *clk) +static int clk_register(struct device *dev, struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk == NULL || IS_ERR(clk)) return -EINVAL; @@ -1005,13 +1049,15 @@ static int clk_register(struct clk *clk) if (clk->node.next || clk->node.prev) return 0; + clk_hw->clk.clk_hw = clk_hw; + mutex_lock(&clocks_mutex); if (clk->parent) list_add(&clk->sibling, &clk->parent->children); list_add(&clk->node, &clocks); if (clk->init) - clk->init(clk); + clk->init(&clk->clk_hw); mutex_unlock(&clocks_mutex); return 0; @@ -1020,16 +1066,16 @@ static int clk_register(struct clk *clk) /* * Low level helpers */ -static int clkll_enable_null(struct clk *clk) +static int clkll_enable_null(struct clk_hw *clk_hw) { return 0; } -static void clkll_disable_null(struct clk *clk) +static void clkll_disable_null(struct clk_hw *clk_hw) { } -static const struct clkops clkops_null = { +static const struct clk_ops clkops_null = { .enable = clkll_enable_null, .disable = clkll_disable_null, }; @@ -1039,7 +1085,7 @@ static const struct clkops clkops_null = { * * Used for clock aliases that are needed on some OMAPs, but not others */ -static struct clk dummy_ck = { +static struct omap1_clk dummy_ck = { .name = "dummy", .ops = &clkops_null, }; @@ -1052,7 +1098,7 @@ static struct clk dummy_ck = { /* * Disable any unused clocks left on by the bootloader */ -static void omap1_clk_disable_unused(struct clk *clk) +static void omap1_clk_disable_unused(struct omap1_clk *clk) { __u32 regval32; @@ -1074,13 +1120,13 @@ static void omap1_clk_disable_unused(struct clk *clk) return; printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); + clk->ops->disable(&clk->clk_hw); printk(" done\n"); } static int __init clk_disable_unused(void) { - struct clk *ck; + struct omap1_clk *ck; unsigned long flags; pr_info("clock: disabling unused clocks to save power\n"); @@ -1114,8 +1160,8 @@ static struct dentry *clk_debugfs_root; static int debug_clock_show(struct seq_file *s, void *unused) { - struct clk *c; - struct clk *pa; + struct omap1_clk *c; + struct omap1_clk *pa; mutex_lock(&clocks_mutex); seq_printf(s, "%-30s %-30s %-10s %s\n", @@ -1134,10 +1180,10 @@ static int debug_clock_show(struct seq_file *s, void *unused) DEFINE_SHOW_ATTRIBUTE(debug_clock); -static void clk_debugfs_register_one(struct clk *c) +static void clk_debugfs_register_one(struct omap1_clk *c) { struct dentry *d; - struct clk *pa = c->parent; + struct omap1_clk *pa = c->parent; d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); c->dent = d; @@ -1147,9 +1193,9 @@ static void clk_debugfs_register_one(struct clk *c) debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags); } -static void clk_debugfs_register(struct clk *c) +static void clk_debugfs_register(struct omap1_clk *c) { - struct clk *pa = c->parent; + struct omap1_clk *pa = c->parent; if (pa && !pa->dent) clk_debugfs_register(pa); @@ -1160,7 +1206,7 @@ static void clk_debugfs_register(struct clk *c) static int __init clk_debugfs_init(void) { - struct clk *c; + struct omap1_clk *c; struct dentry *d; d = debugfs_create_dir("clock", NULL); @@ -1181,13 +1227,13 @@ late_initcall(clk_debugfs_init); * Omap1 clocks */ -static struct clk ck_ref = { +static struct omap1_clk ck_ref = { .name = "ck_ref", .ops = &clkops_null, .rate = 12000000, }; -static struct clk ck_dpll1 = { +static struct omap1_clk ck_dpll1 = { .name = "ck_dpll1", .ops = &clkops_null, .parent = &ck_ref, @@ -1210,7 +1256,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; -static struct clk sossi_ck = { +static struct omap1_clk sossi_ck = { .name = "ck_sossi", .ops = &clkops_generic, .parent = &ck_dpll1out.clk, @@ -1221,7 +1267,7 @@ static struct clk sossi_ck = { .set_rate = &omap1_set_sossi_rate, }; -static struct clk arm_ck = { +static struct omap1_clk arm_ck = { .name = "arm_ck", .ops = &clkops_null, .parent = &ck_dpll1, @@ -1251,7 +1297,7 @@ static struct arm_idlect1_clk armper_ck = { * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ GPIO code for 1510 ] */ -static struct clk arm_gpio_ck = { +static struct omap1_clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1300,7 +1346,7 @@ static struct arm_idlect1_clk armwdt_ck = { .idlect_shift = IDLWDT_ARM_SHIFT, }; -static struct clk arminth_ck16xx = { +static struct omap1_clk arminth_ck16xx = { .name = "arminth_ck", .ops = &clkops_null, .parent = &arm_ck, @@ -1312,7 +1358,7 @@ static struct clk arminth_ck16xx = { */ }; -static struct clk dsp_ck = { +static struct omap1_clk dsp_ck = { .name = "dsp_ck", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1324,7 +1370,7 @@ static struct clk dsp_ck = { .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspmmu_ck = { +static struct omap1_clk dspmmu_ck = { .name = "dspmmu_ck", .ops = &clkops_null, .parent = &ck_dpll1, @@ -1334,7 +1380,7 @@ static struct clk dspmmu_ck = { .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspper_ck = { +static struct omap1_clk dspper_ck = { .name = "dspper_ck", .ops = &clkops_dspck, .parent = &ck_dpll1, @@ -1346,7 +1392,7 @@ static struct clk dspper_ck = { .set_rate = &omap1_clk_set_rate_dsp_domain, }; -static struct clk dspxor_ck = { +static struct omap1_clk dspxor_ck = { .name = "dspxor_ck", .ops = &clkops_dspck, .parent = &ck_ref, @@ -1355,7 +1401,7 @@ static struct clk dspxor_ck = { .recalc = &followparent_recalc, }; -static struct clk dsptim_ck = { +static struct omap1_clk dsptim_ck = { .name = "dsptim_ck", .ops = &clkops_dspck, .parent = &ck_ref, @@ -1378,7 +1424,7 @@ static struct arm_idlect1_clk tc_ck = { .idlect_shift = IDLIF_ARM_SHIFT, }; -static struct clk arminth_ck1510 = { +static struct omap1_clk arminth_ck1510 = { .name = "arminth_ck", .ops = &clkops_null, .parent = &tc_ck.clk, @@ -1389,7 +1435,7 @@ static struct clk arminth_ck1510 = { */ }; -static struct clk tipb_ck = { +static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", .ops = &clkops_null, @@ -1397,7 +1443,7 @@ static struct clk tipb_ck = { .recalc = &followparent_recalc, }; -static struct clk l3_ocpi_ck = { +static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", .ops = &clkops_generic, @@ -1407,7 +1453,7 @@ static struct clk l3_ocpi_ck = { .recalc = &followparent_recalc, }; -static struct clk tc1_ck = { +static struct omap1_clk tc1_ck = { .name = "tc1_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, @@ -1420,7 +1466,7 @@ static struct clk tc1_ck = { * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ pm.c (SRAM), CCP, Camera ] */ -static struct clk tc2_ck = { +static struct omap1_clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, @@ -1429,7 +1475,7 @@ static struct clk tc2_ck = { .recalc = &followparent_recalc, }; -static struct clk dma_ck = { +static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", .ops = &clkops_null, @@ -1437,7 +1483,7 @@ static struct clk dma_ck = { .recalc = &followparent_recalc, }; -static struct clk dma_lcdfree_ck = { +static struct omap1_clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", .ops = &clkops_null, .parent = &tc_ck.clk, @@ -1470,21 +1516,21 @@ static struct arm_idlect1_clk lb_ck = { .idlect_shift = IDLLB_ARM_SHIFT, }; -static struct clk rhea1_ck = { +static struct omap1_clk rhea1_ck = { .name = "rhea1_ck", .ops = &clkops_null, .parent = &tc_ck.clk, .recalc = &followparent_recalc, }; -static struct clk rhea2_ck = { +static struct omap1_clk rhea2_ck = { .name = "rhea2_ck", .ops = &clkops_null, .parent = &tc_ck.clk, .recalc = &followparent_recalc, }; -static struct clk lcd_ck_16xx = { +static struct omap1_clk lcd_ck_16xx = { .name = "lcd_ck", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1518,7 +1564,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = { * * XXX does this need SYSC register handling? */ -static struct clk uart1_1510 = { +static struct omap1_clk uart1_1510 = { .name = "uart1_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1557,7 +1603,7 @@ static struct uart_clk uart1_16xx = { * * XXX does this need SYSC register handling? */ -static struct clk uart2_ck = { +static struct omap1_clk uart2_ck = { .name = "uart2_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1576,7 +1622,7 @@ static struct clk uart2_ck = { * * XXX does this need SYSC register handling? */ -static struct clk uart3_1510 = { +static struct omap1_clk uart3_1510 = { .name = "uart3_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1609,7 +1655,7 @@ static struct uart_clk uart3_16xx = { .sysc_addr = 0xfffb9854, }; -static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ +static struct omap1_clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .name = "usb_clko", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1619,7 +1665,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .enable_bit = USB_MCLK_EN_BIT, }; -static struct clk usb_hhc_ck1510 = { +static struct omap1_clk usb_hhc_ck1510 = { .name = "usb_hhc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1629,7 +1675,7 @@ static struct clk usb_hhc_ck1510 = { .enable_bit = USB_HOST_HHC_UHOST_EN, }; -static struct clk usb_hhc_ck16xx = { +static struct omap1_clk usb_hhc_ck16xx = { .name = "usb_hhc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1640,7 +1686,7 @@ static struct clk usb_hhc_ck16xx = { .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT }; -static struct clk usb_dc_ck = { +static struct omap1_clk usb_dc_ck = { .name = "usb_dc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1649,7 +1695,7 @@ static struct clk usb_dc_ck = { .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, }; -static struct clk uart1_7xx = { +static struct omap1_clk uart1_7xx = { .name = "uart1_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1658,7 +1704,7 @@ static struct clk uart1_7xx = { .enable_bit = 9, }; -static struct clk uart2_7xx = { +static struct omap1_clk uart2_7xx = { .name = "uart2_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1667,7 +1713,7 @@ static struct clk uart2_7xx = { .enable_bit = 11, }; -static struct clk mclk_1510 = { +static struct omap1_clk mclk_1510 = { .name = "mclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1676,7 +1722,7 @@ static struct clk mclk_1510 = { .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; -static struct clk mclk_16xx = { +static struct omap1_clk mclk_16xx = { .name = "mclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1687,14 +1733,14 @@ static struct clk mclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk bclk_1510 = { +static struct omap1_clk bclk_1510 = { .name = "bclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, }; -static struct clk bclk_16xx = { +static struct omap1_clk bclk_16xx = { .name = "bclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1705,7 +1751,7 @@ static struct clk bclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk mmc1_ck = { +static struct omap1_clk mmc1_ck = { .name = "mmc1_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1720,7 +1766,7 @@ static struct clk mmc1_ck = { * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as * CONF_MOD_MCBSP3_AUXON ?? */ -static struct clk mmc2_ck = { +static struct omap1_clk mmc2_ck = { .name = "mmc2_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1731,7 +1777,7 @@ static struct clk mmc2_ck = { .enable_bit = 20, }; -static struct clk mmc3_ck = { +static struct omap1_clk mmc3_ck = { .name = "mmc3_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1742,7 +1788,7 @@ static struct clk mmc3_ck = { .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; -static struct clk virtual_ck_mpu = { +static struct omap1_clk virtual_ck_mpu = { .name = "mpu", .ops = &clkops_null, .parent = &arm_ck, /* Is smarter alias for */ @@ -1753,7 +1799,7 @@ static struct clk virtual_ck_mpu = { /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ -static struct clk i2c_fck = { +static struct omap1_clk i2c_fck = { .name = "i2c_fck", .ops = &clkops_null, .flags = CLOCK_NO_IDLE_PARENT, @@ -1761,7 +1807,7 @@ static struct clk i2c_fck = { .recalc = &followparent_recalc, }; -static struct clk i2c_ick = { +static struct omap1_clk i2c_ick = { .name = "i2c_ick", .ops = &clkops_null, .flags = CLOCK_NO_IDLE_PARENT, @@ -1773,7 +1819,7 @@ static struct clk i2c_ick = { * clkdev integration */ -static struct omap_clk omap_clks[] = { +static struct omap1_clk_lookup omap_clks[] = { /* non-ULPD clocks */ CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), @@ -1866,7 +1912,7 @@ static void __init omap1_show_rates(void) int __init omap1_clk_init(void) { - struct omap_clk *c; + struct omap1_clk_lookup *c; int crystal_type = 0; /* Default 12 MHz */ u32 reg; @@ -1888,7 +1934,7 @@ int __init omap1_clk_init(void) arm_idlect1_mask = ~0; for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(c->lk.clk); + clk_preinit(to_omap1_clk(c->lk.clk_hw)); cpu_mask = 0; if (cpu_is_omap1710()) @@ -1905,13 +1951,13 @@ int __init omap1_clk_init(void) for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) if (c->cpu & cpu_mask) { clkdev_add(&c->lk); - clk_register(c->lk.clk); + clk_register(NULL, c->lk.clk_hw); } /* Pointers to these clocks are needed by code in clock.c */ - api_ck_p = clk_get(NULL, "api_ck"); - ck_dpll1_p = clk_get(NULL, "ck_dpll1"); - ck_ref_p = clk_get(NULL, "ck_ref"); + api_ck_p = &api_ck.clk.clk_hw; + ck_dpll1_p = &ck_dpll1.clk_hw; + ck_ref_p = &ck_ref.clk_hw; if (cpu_is_omap7xx()) ck_ref.rate = 13000000; @@ -1994,12 +2040,12 @@ int __init omap1_clk_init(void) * Only enable those clocks we will need, let the drivers * enable other clocks as necessary */ - clk_enable(&armper_ck.clk); - clk_enable(&armxor_ck.clk); - clk_enable(&armtim_ck.clk); /* This should be done by timer code */ + omap1_clk_enable(&armper_ck.clk.clk_hw); + omap1_clk_enable(&armxor_ck.clk.clk_hw); + omap1_clk_enable(&armtim_ck.clk.clk_hw); /* This should be done by timer code */ if (cpu_is_omap15xx()) - clk_enable(&arm_gpio_ck); + omap1_clk_enable(&arm_gpio_ck.clk_hw); return 0; } @@ -2011,7 +2057,7 @@ void __init omap1_clk_late_init(void) unsigned long rate = ck_dpll1.rate; /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0)) { pr_err("System frequencies not set, using default. Check your config.\n"); /* * Reprogramming the DPLL is tricky, it must be done from SRAM. From patchwork Thu Aug 8 21:41:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084847 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C2F7746 for ; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 19C8C28BC6 for ; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0D9AD28BD3; Thu, 8 Aug 2019 21:44:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3719928BC9 for ; Thu, 8 Aug 2019 21:44:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732708AbfHHVnv (ORCPT ); Thu, 8 Aug 2019 17:43:51 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:38005 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390518AbfHHVnu (ORCPT ); Thu, 8 Aug 2019 17:43:50 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1McYP5-1iRsYj0bOf-00cz43; Thu, 08 Aug 2019 23:43:32 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 19/22] ARM: omap1: clk: use common_clk-like callbacks Date: Thu, 8 Aug 2019 23:41:29 +0200 Message-Id: <20190808214232.2798396-5-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:b8HK2EMT9di2Sk43vdvnOawkYOp4+8v9GbqhcSS03u02KK+6+yD ZvARKg+Caebq0d2G3lGLXvAyIscd6p1c4vlg7nexbhuZLpBciDZtN+uGa1rV1S2m4X5dn81 EooW7qRUoeert+lMdPaXv0iX+VCEXNy2jb57+FLXRCZlc1ft7BVejVsgWJygB4fJ8Fxr/XX mqj8o7MLHgTqW2zLGU58g== X-UI-Out-Filterresults: notjunk:1;V03:K0:TRx5sjOPgLU=:3g39GEv2uh8hz/FAhj98fW s8T+TyzvT/C/FT3V3avoZojNMbcmbNLx+ywat+023VcLQYh0bQWKpPDcEcM0MxDPrhrgXBZsU XKct7HdunUKjgpxpc3uOT6nLRaAqxRR51xtlFEwtsNmBs9XVfXgQ9CwxvorTKRBQFvEjPeM2F OWaisCF60n/2KP8IgySO4rIiruAnihTu33qWeSS8TmRx1ix0i+eHZ551cf+yFZga4JF0Ugmyu GozsaDeIqZQyErbPV7TiaGErKv7/GX2WzOPORI/mAW00R62TjwdvQinQL8MersYKI//hl9GkJ ochxhRnPXtp/mRD756oAlztAH4PnEblW0qmc8HLkh8Px657Hh8cFWX9p6jw/v6P/ZwWkFNT/M OOCVsH+XHnyQRD2iR57JinMGvS2qZn0Q5rSvHLdgBpz7kEQ03oUmMnTfhzzagNVSCD++a1hhZ WW3yfXYPhhl/rK0zQwtU3RXrEQgyTjLCahi6ef03NxijQTLjtVXyKQVDtZFjbCt6y49ORJT0Z sVEVLZvfnHBGGJB3ZzpQTN+efYPQXI/zwTedq7u5DcBei1KzE26CD5AuNQ+6rRZQrxpH43YmA 2kMrmKKPo0dfiG0mdVelvigg9FYzsZhQuL8lj4RQiqvEahUQix/agZQbkZXMJQClBq+ZawyRa azkdvMrtKnBZkzl/XHbdvWnHzuDakvepLQyOgkRFc8VDlO/3SHezxqjb1ohQUL2UcLjYmC31V tXNVeDvLeXdaUIXXpqk034184IQVJ1UYpcJklQ== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The callbacks for clocks are almost the same as those used on common_clk, now reduce the number of remaining differences: - make .recalc_rate and .round_rate take a parent_rate argument - move .recalc_rate/.set_rate/.round_rate/.init from 'struct clk_hw' into 'struct clk_ops'. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 368 ++++++++++++++++++++---------------- 1 file changed, 200 insertions(+), 168 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 577686f61b3b..8b4d5ee13ba0 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -56,6 +56,10 @@ struct omap1_clk_lookup { * struct clk_ops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware + * @recalc_rate: fn ptr that returns the clock's current rate + * @set_rate: fn ptr that can change the clock's current rate + * @round_rate: fn ptr that can round the clock's current rate + * @init: fn ptr to do clock-specific initialization * * A "companion" clk is an accompanying clock to the one being queried * that must be enabled for the IP module connected to the clock to @@ -66,8 +70,12 @@ struct omap1_clk_lookup { * @find_companion must, unfortunately, remain. */ struct clk_ops { - int (*enable)(struct clk_hw *); - void (*disable)(struct clk_hw *); + int (*enable)(struct clk_hw *); + void (*disable)(struct clk_hw *); + unsigned long (*recalc_rate)(struct clk_hw *, unsigned long); + int (*set_rate)(struct clk_hw *, unsigned long, unsigned long); + long (*round_rate)(struct clk_hw *, unsigned long, unsigned long *); + void (*init)(struct clk_hw *); }; /* @@ -90,10 +98,6 @@ struct clk_ops { * @sibling: list_head connecting this clk to its parent clk's @children * @rate: current clock rate * @enable_reg: register to write to enable the clock (see @enable_bit) - * @recalc: fn ptr that returns the clock's current rate - * @set_rate: fn ptr that can change the clock's current rate - * @round_rate: fn ptr that can round the clock's current rate - * @init: fn ptr to do clock-specific initialization * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) * @usecount: number of users that have requested this clock to be enabled * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div @@ -138,10 +142,6 @@ struct omap1_clk { struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; - unsigned long (*recalc)(struct clk_hw *); - int (*set_rate)(struct clk_hw *, unsigned long); - long (*round_rate)(struct clk_hw *, unsigned long); - void (*init)(struct clk_hw *); u8 enable_bit; s8 usecount; u8 fixed_div; @@ -268,22 +268,21 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { - struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; div++; - return clk->parent->rate / div; + return parent_rate / div; } static void omap1_clk_allow_idle(struct clk_hw *clk_hw) @@ -363,7 +362,7 @@ static __u16 verify_ckctl_value(__u16 newval) return newval; } -static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) +static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate, unsigned long parent_rate) { /* Note: If target frequency is too low, this function will return 4, * which is invalid value. Caller must check for this value and act @@ -377,14 +376,9 @@ static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) * DSPMMU_CK >= TC_CK */ unsigned long realrate; - struct omap1_clk * parent; unsigned dsor_exp; - parent = clk->parent; - if (unlikely(parent == NULL)) - return -EIO; - - realrate = parent->rate; + realrate = parent_rate; for (dsor_exp=0; dsor_exp<4; dsor_exp++) { if (realrate <= rate) break; @@ -395,13 +389,13 @@ static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); - return clk->parent->rate / dsor; + return parent_rate / dsor; } /*------------------------------------------------------------------------- @@ -453,7 +447,7 @@ static struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; @@ -488,13 +482,13 @@ static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) return 0; } -static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(clk, rate, parent_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) @@ -504,29 +498,29 @@ static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long ra regval &= ~(3 << clk->rate_offset); regval |= dsor_exp << clk->rate_offset; __raw_writew(regval, DSP_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = parent_rate / (1 << dsor_exp); return 0; } -static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); - int dsor_exp = calc_dsor_exp(clk, rate); + int dsor_exp = calc_dsor_exp(clk, rate, *parent_rate); if (dsor_exp < 0) return dsor_exp; if (dsor_exp > 3) dsor_exp = 3; - return clk->parent->rate / (1 << dsor_exp); + return *parent_rate / (1 << dsor_exp); } -static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(clk, rate, parent_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) @@ -537,11 +531,11 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rat regval |= dsor_exp << clk->rate_offset; regval = verify_ckctl_value(regval); omap_writew(regval, ARM_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = parent_rate / (1 << dsor_exp); return 0; } -static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; @@ -592,7 +586,7 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val; @@ -611,7 +605,7 @@ static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; @@ -630,16 +624,14 @@ static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) return 0; } -static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 l; int div; - unsigned long p_rate; - p_rate = clk->parent->rate; /* Round towards slower frequency */ - div = (p_rate + rate - 1) / rate; + div = (parent_rate + rate - 1) / rate; div--; if (div < 0 || div > 7) return -EINVAL; @@ -649,12 +641,12 @@ static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) l |= div << 17; omap_writel(l, MOD_CONF_CTRL_1); - clk->rate = p_rate / (div + 1); + clk->rate = parent_rate / (div + 1); return 0; } -static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { return 96000000 / calc_ext_dsor(rate); } @@ -678,16 +670,27 @@ static void omap1_init_ext_clk(struct clk_hw *clk_hw) clk-> rate = 96000000 / dsor; } +struct clk_hw *clk_hw_get_parent(const struct clk_hw *clk_hw) +{ + struct omap1_clk *clk = to_omap1_clk(clk_hw); + + if (!clk->parent) + return NULL; + + return &clk->parent->clk_hw; +} + static void omap1_clk_disable(struct clk_hw *clk_hw) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(&clk->clk_hw); - if (likely(clk->parent)) { - omap1_clk_disable(&clk->parent->clk_hw); + clk->ops->disable(clk_hw); + if (likely(parent)) { + omap1_clk_disable(parent); if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(&clk->parent->clk_hw); + omap1_clk_allow_idle(parent); } } } @@ -695,22 +698,23 @@ static void omap1_clk_disable(struct clk_hw *clk_hw) static omap1_clk_enable(struct clk_hw *clk_hw) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); int ret = 0; if (clk->usecount++ == 0) { - if (clk->parent) { - ret = omap1_clk_enable(&clk->parent->clk_hw); + if (parent) { + ret = omap1_clk_enable(parent); if (ret) goto err; if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_deny_idle(&clk->parent->clk_hw); + omap1_clk_deny_idle(parent); } ret = clk->ops->enable(&clk->clk_hw); if (ret) { - if (clk->parent) - omap1_clk_disable(&clk->parent->clk_hw); + if (parent) + omap1_clk_disable(parent); goto err; } } @@ -771,7 +775,7 @@ static const struct clk_ops clkops_generic = { .disable = omap1_clk_disable_generic, }; -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor; @@ -787,7 +791,7 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); omap1_clk_disable(api_ck_p); - return clk->parent->rate / dsor; + return parent_rate / dsor; } static int omap1_clk_enable_dsp_domain(struct clk_hw *clk_hw) @@ -812,11 +816,6 @@ static void omap1_clk_disable_dsp_domain(struct clk_hw *clk_hw) } } -static const struct clk_ops clkops_dspck = { - .enable = omap1_clk_enable_dsp_domain, - .disable = omap1_clk_disable_dsp_domain, -}; - /* XXX SYSC register handling does not belong in the clock framework */ static int omap1_clk_enable_uart_functional_16xx(struct clk_hw *clk_hw) { @@ -857,9 +856,20 @@ static const struct clk_ops clkops_uart_16xx = { static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); + struct omap1_clk *parent_clk; + unsigned long parent_rate = 0; + + if (parent) { + parent_clk = to_omap1_clk(parent); + parent_rate = parent_clk->rate; + } + + if (clk->ops->round_rate != NULL) + return clk->ops->round_rate(clk_hw, rate, &parent_rate); - if (clk->round_rate != NULL) - return clk->round_rate(clk_hw, rate); + if (parent) + parent_clk->rate = parent_rate; return clk->rate; } @@ -867,10 +877,15 @@ static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); + unsigned long parent_rate = 0; int ret = -EINVAL; - if (clk->set_rate) - ret = clk->set_rate(clk_hw, rate); + if (parent) + parent_rate = to_omap1_clk(parent)->rate; + + if (clk->ops->set_rate) + ret = clk->ops->set_rate(clk_hw, rate, parent_rate); return ret; } @@ -880,8 +895,8 @@ static void propagate_rate(struct omap1_clk *tclk) struct omap1_clk *clkp; list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(&clkp->clk_hw); + if (clkp->ops->recalc_rate) + clkp->rate = clkp->ops->recalc_rate(&clkp->clk_hw, tclk->rate); propagate_rate(clkp); } } @@ -993,9 +1008,12 @@ EXPORT_SYMBOL(clk_set_parent); struct clk *clk_get_parent(struct clk *clk) { - struct omap1_clk *parent = to_omap1_clk(clk->clk_hw)->parent; + struct clk_hw *parent = clk_hw_get_parent(clk->clk_hw); + + if (!parent) + return NULL; - return &parent->clk_hw.clk; + return &parent->clk; } EXPORT_SYMBOL(clk_get_parent); @@ -1004,24 +1022,22 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -static unsigned long followparent_recalc(struct clk_hw *clk_hw) +static unsigned long followparent_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { - struct omap1_clk *clk = to_omap1_clk(clk_hw); - - return clk->parent->rate; + return parent_rate; } /* * Used for clocks that have the same value as the parent clock, * divided by some factor */ -static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw) +static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); WARN_ON(!clk->fixed_div); - return clk->parent->rate / clk->fixed_div; + return parent_rate / clk->fixed_div; } /** @@ -1056,8 +1072,8 @@ static int clk_register(struct device *dev, struct clk_hw *clk_hw) list_add(&clk->sibling, &clk->parent->children); list_add(&clk->node, &clocks); - if (clk->init) - clk->init(&clk->clk_hw); + if (clk->ops->init) + clk->ops->init(&clk->clk_hw); mutex_unlock(&clocks_mutex); return 0; @@ -1080,6 +1096,12 @@ static const struct clk_ops clkops_null = { .disable = clkll_disable_null, }; +static const struct clk_ops clkops_followparent = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = followparent_recalc, +}; + /* * Dummy clock * @@ -1239,6 +1261,12 @@ static struct omap1_clk ck_dpll1 = { .parent = &ck_ref, }; +static const struct clk_ops clkops_generic_followparent = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = followparent_recalc, +}; + /* * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ FIX: SoSSI, SSR ] @@ -1246,33 +1274,50 @@ static struct omap1_clk ck_dpll1 = { static struct arm_idlect1_clk ck_dpll1out = { .clk = { .name = "ck_dpll1out", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, - .recalc = &followparent_recalc, }, .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; +static const struct clk_ops clkops_sossi = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = &omap1_sossi_recalc, + .set_rate = &omap1_set_sossi_rate, +}; + static struct omap1_clk sossi_ck = { .name = "ck_sossi", - .ops = &clkops_generic, + .ops = &clkops_sossi, .parent = &ck_dpll1out.clk, .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, - .recalc = &omap1_sossi_recalc, - .set_rate = &omap1_set_sossi_rate, +}; + +struct clk_ops clkops_null_ckctl = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct omap1_clk arm_ck = { .name = "arm_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .rate_offset = CKCTL_ARMDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, +}; + +struct clk_ops clkops_generic_ckctl = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = omap1_ckctl_recalc, .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }; @@ -1280,15 +1325,12 @@ static struct omap1_clk arm_ck = { static struct arm_idlect1_clk armper_ck = { .clk = { .name = "armper_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = IDLPER_ARM_SHIFT, }; @@ -1299,22 +1341,20 @@ static struct arm_idlect1_clk armper_ck = { */ static struct omap1_clk arm_gpio_ck = { .name = "ick", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk armxor_ck = { .clk = { .name = "armxor_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLXORP_ARM_SHIFT, }; @@ -1322,16 +1362,21 @@ static struct arm_idlect1_clk armxor_ck = { static struct arm_idlect1_clk armtim_ck = { .clk = { .name = "armtim_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_TIMCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLTIM_ARM_SHIFT, }; +static const struct clk_ops clkops_fixed_divisor = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = omap_fixed_divisor_recalc, +}; + static struct arm_idlect1_clk armwdt_ck = { .clk = { .name = "armwdt_ck", @@ -1341,16 +1386,14 @@ static struct arm_idlect1_clk armwdt_ck = { .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_WDTCK, .fixed_div = 14, - .recalc = &omap_fixed_divisor_recalc, }, .idlect_shift = IDLWDT_ARM_SHIFT, }; static struct omap1_clk arminth_ck16xx = { .name = "arminth_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &arm_ck, - .recalc = &followparent_recalc, /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * @@ -1360,24 +1403,26 @@ static struct omap1_clk arminth_ck16xx = { static struct omap1_clk dsp_ck = { .name = "dsp_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct omap1_clk dspmmu_ck = { .name = "dspmmu_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .rate_offset = CKCTL_DSPMMUDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, +}; + +static const struct clk_ops clkops_dspck = { + .enable = omap1_clk_enable_dsp_domain, + .disable = omap1_clk_disable_dsp_domain, + .recalc_rate = omap1_ckctl_recalc_dsp_domain, .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_dsp_domain, }; static struct omap1_clk dspper_ck = { @@ -1387,48 +1432,45 @@ static struct omap1_clk dspper_ck = { .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc_dsp_domain, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = &omap1_clk_set_rate_dsp_domain, +}; + +static const struct clk_ops clkops_dspck_followparent = { + .enable = omap1_clk_enable_dsp_domain, + .disable = omap1_clk_disable_dsp_domain, + .recalc_rate = followparent_recalc, }; static struct omap1_clk dspxor_ck = { .name = "dspxor_ck", - .ops = &clkops_dspck, + .ops = &clkops_dspck_followparent, .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }; static struct omap1_clk dsptim_ck = { .name = "dsptim_ck", - .ops = &clkops_dspck, + .ops = &clkops_dspck_followparent, .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk tc_ck = { .clk = { .name = "tc_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = IDLIF_ARM_SHIFT, }; static struct omap1_clk arminth_ck1510 = { .name = "arminth_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. @@ -1438,28 +1480,25 @@ static struct omap1_clk arminth_ck1510 = { static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_OCPI_CK, - .recalc = &followparent_recalc, }; static struct omap1_clk tc1_ck = { .name = "tc1_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC1_CK, - .recalc = &followparent_recalc, }; /* @@ -1468,37 +1507,33 @@ static struct omap1_clk tc1_ck = { */ static struct omap1_clk tc2_ck = { .name = "tc2_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, - .recalc = &followparent_recalc, }; static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk api_ck = { .clk = { .name = "api_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_APICK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLAPI_ARM_SHIFT, }; @@ -1506,58 +1541,56 @@ static struct arm_idlect1_clk api_ck = { static struct arm_idlect1_clk lb_ck = { .clk = { .name = "lb_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LBCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLLB_ARM_SHIFT, }; static struct omap1_clk rhea1_ck = { .name = "rhea1_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk rhea2_ck = { .name = "rhea2_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk lcd_ck_16xx = { .name = "lcd_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { .name = "lcd_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, }; +static const struct clk_ops clkops_uart = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .set_rate = omap1_set_uart_rate, + .recalc_rate = omap1_uart_recalc, +}; + /* * XXX The enable_bit here is misused - it simply switches between 12MHz * and 48MHz. Reimplement with clksel. @@ -1566,15 +1599,13 @@ static struct arm_idlect1_clk lcd_ck_1510 = { */ static struct omap1_clk uart1_1510 = { .name = "uart1_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART1_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1605,15 +1636,13 @@ static struct uart_clk uart1_16xx = { */ static struct omap1_clk uart2_ck = { .name = "uart2_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART2_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1624,15 +1653,13 @@ static struct omap1_clk uart2_ck = { */ static struct omap1_clk uart3_1510 = { .name = "uart3_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART3_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1722,15 +1749,20 @@ static struct omap1_clk mclk_1510 = { .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; +static const struct clk_ops clkops_ext_clk = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .set_rate = omap1_set_ext_clk_rate, + .round_rate = omap1_round_ext_clk_rate, + .init = omap1_init_ext_clk, +}; + static struct omap1_clk mclk_16xx = { .name = "mclk", - .ops = &clkops_generic, + .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), .enable_bit = COM_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, }; static struct omap1_clk bclk_1510 = { @@ -1742,13 +1774,10 @@ static struct omap1_clk bclk_1510 = { static struct omap1_clk bclk_16xx = { .name = "bclk", - .ops = &clkops_generic, + .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), .enable_bit = SWD_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, }; static struct omap1_clk mmc1_ck = { @@ -1788,31 +1817,34 @@ static struct omap1_clk mmc3_ck = { .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; +static const struct clk_ops clkops_mpu = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = followparent_recalc, + .set_rate = omap1_select_table_rate, + .round_rate = omap1_round_to_table_rate, +}; + static struct omap1_clk virtual_ck_mpu = { .name = "mpu", - .ops = &clkops_null, + .ops = &clkops_mpu, .parent = &arm_ck, /* Is smarter alias for */ - .recalc = &followparent_recalc, - .set_rate = &omap1_select_table_rate, - .round_rate = &omap1_round_to_table_rate, }; /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ static struct omap1_clk i2c_fck = { .name = "i2c_fck", - .ops = &clkops_null, + .ops = &clkops_followparent, .flags = CLOCK_NO_IDLE_PARENT, .parent = &armxor_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk i2c_ick = { .name = "i2c_ick", - .ops = &clkops_null, + .ops = &clkops_followparent, .flags = CLOCK_NO_IDLE_PARENT, .parent = &armper_ck.clk, - .recalc = &followparent_recalc, }; /* @@ -2057,7 +2089,7 @@ void __init omap1_clk_late_init(void) unsigned long rate = ck_dpll1.rate; /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0)) { + if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0, 0)) { pr_err("System frequencies not set, using default. Check your config.\n"); /* * Reprogramming the DPLL is tricky, it must be done from SRAM. From patchwork Thu Aug 8 21:43:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084853 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F135813B1 for ; Thu, 8 Aug 2019 21:44:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DEAB828BC6 for ; Thu, 8 Aug 2019 21:44:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D14D528BD3; Thu, 8 Aug 2019 21:44:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 57B0128BC6 for ; Thu, 8 Aug 2019 21:44:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725785AbfHHVo0 (ORCPT ); Thu, 8 Aug 2019 17:44:26 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:43669 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390296AbfHHVo0 (ORCPT ); Thu, 8 Aug 2019 17:44:26 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue010 [212.227.15.129]) with ESMTPA (Nemesis) id 1MkYHO-1iazFW2Apy-00m3mb; Thu, 08 Aug 2019 23:43:52 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 20/22] ARM: omap1: clk: use clk_init_data Date: Thu, 8 Aug 2019 23:43:38 +0200 Message-Id: <20190808214347.2865294-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:7CygOTNWAv1Av7TOKR/RAGZa48JmJsWvplaC3q5QjRSaot6Tf3G xSdZFqrddrDFAUElqBsK+HbI9Zq3JadcMPECZH3AUDApmDnaQ5ROETqev+ECyLyb7Ssjsqv ch2dT6C9CKYmOAZWc24iiTzrXHOC04g54TAGVHztuQ1c2wZhIo5PHxS8cRazgy4zMtDM9Uy ffAeBDyJSJhR0yyZTaJ7g== X-UI-Out-Filterresults: notjunk:1;V03:K0:hFAG7pdixrc=:J0ayFI++OrSdTM60JwL4ky Ducp45r6hG17ig/7aS5TRt2AeEPp858c405l9BwICopZ/ZKRxEfFd+KRUYLCh8aYDbtVFdj2/ NYkAKvlKG/Bopj1v2PFj+HmUT3Wx6tUmFTlU6cX4vUbk02qPkIjvWqCEFwTr/UjLvO0cHCEiJ AWxH2NNPk5HuNRkv0ZlvWQ/9LOkNFSptgN3WZqgkXA2tDPje6BurI7sK2FD5RyFL+S0lQs3Ea T8aVHrdU7C6rtJ+gctWqX+Tuy7edQN2K6KqoSEZ9ZIOT2ja2EwjNA8fgwRCN+qttYtCyoSujR I/AeQa7s7DfQvtqxIIIz4aEynOdjkiheGSjGDrIAYUea9/MfFV3JwNye0lp5RMm3L85Ciwh98 EC091m7EGIK9mMT2FnFzmwJvpwcFaSBc9Ohjnn8oNoTUfjcIwBsR0nDE2M+LQ1S75SG70wJL4 A0rfe7k7MWCsVFYFskYDlYye19oQ3yi1VxmjGp7hZmoSh9LHmWLqYe2rcRDcDavCGu/VHzmLq DgLhoYWOgBLzQkxn7vnwHTBQnlyfFVYYzaKd3d45RejZK5G4/8DVt1kg4ByODWlD6PCd3CHEy +2zmiqPo6mFEyAp3/m3MyjrT94f2bEe0C+pnf3Vt6jlv35g7MpX2RW7DahxtiSDO9SHmVkO26 CWXsDgsyW1ZAKYY78mJ5HS7NeM5Ahihwm+hTjSNFKvcBLu+6JCX7HE0QThx1nLH5sF16F7B2r Qeuu508cxl8bf5CEjeHzFxJwLPq1YpsIxXz+Gg== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The common_clk layer requires common data to be passed as clk_init_data, so mimic this here. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 266 ++++++++++++++---------------------- 1 file changed, 99 insertions(+), 167 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 8b4d5ee13ba0..a951c787adb4 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -128,15 +128,22 @@ struct clk { struct clk_hw *clk_hw; }; +struct clk_init_data { + const char *name; + const struct clk_ops *ops; + const struct clk_hw **parent_hws; + u8 num_parents; + unsigned long flags; +}; + struct clk_hw { struct clk clk; + const struct clk_init_data *init; }; struct omap1_clk { struct clk_hw clk_hw; struct list_head node; - const struct clk_ops *ops; - const char *name; struct omap1_clk *parent; struct list_head children; struct list_head sibling; /* node for children */ @@ -686,7 +693,7 @@ static void omap1_clk_disable(struct clk_hw *clk_hw) struct clk_hw *parent = clk_hw_get_parent(clk_hw); if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk_hw); + clk->clk_hw.init->ops->disable(&clk->clk_hw); if (likely(parent)) { omap1_clk_disable(parent); if (clk->flags & CLOCK_NO_IDLE_PARENT) @@ -711,7 +718,7 @@ static omap1_clk_enable(struct clk_hw *clk_hw) omap1_clk_deny_idle(parent); } - ret = clk->ops->enable(&clk->clk_hw); + ret = clk->clk_hw.init->ops->enable(&clk->clk_hw); if (ret) { if (parent) omap1_clk_disable(parent); @@ -733,7 +740,7 @@ static int omap1_clk_enable_generic(struct clk_hw *clk_hw) if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", - clk->name); + clk->clk_hw.init->name); return -EINVAL; } @@ -865,8 +872,8 @@ static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) parent_rate = parent_clk->rate; } - if (clk->ops->round_rate != NULL) - return clk->ops->round_rate(clk_hw, rate, &parent_rate); + if (clk_hw->init->ops->round_rate != NULL) + return clk_hw->init->ops->round_rate(clk_hw, rate, &parent_rate); if (parent) parent_clk->rate = parent_rate; @@ -876,7 +883,6 @@ static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) { - struct omap1_clk *clk = to_omap1_clk(clk_hw); struct clk_hw *parent = clk_hw_get_parent(clk_hw); unsigned long parent_rate = 0; int ret = -EINVAL; @@ -884,8 +890,9 @@ static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) if (parent) parent_rate = to_omap1_clk(parent)->rate; - if (clk->ops->set_rate) - ret = clk->ops->set_rate(clk_hw, rate, parent_rate); + if (clk_hw->init->ops->set_rate) + ret = clk_hw->init->ops->set_rate(clk_hw, rate, parent_rate); + return ret; } @@ -895,8 +902,8 @@ static void propagate_rate(struct omap1_clk *tclk) struct omap1_clk *clkp; list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->ops->recalc_rate) - clkp->rate = clkp->ops->recalc_rate(&clkp->clk_hw, tclk->rate); + if (clkp->clk_hw.init->ops->recalc_rate) + clkp->rate = clkp->clk_hw.init->ops->recalc_rate(&clkp->clk_hw, tclk->rate); propagate_rate(clkp); } } @@ -932,7 +939,7 @@ void clk_disable(struct clk *clk) spin_lock_irqsave(&clockfw_lock, flags); if (_clk->usecount == 0) { pr_err("Trying disable clock %s with 0 usecount\n", - _clk->name); + _clk->clk_hw.init->name); WARN_ON(1); goto out; } @@ -1068,12 +1075,14 @@ static int clk_register(struct device *dev, struct clk_hw *clk_hw) clk_hw->clk.clk_hw = clk_hw; mutex_lock(&clocks_mutex); - if (clk->parent) + if (clk_hw->init->num_parents) { + clk->parent = to_omap1_clk(clk_hw->init->parent_hws[0]); list_add(&clk->sibling, &clk->parent->children); + } list_add(&clk->node, &clocks); - if (clk->ops->init) - clk->ops->init(&clk->clk_hw); + if (clk_hw->init->ops->init) + clk_hw->init->ops->init(clk_hw); mutex_unlock(&clocks_mutex); return 0; @@ -1102,14 +1111,28 @@ static const struct clk_ops clkops_followparent = { .recalc_rate = followparent_recalc, }; +#define CLK_INIT(_name, _ops, _parent) \ + .clk_hw.init = &(struct clk_init_data) { \ + .name = (_name), \ + .ops = (_ops), \ + .parent_hws = (const struct clk_hw *[1])\ + {&(_parent)->clk_hw}, \ + .num_parents = 1, \ + } + +#define CLK_INIT_ROOT(_name, _ops) \ + .clk_hw.init = &(struct clk_init_data) { \ + .name = (_name), \ + .ops = (_ops), \ + } + /* * Dummy clock * * Used for clock aliases that are needed on some OMAPs, but not others */ static struct omap1_clk dummy_ck = { - .name = "dummy", - .ops = &clkops_null, + CLK_INIT_ROOT("dummy", &clkops_null), }; /* @@ -1128,7 +1151,7 @@ static void omap1_clk_disable_unused(struct omap1_clk *clk) * has not enabled any DSP clocks */ if (clk->enable_reg == DSP_IDLECT2) { pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->name); + clk->clk_hw.init->name); return; } @@ -1141,8 +1164,8 @@ static void omap1_clk_disable_unused(struct omap1_clk *clk) if ((regval32 & (1 << clk->enable_bit)) == 0) return; - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(&clk->clk_hw); + printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->clk_hw.init->name); + clk->clk_hw.init->ops->disable(&clk->clk_hw); printk(" done\n"); } @@ -1155,7 +1178,7 @@ static int __init clk_disable_unused(void) spin_lock_irqsave(&clockfw_lock, flags); list_for_each_entry(ck, &clocks, node) { - if (ck->ops == &clkops_null) + if (ck->clk_hw.init->ops == &clkops_null) continue; if (ck->usecount > 0 || !ck->enable_reg) @@ -1248,17 +1271,13 @@ late_initcall(clk_debugfs_init); /* * Omap1 clocks */ - static struct omap1_clk ck_ref = { - .name = "ck_ref", - .ops = &clkops_null, + CLK_INIT_ROOT("ck_ref", &clkops_null), .rate = 12000000, }; static struct omap1_clk ck_dpll1 = { - .name = "ck_dpll1", - .ops = &clkops_null, - .parent = &ck_ref, + CLK_INIT("ck_dpll1", &clkops_null, &ck_ref), }; static const struct clk_ops clkops_generic_followparent = { @@ -1273,9 +1292,7 @@ static const struct clk_ops clkops_generic_followparent = { */ static struct arm_idlect1_clk ck_dpll1out = { .clk = { - .name = "ck_dpll1out", - .ops = &clkops_generic_followparent, - .parent = &ck_dpll1, + CLK_INIT("ck_dpll1out", &clkops_generic_followparent, &ck_dpll1), .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, @@ -1291,15 +1308,13 @@ static const struct clk_ops clkops_sossi = { }; static struct omap1_clk sossi_ck = { - .name = "ck_sossi", - .ops = &clkops_sossi, - .parent = &ck_dpll1out.clk, + CLK_INIT("ck_sossi", &clkops_sossi, &ck_dpll1out.clk), .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, }; -struct clk_ops clkops_null_ckctl = { +static const struct clk_ops clkops_null_ckctl = { .enable = clkll_enable_null, .disable = clkll_disable_null, .recalc_rate = omap1_ckctl_recalc, @@ -1308,13 +1323,11 @@ struct clk_ops clkops_null_ckctl = { }; static struct omap1_clk arm_ck = { - .name = "arm_ck", - .ops = &clkops_null_ckctl, - .parent = &ck_dpll1, + CLK_INIT("arm_ck", &clkops_null_ckctl, &ck_dpll1), .rate_offset = CKCTL_ARMDIV_OFFSET, }; -struct clk_ops clkops_generic_ckctl = { +static const struct clk_ops clkops_generic_ckctl = { .enable = omap1_clk_enable_generic, .disable = omap1_clk_disable_generic, .recalc_rate = omap1_ckctl_recalc, @@ -1324,9 +1337,7 @@ struct clk_ops clkops_generic_ckctl = { static struct arm_idlect1_clk armper_ck = { .clk = { - .name = "armper_ck", - .ops = &clkops_generic_ckctl, - .parent = &ck_dpll1, + CLK_INIT("armper_ck", &clkops_generic_ckctl, &ck_dpll1), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_PERCK, @@ -1340,18 +1351,14 @@ static struct arm_idlect1_clk armper_ck = { * activation. [ GPIO code for 1510 ] */ static struct omap1_clk arm_gpio_ck = { - .name = "ick", - .ops = &clkops_generic_followparent, - .parent = &ck_dpll1, + CLK_INIT("ick", &clkops_generic_followparent, &ck_dpll1), .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, }; static struct arm_idlect1_clk armxor_ck = { .clk = { - .name = "armxor_ck", - .ops = &clkops_generic_followparent, - .parent = &ck_ref, + CLK_INIT("armxor_ck", &clkops_generic_followparent, &ck_ref), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_XORPCK, @@ -1361,9 +1368,7 @@ static struct arm_idlect1_clk armxor_ck = { static struct arm_idlect1_clk armtim_ck = { .clk = { - .name = "armtim_ck", - .ops = &clkops_generic_followparent, - .parent = &ck_ref, + CLK_INIT("armtim_ck", &clkops_generic_followparent, &ck_ref), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_TIMCK, @@ -1379,9 +1384,7 @@ static const struct clk_ops clkops_fixed_divisor = { static struct arm_idlect1_clk armwdt_ck = { .clk = { - .name = "armwdt_ck", - .ops = &clkops_generic, - .parent = &ck_ref, + CLK_INIT("armwdt_ck", &clkops_generic, &ck_ref), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_WDTCK, @@ -1391,9 +1394,7 @@ static struct arm_idlect1_clk armwdt_ck = { }; static struct omap1_clk arminth_ck16xx = { - .name = "arminth_ck", - .ops = &clkops_followparent, - .parent = &arm_ck, + CLK_INIT("arminth_ck", &clkops_followparent, &arm_ck), /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * @@ -1402,18 +1403,14 @@ static struct omap1_clk arminth_ck16xx = { }; static struct omap1_clk dsp_ck = { - .name = "dsp_ck", - .ops = &clkops_generic_ckctl, - .parent = &ck_dpll1, + CLK_INIT("dsp_ck", &clkops_generic_ckctl, &ck_dpll1), .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, }; static struct omap1_clk dspmmu_ck = { - .name = "dspmmu_ck", - .ops = &clkops_null_ckctl, - .parent = &ck_dpll1, + CLK_INIT("dspmmu_ck", &clkops_null_ckctl, &ck_dpll1), .rate_offset = CKCTL_DSPMMUDIV_OFFSET, }; @@ -1426,9 +1423,7 @@ static const struct clk_ops clkops_dspck = { }; static struct omap1_clk dspper_ck = { - .name = "dspper_ck", - .ops = &clkops_dspck, - .parent = &ck_dpll1, + CLK_INIT("dspper_ck", &clkops_dspck, &ck_dpll1), .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, @@ -1441,26 +1436,20 @@ static const struct clk_ops clkops_dspck_followparent = { }; static struct omap1_clk dspxor_ck = { - .name = "dspxor_ck", - .ops = &clkops_dspck_followparent, - .parent = &ck_ref, + CLK_INIT("dspxor_ck", &clkops_dspck_followparent, &ck_ref), .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, }; static struct omap1_clk dsptim_ck = { - .name = "dsptim_ck", - .ops = &clkops_dspck_followparent, - .parent = &ck_ref, + CLK_INIT("dsptim_ck", &clkops_dspck_followparent, &ck_ref), .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, }; static struct arm_idlect1_clk tc_ck = { .clk = { - .name = "tc_ck", - .ops = &clkops_null_ckctl, - .parent = &ck_dpll1, + CLK_INIT("tc_ck", &clkops_null_ckctl, &ck_dpll1), .flags = CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, }, @@ -1468,9 +1457,7 @@ static struct arm_idlect1_clk tc_ck = { }; static struct omap1_clk arminth_ck1510 = { - .name = "arminth_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("arminth_ck", &clkops_followparent, &tc_ck.clk), /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. @@ -1479,24 +1466,18 @@ static struct omap1_clk arminth_ck1510 = { static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ - .name = "tipb_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("tipb_ck", &clkops_followparent, &tc_ck.clk), }; static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ - .name = "l3_ocpi_ck", - .ops = &clkops_generic_followparent, - .parent = &tc_ck.clk, + CLK_INIT("l3_ocpi_ck", &clkops_generic_followparent, &tc_ck.clk), .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_OCPI_CK, }; static struct omap1_clk tc1_ck = { - .name = "tc1_ck", - .ops = &clkops_generic_followparent, - .parent = &tc_ck.clk, + CLK_INIT("tc1_ck", &clkops_generic_followparent, &tc_ck.clk), .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC1_CK, }; @@ -1506,31 +1487,23 @@ static struct omap1_clk tc1_ck = { * activation. [ pm.c (SRAM), CCP, Camera ] */ static struct omap1_clk tc2_ck = { - .name = "tc2_ck", - .ops = &clkops_generic_followparent, - .parent = &tc_ck.clk, + CLK_INIT("tc2_ck", &clkops_generic_followparent, &tc_ck.clk), .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, }; static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ - .name = "dma_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("dma_ck", &clkops_followparent, &tc_ck.clk), }; static struct omap1_clk dma_lcdfree_ck = { - .name = "dma_lcdfree_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("dma_lcdfree_ck", &clkops_followparent, &tc_ck.clk), }; static struct arm_idlect1_clk api_ck = { .clk = { - .name = "api_ck", - .ops = &clkops_generic_followparent, - .parent = &tc_ck.clk, + CLK_INIT("api_ck", &clkops_generic_followparent, &tc_ck.clk), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_APICK, @@ -1540,9 +1513,7 @@ static struct arm_idlect1_clk api_ck = { static struct arm_idlect1_clk lb_ck = { .clk = { - .name = "lb_ck", - .ops = &clkops_generic_followparent, - .parent = &tc_ck.clk, + CLK_INIT("lb_ck", &clkops_generic_followparent, &tc_ck.clk), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LBCK, @@ -1551,21 +1522,15 @@ static struct arm_idlect1_clk lb_ck = { }; static struct omap1_clk rhea1_ck = { - .name = "rhea1_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("rhea1_ck", &clkops_followparent, &tc_ck.clk), }; static struct omap1_clk rhea2_ck = { - .name = "rhea2_ck", - .ops = &clkops_followparent, - .parent = &tc_ck.clk, + CLK_INIT("rhea2_ck", &clkops_followparent, &tc_ck.clk), }; static struct omap1_clk lcd_ck_16xx = { - .name = "lcd_ck", - .ops = &clkops_generic_ckctl, - .parent = &ck_dpll1, + CLK_INIT("lcd_ck", &clkops_generic_ckctl, &ck_dpll1), .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, @@ -1573,9 +1538,7 @@ static struct omap1_clk lcd_ck_16xx = { static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { - .name = "lcd_ck", - .ops = &clkops_generic_ckctl, - .parent = &ck_dpll1, + CLK_INIT("lcd_ck", &clkops_generic_ckctl, &ck_dpll1), .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, @@ -1598,10 +1561,8 @@ static const struct clk_ops clkops_uart = { * XXX does this need SYSC register handling? */ static struct omap1_clk uart1_1510 = { - .name = "uart1_ck", - .ops = &clkops_uart, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + CLK_INIT("uart1_ck", &clkops_uart, &armper_ck.clk), .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1616,10 +1577,8 @@ static struct omap1_clk uart1_1510 = { */ static struct uart_clk uart1_16xx = { .clk = { - .name = "uart1_ck", - .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + CLK_INIT("uart1_ck", &clkops_uart_16xx, &armper_ck.clk), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1635,10 +1594,8 @@ static struct uart_clk uart1_16xx = { * XXX does this need SYSC register handling? */ static struct omap1_clk uart2_ck = { - .name = "uart2_ck", - .ops = &clkops_uart, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + CLK_INIT("uart2_ck", &clkops_uart, &armper_ck.clk), .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1652,10 +1609,8 @@ static struct omap1_clk uart2_ck = { * XXX does this need SYSC register handling? */ static struct omap1_clk uart3_1510 = { - .name = "uart3_ck", - .ops = &clkops_uart, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + CLK_INIT("uart3_ck", &clkops_uart, &armper_ck.clk), .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1670,10 +1625,8 @@ static struct omap1_clk uart3_1510 = { */ static struct uart_clk uart3_16xx = { .clk = { - .name = "uart3_ck", - .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + CLK_INIT("uart3_ck", &clkops_uart_16xx, &armper_ck.clk), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1683,9 +1636,8 @@ static struct uart_clk uart3_16xx = { }; static struct omap1_clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ - .name = "usb_clko", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("usb_clko", &clkops_generic), .rate = 6000000, .flags = ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), @@ -1693,9 +1645,8 @@ static struct omap1_clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ }; static struct omap1_clk usb_hhc_ck1510 = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("usb_hhc_ck", &clkops_generic), .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ .flags = ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1703,9 +1654,8 @@ static struct omap1_clk usb_hhc_ck1510 = { }; static struct omap1_clk usb_hhc_ck16xx = { - .name = "usb_hhc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("usb_hhc_ck", &clkops_generic), .rate = 48000000, /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ .flags = ENABLE_REG_32BIT, @@ -1714,36 +1664,32 @@ static struct omap1_clk usb_hhc_ck16xx = { }; static struct omap1_clk usb_dc_ck = { - .name = "usb_dc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("usb_dc_ck", &clkops_generic), .rate = 48000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, }; static struct omap1_clk uart1_7xx = { - .name = "uart1_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("uart1_ck", &clkops_generic), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = 9, }; static struct omap1_clk uart2_7xx = { - .name = "uart2_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ + CLK_INIT_ROOT("uart2_ck", &clkops_generic), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = 11, }; static struct omap1_clk mclk_1510 = { - .name = "mclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + CLK_INIT_ROOT("mclk", &clkops_generic), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, @@ -1758,33 +1704,28 @@ static const struct clk_ops clkops_ext_clk = { }; static struct omap1_clk mclk_16xx = { - .name = "mclk", - .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + CLK_INIT_ROOT("mclk", &clkops_ext_clk), .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), .enable_bit = COM_ULPD_PLL_CLK_REQ, }; static struct omap1_clk bclk_1510 = { - .name = "bclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + CLK_INIT_ROOT("bclk", &clkops_generic), .rate = 12000000, }; static struct omap1_clk bclk_16xx = { - .name = "bclk", - .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + CLK_INIT_ROOT("bclk", &clkops_ext_clk), .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), .enable_bit = SWD_ULPD_PLL_CLK_REQ, }; static struct omap1_clk mmc1_ck = { - .name = "mmc1_ck", - .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + CLK_INIT("mmc1_ck", &clkops_generic, &armper_ck.clk), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1796,10 +1737,8 @@ static struct omap1_clk mmc1_ck = { * CONF_MOD_MCBSP3_AUXON ?? */ static struct omap1_clk mmc2_ck = { - .name = "mmc2_ck", - .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + CLK_INIT("mmc2_ck", &clkops_generic, &armper_ck.clk), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -1807,10 +1746,8 @@ static struct omap1_clk mmc2_ck = { }; static struct omap1_clk mmc3_ck = { - .name = "mmc3_ck", - .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + CLK_INIT("mmc3_ck", &clkops_generic, &armper_ck.clk), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), @@ -1826,25 +1763,20 @@ static const struct clk_ops clkops_mpu = { }; static struct omap1_clk virtual_ck_mpu = { - .name = "mpu", - .ops = &clkops_mpu, - .parent = &arm_ck, /* Is smarter alias for */ + /* Is smarter alias for */ + CLK_INIT("mpu", &clkops_mpu, &arm_ck), }; /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ static struct omap1_clk i2c_fck = { - .name = "i2c_fck", - .ops = &clkops_followparent, + CLK_INIT("i2c_fck", &clkops_followparent, &armxor_ck.clk), .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armxor_ck.clk, }; static struct omap1_clk i2c_ick = { - .name = "i2c_ick", - .ops = &clkops_followparent, + CLK_INIT("i2c_ick", &clkops_followparent, &armper_ck.clk), .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armper_ck.clk, }; /* From patchwork Thu Aug 8 21:43:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 422151709 for ; Thu, 8 Aug 2019 21:44:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3017928BC9 for ; Thu, 8 Aug 2019 21:44:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 23D2328BD3; Thu, 8 Aug 2019 21:44:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2027128BCD for ; Thu, 8 Aug 2019 21:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389974AbfHHVoq (ORCPT ); Thu, 8 Aug 2019 17:44:46 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:45475 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725535AbfHHVoq (ORCPT ); Thu, 8 Aug 2019 17:44:46 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue010 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mi2eP-1iZYbR2men-00e8dS; Thu, 08 Aug 2019 23:44:16 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 21/22] ARM: omap1: use common clk framework Date: Thu, 8 Aug 2019 23:43:39 +0200 Message-Id: <20190808214347.2865294-2-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214347.2865294-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214347.2865294-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:GQIn1tnKFajJAEk26jAMrrfsIrasnMIc5IJrTtbH4vX4wMZ/nlo Pe7NOrxJYdEhtvdWKFmane20TcDdxDqP+/10nbePXuUa+KV+ImVxej3Hs9tkt85D+GWQhnr jyCpgxiP7zDfXdR9AkYHftd88kgy7pi9pn/keCEGZ4xpyMsT/nW/cSPztjhFWbTeBrQRgft CQTb5GXOkhXzGIY7hZE5w== X-UI-Out-Filterresults: notjunk:1;V03:K0:VLFzM9nHg98=:6iqdv3DdnolRFOat8mfQv/ g25M4pkILEGBgQk3DWOznzVih8/JwkvivS5p3hE5r4xjnMIZftk/y67s8t26h8Y0ZCBeSCUD6 KV3/Zbf3HQrzIQcwr8czjVw8qnFUeQrNlTIkrjPefzJGczIZdj4xtJA3QthB1HBvbfVqlJBPc 6WyfpT/07OaeB1nwpStohbQr21CL7Tgi0vG9Vk2pZz3wtYuXmRlsOUXufQORzS+yCZgyZmpvJ SRYx8ebfCL25sQ5FvSuKB2dmuR49+FGhcfelH9zllwMZHKd3EXM80jbaQa6Jb146gMHIgfSe1 4I9q/aBBk8DJel/iPeEZd78447X1P6eOUj7cE3z69OPpXjd1a0I4MUgI8SQFvT64Y7auAMSrK 7wdPQtUq7OVdbjpoR3Or2G1VgvAPxDK57YeSWtQ3VXEmWqXQaQFQMqyLSE/UeTcAOoGCRvkZI IvfSANofRM/nhFEUUv3cvZMeCW/j7PEibXp+hM+0AVvm2feYMHO6j/jxKG8LxFFJnhbi/et0v ChUfLvFK7sn7N2rqeywVlIikb1MCtnYkFHhRV9EebK9obeBGJdiUG/sK/JmuQXyQ3p6TZIwff HHCtF/3E69hNJQK97bX1r2QppgJl8ZnbJI5HAd795/e5lBz+3wDlLJi/a/wMdYsUxDbkJWI9h KcrIWFzjXHXhUXUAN6Yz5Fffq5+e3nNBBd4Dpk+dEstmR3FtI5WhJ0s0HwwzDx3S6f8RGsqLF XPB1ksoL5yWQcMBIQIaO7HnGIY4nJGsH2dlY3Q== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The omap1 clock driver now uses types and calling conventions that are compatible with the common clk core. Turn on CONFIG_COMMON_CLK and remove all the code that is now duplicated. Note: if this previous steps didn't already break it, this one most likely will, because the interfaces are very likely to have different semantics. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 + arch/arm/mach-omap1/clock.c | 413 +----------------------------------- 2 files changed, 4 insertions(+), 410 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0febd7a1d65f..17a21f75f386 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -496,6 +496,7 @@ config ARCH_OMAP1 select ARCH_OMAP select CLKDEV_LOOKUP select CLKSRC_MMIO + select COMMON_CLK select FORCE_PCI if PCCARD select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index a951c787adb4..1f105c659e7e 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -10,6 +10,7 @@ */ #include #include +#include #include #include #include @@ -52,32 +53,6 @@ struct omap1_clk_lookup { #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ -/** - * struct clk_ops - some clock function pointers - * @enable: fn ptr that enables the current clock in hardware - * @disable: fn ptr that enables the current clock in hardware - * @recalc_rate: fn ptr that returns the clock's current rate - * @set_rate: fn ptr that can change the clock's current rate - * @round_rate: fn ptr that can round the clock's current rate - * @init: fn ptr to do clock-specific initialization - * - * A "companion" clk is an accompanying clock to the one being queried - * that must be enabled for the IP module connected to the clock to - * become accessible by the hardware. Neither @find_idlest nor - * block-specific; the hwmod code has been created to handle this, but - * until hwmod data is ready and drivers have been converted to use PM - * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and - * @find_companion must, unfortunately, remain. - */ -struct clk_ops { - int (*enable)(struct clk_hw *); - void (*disable)(struct clk_hw *); - unsigned long (*recalc_rate)(struct clk_hw *, unsigned long); - int (*set_rate)(struct clk_hw *, unsigned long, unsigned long); - long (*round_rate)(struct clk_hw *, unsigned long, unsigned long *); - void (*init)(struct clk_hw *); -}; - /* * struct omap1_clk.flags possibilities * @@ -90,12 +65,8 @@ struct clk_ops { /** * struct omap1_clk - OMAP struct clk - * @node: list_head connecting this clock into the full clock list * @ops: struct clkops * for this clock * @name: the name of the clock in the hardware (used in hwmod data and debug) - * @parent: pointer to this clock's parent struct clk - * @children: list_head connecting to the child clks' @sibling list_heads - * @sibling: list_head connecting this clk to its parent clk's @children * @rate: current clock rate * @enable_reg: register to write to enable the clock (see @enable_bit) * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) @@ -115,38 +86,13 @@ struct clk_ops { * clocks and decremented by the clock code when clk_disable() is * called on child clocks. * - * XXX @clkdm, @usecount, @children, @sibling should be marked for - * internal use only. - * - * @children and @sibling are used to optimize parent-to-child clock - * tree traversals. (child-to-parent traversals use @parent.) + * XXX @usecount should be marked for internal use only. * * XXX The notion of the clock's current rate probably needs to be * separated from the clock's target rate. */ -struct clk { - struct clk_hw *clk_hw; -}; - -struct clk_init_data { - const char *name; - const struct clk_ops *ops; - const struct clk_hw **parent_hws; - u8 num_parents; - unsigned long flags; -}; - -struct clk_hw { - struct clk clk; - const struct clk_init_data *init; -}; - struct omap1_clk { struct clk_hw clk_hw; - struct list_head node; - struct omap1_clk *parent; - struct list_head children; - struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; u8 enable_bit; @@ -267,10 +213,6 @@ static u32 cpu_mask; __u32 arm_idlect1_mask; static struct clk_hw *api_ck_p, *ck_dpll1_p, *ck_ref_p; -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); -static DEFINE_SPINLOCK(clockfw_lock); - /* * Omap1 specific clock functions */ @@ -677,16 +619,6 @@ static void omap1_init_ext_clk(struct clk_hw *clk_hw) clk-> rate = 96000000 / dsor; } -struct clk_hw *clk_hw_get_parent(const struct clk_hw *clk_hw) -{ - struct omap1_clk *clk = to_omap1_clk(clk_hw); - - if (!clk->parent) - return NULL; - - return &clk->parent->clk_hw; -} - static void omap1_clk_disable(struct clk_hw *clk_hw) { struct omap1_clk *clk = to_omap1_clk(clk_hw); @@ -860,173 +792,11 @@ static const struct clk_ops clkops_uart_16xx = { .disable = omap1_clk_disable_uart_functional_16xx, }; -static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) -{ - struct omap1_clk *clk = to_omap1_clk(clk_hw); - struct clk_hw *parent = clk_hw_get_parent(clk_hw); - struct omap1_clk *parent_clk; - unsigned long parent_rate = 0; - - if (parent) { - parent_clk = to_omap1_clk(parent); - parent_rate = parent_clk->rate; - } - - if (clk_hw->init->ops->round_rate != NULL) - return clk_hw->init->ops->round_rate(clk_hw, rate, &parent_rate); - - if (parent) - parent_clk->rate = parent_rate; - - return clk->rate; -} - -static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) -{ - struct clk_hw *parent = clk_hw_get_parent(clk_hw); - unsigned long parent_rate = 0; - int ret = -EINVAL; - - if (parent) - parent_rate = to_omap1_clk(parent)->rate; - - if (clk_hw->init->ops->set_rate) - ret = clk_hw->init->ops->set_rate(clk_hw, rate, parent_rate); - - return ret; -} - /* Propagate rate to children */ static void propagate_rate(struct omap1_clk *tclk) { - struct omap1_clk *clkp; - - list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->clk_hw.init->ops->recalc_rate) - clkp->rate = clkp->clk_hw.init->ops->recalc_rate(&clkp->clk_hw, tclk->rate); - propagate_rate(clkp); - } -} - -/* - * Omap1 clock reset and init functions - */ - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - int ret; - - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_enable(clk->clk_hw); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - struct omap1_clk *_clk = to_omap1_clk(clk->clk_hw); - - if (clk == NULL || IS_ERR(clk)) - return; - - spin_lock_irqsave(&clockfw_lock, flags); - if (_clk->usecount == 0) { - pr_err("Trying disable clock %s with 0 usecount\n", - _clk->clk_hw.init->name); - WARN_ON(1); - goto out; - } - - omap1_clk_disable(clk->clk_hw); - -out: - spin_unlock_irqrestore(&clockfw_lock, flags); -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - unsigned long flags; - unsigned long ret; - - if (clk == NULL || IS_ERR(clk)) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = to_omap1_clk(clk->clk_hw)->rate; - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_get_rate); - -/* - * Optional clock functions defined in include/linux/clk.h - */ - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - long ret; - - if (clk == NULL || IS_ERR(clk)) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_round_rate(clk->clk_hw, rate); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; + clk_set_rate(tclk->clk_hw.clk, tclk->rate); } -EXPORT_SYMBOL(clk_round_rate); - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret = -EINVAL; - - if (clk == NULL || IS_ERR(clk)) - return ret; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_set_rate(clk->clk_hw, rate); - if (ret == 0) - propagate_rate(to_omap1_clk(clk->clk_hw)); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - WARN_ONCE(1, "clk_set_parent() not implemented for OMAP1\n"); - - return -EINVAL; -} -EXPORT_SYMBOL(clk_set_parent); - -struct clk *clk_get_parent(struct clk *clk) -{ - struct clk_hw *parent = clk_hw_get_parent(clk->clk_hw); - - if (!parent) - return NULL; - - return &parent->clk; -} -EXPORT_SYMBOL(clk_get_parent); - -/* - * OMAP specific clock functions shared between omap1 and omap2 - */ /* Used for clocks that always have same value as the parent clock */ static unsigned long followparent_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) @@ -1047,47 +817,6 @@ static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw, unsigned l return parent_rate / clk->fixed_div; } -/** - * clk_preinit - initialize any fields in the struct omap1_clk before clk init - * @clk: struct omap1_clk * to initialize - * - * Initialize any struct omap1_clk fields needed before normal clk initialization - * can run. No return value. - */ -static void clk_preinit(struct omap1_clk *clk) -{ - INIT_LIST_HEAD(&clk->children); -} - -static int clk_register(struct device *dev, struct clk_hw *clk_hw) -{ - struct omap1_clk *clk = to_omap1_clk(clk_hw); - - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - /* - * trap out already registered clocks - */ - if (clk->node.next || clk->node.prev) - return 0; - - clk_hw->clk.clk_hw = clk_hw; - - mutex_lock(&clocks_mutex); - if (clk_hw->init->num_parents) { - clk->parent = to_omap1_clk(clk_hw->init->parent_hws[0]); - list_add(&clk->sibling, &clk->parent->children); - } - - list_add(&clk->node, &clocks); - if (clk_hw->init->ops->init) - clk_hw->init->ops->init(clk_hw); - mutex_unlock(&clocks_mutex); - - return 0; -} - /* * Low level helpers */ @@ -1135,139 +864,6 @@ static struct omap1_clk dummy_ck = { CLK_INIT_ROOT("dummy", &clkops_null), }; -/* - * - */ - -#ifdef CONFIG_OMAP_RESET_CLOCKS -/* - * Disable any unused clocks left on by the bootloader - */ -static void omap1_clk_disable_unused(struct omap1_clk *clk) -{ - __u32 regval32; - - /* Clocks in the DSP domain need api_ck. Just assume bootloader - * has not enabled any DSP clocks */ - if (clk->enable_reg == DSP_IDLECT2) { - pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->clk_hw.init->name); - return; - } - - /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = __raw_readw(clk->enable_reg); - - if ((regval32 & (1 << clk->enable_bit)) == 0) - return; - - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->clk_hw.init->name); - clk->clk_hw.init->ops->disable(&clk->clk_hw); - printk(" done\n"); -} - -static int __init clk_disable_unused(void) -{ - struct omap1_clk *ck; - unsigned long flags; - - pr_info("clock: disabling unused clocks to save power\n"); - - spin_lock_irqsave(&clockfw_lock, flags); - list_for_each_entry(ck, &clocks, node) { - if (ck->clk_hw.init->ops == &clkops_null) - continue; - - if (ck->usecount > 0 || !ck->enable_reg) - continue; - - omap1_clk_disable_unused(ck); - } - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -late_initcall(clk_disable_unused); -#endif - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* - * debugfs support to trace clock tree hierarchy and attributes - */ - -#include -#include - -static struct dentry *clk_debugfs_root; - -static int debug_clock_show(struct seq_file *s, void *unused) -{ - struct omap1_clk *c; - struct omap1_clk *pa; - - mutex_lock(&clocks_mutex); - seq_printf(s, "%-30s %-30s %-10s %s\n", - "clock-name", "parent-name", "rate", "use-count"); - - list_for_each_entry(c, &clocks, node) { - pa = c->parent; - seq_printf(s, "%-30s %-30s %-10lu %d\n", - c->name, pa ? pa->name : "none", c->rate, - c->usecount); - } - mutex_unlock(&clocks_mutex); - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(debug_clock); - -static void clk_debugfs_register_one(struct omap1_clk *c) -{ - struct dentry *d; - struct omap1_clk *pa = c->parent; - - d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); - c->dent = d; - - debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount); - debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate); - debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags); -} - -static void clk_debugfs_register(struct omap1_clk *c) -{ - struct omap1_clk *pa = c->parent; - - if (pa && !pa->dent) - clk_debugfs_register(pa); - - if (!c->dent) - clk_debugfs_register_one(c); -} - -static int __init clk_debugfs_init(void) -{ - struct omap1_clk *c; - struct dentry *d; - - d = debugfs_create_dir("clock", NULL); - clk_debugfs_root = d; - - list_for_each_entry(c, &clocks, node) - clk_debugfs_register(c); - - debugfs_create_file("summary", S_IRUGO, d, NULL, &debug_clock_fops); - - return 0; -} -late_initcall(clk_debugfs_init); - -#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ - /* * Omap1 clocks */ @@ -1897,9 +1493,6 @@ int __init omap1_clk_init(void) /* By default all idlect1 clocks are allowed to idle */ arm_idlect1_mask = ~0; - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(to_omap1_clk(c->lk.clk_hw)); - cpu_mask = 0; if (cpu_is_omap1710()) cpu_mask |= CK_1710; From patchwork Thu Aug 8 21:47:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11084865 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EE23B112C for ; Thu, 8 Aug 2019 21:48:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DCE7E28BCD for ; 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Thu, 08 Aug 2019 23:48:23 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 22/22] ARM: omap1: enable multiplatform Date: Thu, 8 Aug 2019 23:47:44 +0200 Message-Id: <20190808214816.2964251-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:TSY15Ec0Vm9MEnIqiHpDeo1aLv3yVAHxGEW3y7owCHC8HVezU1m t1EoU4HYJw5wjdKxa/ZpyBDQMkpQKUTEmuIvHeifK6mQGImsNTnNA9xYsQOcHUNoAhV6PNc H7wZTQaY9JkBJP+FvfBCVvGznYJdxV7JfqgFgDWJBsAL1r9pI7GlVEBqijx9j0SbAnrnFAz jpg1oDKNmfYONht7i/xuw== X-UI-Out-Filterresults: notjunk:1;V03:K0:lBiIPnWWbKw=:hhYXLugkIoDp5pJBIoptVK vf7Nz5y4jcRkvxsQPUxxsY4+ySLTmak3FrHe06SbB1Fk9662ilifaNYAHuBvDpWdopG+k+ihH 649IJH032bqHo6Xg7Mv0JZC0LIJac/15oeGxwh7I2aW31epNfmW0CKJflUzkmS6qJlB/1Op6Q dtkjWitfnmSJT3nELQtPrV9kxFWLQp4H5PKs90rtbesZFgRkBvvIXvGscSYBkbde9tLYcI9uF b+y1BSBODPlNW1PLu+c6XQklLFwoCtIYCZ18dq5oObiANb7ici7XD7ipO91ROlgX93iHtqWw/ D2fkABFD2XE9EjTy6rV1akL+cm7dUR/RaRYG1cw1q8VBXxbP4EIXT51w6XuKsnq+HRvdgJfaD BX0anTLN0IYBDWTdWsw9VA7tZze12vqxbiUeS3u+SBawUW68o3Eg06R0Aw5QMVzTAB+0DNhO3 CmxbXdmzf3h8gtrh2KTR+D3IWirVm9qD3Pgky8ueX+nLe/tGFKCRlvZ+Xf/5kHcC9FPvc+S3o l+p32CpslrlCy4r8gwcllSmQWpMgZG5I7A8nsXP6daWRREb6w8ljO2m6wodxWaVumK68vpoyC 0ly3k+NRVzWQjT3/vVkFFf8ytVVn5WS09Juh0TQO+gODCcVXttJ7WFpipnRDzwRRErVec3dG1 f+DenJuefvQw5zHSdoBFpHMrWFYunXS+sNDNP0T0bZIhLhDT6pfArV8px8aoYaDijQ/KeK0Zy okcYgm/JDiDZluvI2MEigbyfzNPNyQYkD5bYtA== Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With all the header files out of the way, and the clock driver converted to drivers/clk/, nothing stops us from building OMAP together with the other platforms. As usual, the decompressor support is a victim here, and is only available when CONFIG_DEBUG_LL is configured for the particular board. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 18 --- arch/arm/configs/omap1_defconfig | 3 + arch/arm/mach-omap1/Kconfig | 20 ++- arch/arm/mach-omap1/Makefile | 4 + arch/arm/mach-omap1/hardware.h | 2 +- arch/arm/mach-omap1/include/mach/uncompress.h | 117 ------------------ arch/arm/mach-omap1/serial.c | 3 +- .../mach-omap1/{include/mach => }/serial.h | 0 arch/arm/plat-omap/Makefile | 1 + 9 files changed, 26 insertions(+), 142 deletions(-) delete mode 100644 arch/arm/mach-omap1/include/mach/uncompress.h rename arch/arm/mach-omap1/{include/mach => }/serial.h (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17a21f75f386..8542dfc5cf84 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -490,24 +490,6 @@ config ARCH_S3C24XX (), the IPAQ 1940 or the Samsung SMDK2410 development board (and derivatives). -config ARCH_OMAP1 - bool "TI OMAP1" - select ARCH_HAS_HOLES_MEMORYMODEL - select ARCH_OMAP - select CLKDEV_LOOKUP - select CLKSRC_MMIO - select COMMON_CLK - select FORCE_PCI if PCCARD - select GENERIC_CLOCKEVENTS - select GENERIC_IRQ_CHIP - select GENERIC_IRQ_MULTI_HANDLER - select GPIOLIB - select HAVE_IDE - select IRQ_DOMAIN - select SPARSE_IRQ - help - Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) - endchoice menu "Multiple platform selection" diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index 0c43c589f191..902125f89315 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig @@ -20,6 +20,9 @@ CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set +CONFIG_ARCH_MULTI_V4T=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_OMAP=y CONFIG_ARCH_OMAP1=y CONFIG_OMAP_RESET_CLOCKS=y diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 6a2c441ab579..5b1d3a24462f 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -1,4 +1,16 @@ # SPDX-License-Identifier: GPL-2.0-only +menuconfig ARCH_OMAP1 + bool "TI OMAP1" + depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_OMAP + select CLKSRC_MMIO + select FORCE_PCI if PCCARD + select GPIOLIB + select HAVE_IDE + help + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) + if ARCH_OMAP1 menu "TI OMAP1 specific features" @@ -14,27 +26,27 @@ config ARCH_OMAP1_AUTO select MACH_OMAP_GENERIC if (ARCH_OMAP15XX || ARCH_OMAP16XX) config ARCH_OMAP730 - depends on ARCH_OMAP1 + depends on ARCH_MULTI_V5 bool "OMAP730 Based System" select ARCH_OMAP_OTG select CPU_ARM926T select OMAP_MPU_TIMER config ARCH_OMAP850 - depends on ARCH_OMAP1 + depends on ARCH_MULTI_V5 bool "OMAP850 Based System" select ARCH_OMAP_OTG select CPU_ARM926T config ARCH_OMAP15XX - depends on ARCH_OMAP1 + depends on ARCH_MULTI_V4T default y bool "OMAP15xx Based System" select CPU_ARM925T select OMAP_MPU_TIMER config ARCH_OMAP16XX - depends on ARCH_OMAP1 + depends on ARCH_MULTI_V5 bool "OMAP16xx Based System" select ARCH_OMAP_OTG select CPU_ARM926T diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 1337d7a2754c..1f0f97868953 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -3,6 +3,10 @@ # Makefile for the linux kernel. # +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/arch/arm/mach-omap1/include +asflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/arch/arm/mach-omap1/include +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/arch/arm/plat-omap/include + # Common support obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ serial.o devices.o dma.o fb.o diff --git a/arch/arm/mach-omap1/hardware.h b/arch/arm/mach-omap1/hardware.h index 2cfc342c069c..232b8deef907 100644 --- a/arch/arm/mach-omap1/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -64,7 +64,7 @@ static inline u32 omap_cs3_phys(void) #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) -#include +#include "serial.h" /* * --------------------------------------------------------------------------- diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h deleted file mode 100644 index 9cca6a56788f..000000000000 --- a/arch/arm/mach-omap1/include/mach/uncompress.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/uncompress.h - * - * Serial port stubs for kernel decompress status messages - * - * Initially based on: - * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * Rewritten by: - * Author: - * 2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include - -#include -#include - -#include "serial.h" - -#define MDR1_MODE_MASK 0x07 - -volatile u8 *uart_base; -int uart_shift; - -/* - * Store the DEBUG_LL uart number into memory. - * See also debug-macro.S, and serial.c for related code. - */ -static void set_omap_uart_info(unsigned char port) -{ - /* - * Get address of some.bss variable and round it down - * a la CONFIG_AUTO_ZRELADDR. - */ - u32 ram_start = (u32)&uart_shift & 0xf8000000; - u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); - *uart_info = port; -} - -static inline void putc(int c) -{ - if (!uart_base) - return; - - /* Check for UART 16x mode */ - if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) - return; - - while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) - barrier(); - uart_base[UART_TX << uart_shift] = c; -} - -static inline void flush(void) -{ -} - -/* - * Macros to configure UART1 and debug UART - */ -#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ - if (machine_is_##mach()) { \ - uart_base = (volatile u8 *)(dbg_uart); \ - uart_shift = (dbg_shft); \ - port = (dbg_id); \ - set_omap_uart_info(port); \ - break; \ - } - -#define DEBUG_LL_OMAP7XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \ - OMAP1UART##p) - -#define DEBUG_LL_OMAP1(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP1UART##p) - -static inline void arch_decomp_setup(void) -{ - int port = 0; - - /* - * Initialize the port based on the machine ID from the bootloader. - * Note that we're using macros here instead of switch statement - * as machine_is functions are optimized out for the boards that - * are not selected. - */ - do { - /* omap7xx/8xx based boards using UART1 with shift 0 */ - DEBUG_LL_OMAP7XX(1, herald); - DEBUG_LL_OMAP7XX(1, omap_perseus2); - - /* omap15xx/16xx based boards using UART1 */ - DEBUG_LL_OMAP1(1, ams_delta); - DEBUG_LL_OMAP1(1, nokia770); - DEBUG_LL_OMAP1(1, omap_h2); - DEBUG_LL_OMAP1(1, omap_h3); - DEBUG_LL_OMAP1(1, omap_innovator); - DEBUG_LL_OMAP1(1, omap_osk); - DEBUG_LL_OMAP1(1, omap_palmte); - DEBUG_LL_OMAP1(1, omap_palmz71); - - /* omap15xx/16xx based boards using UART2 */ - DEBUG_LL_OMAP1(2, omap_palmtt); - - /* omap15xx/16xx based boards using UART3 */ - DEBUG_LL_OMAP1(3, sx1); - } while (0); -} diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index d6d1843337a5..a8db332dc72e 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -19,8 +19,7 @@ #include -#include - +#include "serial.h" #include "mux.h" #include "pm.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/serial.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/serial.h rename to arch/arm/mach-omap1/serial.h diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 371f2ed00eda..a11c96a093c9 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -4,6 +4,7 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include +ccflags-$(CONFIG_ARCH_OMAP1) += -I$(srctree)/arch/arm/mach-omap1/include # Common support obj-y := sram.o dma.o counter_32k.o