From patchwork Tue Aug 13 12:51:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dafna Hirschfeld X-Patchwork-Id: 11092163 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA66F13AC for ; Tue, 13 Aug 2019 12:52:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 97B3128468 for ; Tue, 13 Aug 2019 12:52:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8BBD228617; Tue, 13 Aug 2019 12:52:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 17E4B28468 for ; Tue, 13 Aug 2019 12:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mTwTDDqo7aFT+KrKfmJYkaq0KGvI5E9zABRijup5O24=; b=rEvC2mrfbar/TM fG3IczI7Z64swY7bZJKBNZDtIKv80KiLqbcXcFDt9oPt59f/vOsO2swrT24QujthHEF3pyjfkA+ih xT1duZ1xiEMb9KDOgdCfHvHydbZ/nuLiG/6xJSA4bz7GC7Vdy/5cvAUUnxJfmFVYjC77qeAuL+DgE BQ2nW9OGHI4QUOoG/IW5ZZz1F7LetGcEiSp3iwuKNyRDo8qznKszfCLxLiLYLf6y5mqkxjWQBT5qH 9XNwL2XdHz0K/Va/XCZKNv6epAnBizTO5Q5x7tu5PP29DdqlQEP7W3BBPPEGQhQSlPtz14kFgf+/C MhEneXGiYborjcdOBfKQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWHT-0008Ro-Of; Tue, 13 Aug 2019 12:52:03 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWHQ-0008QH-C1 for linux-arm-kernel@lists.infradead.org; Tue, 13 Aug 2019 12:52:01 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: dafna) with ESMTPSA id DF87028A5AE From: Dafna Hirschfeld To: dafna.hirschfeld@collabora.com Subject: [PATCH v3 1/2] dt-bindings: arm: imx: add imx8mq nitrogen support Date: Tue, 13 Aug 2019 14:51:47 +0200 Message-Id: <20190813125147.29605-2-dafna.hirschfeld@collabora.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190813125147.29605-1-dafna.hirschfeld@collabora.com> References: <20190813125147.29605-1-dafna.hirschfeld@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_055200_543278_CE291FCE X-CRM114-Status: UNSURE ( 8.45 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ezequiel@collabora.com, s.hauer@pengutronix.de, linux-kernel@vger.kernel.org, Troy Kisky , Gary Bisson , robh+dt@kernel.org, kernel@pengutronix.de, kernel@collabora.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gary Bisson The Nitrogen8M is an ARM based single board computer (SBC) designed to leverage the full capabilities of NXP’s i.MX8M Quad processor. Signed-off-by: Gary Bisson Signed-off-by: Troy Kisky [Dafna: porting vendor's code to mainline] Signed-off-by: Dafna Hirschfeld Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 362bf827cad1..16db1c699ba7 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -224,6 +224,7 @@ properties: - description: i.MX8MQ based Boards items: - enum: + - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board - fsl,imx8mq-evk # i.MX8MQ EVK Board - purism,librem5-devkit # Purism Librem5 devkit - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk From patchwork Tue Aug 13 12:51:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dafna Hirschfeld X-Patchwork-Id: 11092165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 12AB51399 for ; Tue, 13 Aug 2019 12:52:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F32CC283BF for ; Tue, 13 Aug 2019 12:52:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E73E9285C8; Tue, 13 Aug 2019 12:52:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2123028448 for ; Tue, 13 Aug 2019 12:52:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=3O3X780WTqOmU3Vq2jSFZn3G0RS4oOD5jfCGO7HZkl4=; b=tkxKDNzzg7Bj8Z J59jiDWaZRGlKv6gb6SXSPa9fLbOV8TLbGfrEuY5ZByIhj+PE2q99KDlB5SB6gvEsZYGKKYVmGOng ofdWuLjB2vt87R1m2NGra/iE35XSj6V7CQLsD4qulBacuO9tdechjG1QAIS49qcR8+mFAu9XCggkj XJeljzWvQZ0BDrJvMcb4qqgA8uzXgpV1mDqDmFBIZyNenYDa3wc2YxkBjOQpqHbI/Jt8uCJSX8R5z H9t2Asr8hvae0DXI4V1+KN8gxrDR2F3O2Cys+3vg8r5paGmRJsnN8xxWtvT/zMIQxzHsFez2GG9r8 KJOFJTuNatZieAS382qQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWHe-0000A8-KE; Tue, 13 Aug 2019 12:52:14 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWHQ-0008QF-4g for linux-arm-kernel@lists.infradead.org; Tue, 13 Aug 2019 12:52:02 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: dafna) with ESMTPSA id 1349F28A58F From: Dafna Hirschfeld To: dafna.hirschfeld@collabora.com Subject: [PATCH v3 2/2] arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support Date: Tue, 13 Aug 2019 14:51:46 +0200 Message-Id: <20190813125147.29605-1-dafna.hirschfeld@collabora.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_055200_452231_FBC1C8AE X-CRM114-Status: GOOD ( 12.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ezequiel@collabora.com, s.hauer@pengutronix.de, linux-kernel@vger.kernel.org, Troy Kisky , Gary Bisson , robh+dt@kernel.org, kernel@pengutronix.de, kernel@collabora.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gary Bisson Add basic dts support for i.MX8MQ NITROGEN8M. Signed-off-by: Gary Bisson Signed-off-by: Troy Kisky [Dafna: porting vendor's code to mainline] Signed-off-by: Dafna Hirschfeld --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mq-nitrogen.dts | 400 ++++++++++++++++++ 2 files changed, 401 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 8c0c4343e586..e2c6c93f47b6 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts new file mode 100644 index 000000000000..da25ea9055cd --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2018 Boundary Devices + */ + +/dts-v1/; + +#include +#include "imx8mq.dtsi" + +/ { + model = "Boundary Devices i.MX8MQ Nitrogen8M"; + compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x00000000 0x40000000 0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + power { + label = "Power Button"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + linux,code = ; + gpio-key,wakeup; + }; + }; + + reg_vref_0v9: regulator-vref-0v9 { + compatible = "regulator-fixed"; + regulator-name = "vref-0v9"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + }; + + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_vref_2v5: regulator-vref-2v5 { + compatible = "regulator-fixed"; + regulator-name = "vref-2v5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_vref_3v3: regulator-vref-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vref-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vref_5v: regulator-vref-5v { + compatible = "regulator-fixed"; + regulator-name = "vref-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + interrupts-extended = <&gpio1 11 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + i2cmux@70 { + compatible = "nxp,pca9546"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_pca9546>; + reg = <0x70>; + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + i2c1a: i2c1@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + reg_arm_dram: regulator@60 { + compatible = "fcs,fan53555"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_arm_dram>; + reg = <0x60>; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + vsel-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; + }; + }; + + i2c1b: i2c1@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + reg_dram_1p1v: regulator@60 { + compatible = "fcs,fan53555"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_dram_1p1v>; + reg = <0x60>; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + vsel-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + }; + }; + + i2c1c: i2c1@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + reg_soc_gpu_vpu: regulator@60 { + compatible = "fcs,fan53555"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_soc_gpu_vpu>; + reg = <0x60>; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + vsel-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; + }; + }; + + i2c1d: i2c1@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + rtc@68 { + compatible = "microcrystal,rv4162"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1d_rv4162>; + reg = <0x68>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + }; + }; + }; +}; + +&uart1 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clk IMX8MQ_CLK_UART1>; + assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + assigned-clocks = <&clk IMX8MQ_CLK_UART2>; + assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; + status = "okay"; +}; + +&usdhc1 { + bus-width = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + non-removable; + vmmc-supply = <®_vref_1v8>; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + pinctrl_hog: hoggrp { + fsl,pins = < + /* J17 connector, odd */ + MX8MQ_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x19 /* Pin 19 */ + MX8MQ_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19 /* Pin 21 */ + MX8MQ_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x19 /* Pin 23 */ + MX8MQ_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x19 /* Pin 25 */ + MX8MQ_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x19 /* Pin 27 */ + MX8MQ_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x19 /* Pin 29 */ + MX8MQ_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 /* Pin 31 */ + MX8MQ_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 /* Pin 33 */ + MX8MQ_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 /* Pin 35 */ + MX8MQ_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x19 /* Pin 39 */ + MX8MQ_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x19 /* Pin 41 */ + MX8MQ_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x19 /* Pin 43 */ + MX8MQ_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x19 /* Pin 45 */ + MX8MQ_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 /* Pin 47 */ + MX8MQ_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19 /* Pin 49 */ + MX8MQ_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19 /* Pin 51 */ + + /* J17 connector, even */ + MX8MQ_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 /* Pin 44 */ + MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 /* Pin 48 */ + MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* Pin 50 */ + MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 /* Pin 54 */ + MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* Pin 56 */ + + /* J18 connector, odd */ + MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x19 /* Pin 41 */ + MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x19 /* Pin 43 */ + MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 /* Pin 45 */ + MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x19 /* Pin 47 */ + MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18 0x19 /* Pin 49 */ + MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x19 /* Pin 53 */ + + /* J18 connector, even */ + MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x19 /* Pin 32 */ + MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x19 /* Pin 36 */ + MX8MQ_IOMUXC_NAND_DATA00_GPIO3_IO6 0x19 /* Pin 38 */ + MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x19 /* Pin 40 */ + MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x19 /* Pin 42 */ + MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* Pin 44 */ + MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x19 /* Pin 46 */ + + /* J13 Pin 2, WL_WAKE */ + MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xd6 + /* J13 Pin 4, WL_IRQ, not needed for Silex */ + MX8MQ_IOMUXC_SAI5_RXD0_GPIO3_IO21 0xd6 + /* J13 pin 9, unused */ + MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + /* J13 Pin 41, BT_CLK_REQ */ + MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0xd6 + /* J13 Pin 42, BT_HOST_WAKE */ + MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0xd6 + + /* Clock for both CSI1 and CSI2 */ + MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x07 + /* test points */ + MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0xc1 /* TP87 */ + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 + MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 + MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x59 + >; + }; + + pinctrl_gpio_keys: gpio-keysgrp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 + >; + }; + + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f + MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f + >; + }; + + pinctrl_i2c1_pca9546: i2c1-pca9546grp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x49 + >; + }; + + pinctrl_i2c1d_rv4162: i2c1d-rv4162grp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x49 + >; + }; + + pinctrl_reg_arm_dram: reg-arm-dram { + fsl,pins = < + MX8MQ_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x16 + >; + }; + + pinctrl_reg_dram_1p1v: reg-dram-1p1v { + fsl,pins = < + MX8MQ_IOMUXC_SD1_STROBE_GPIO2_IO11 0x16 + >; + }; + + pinctrl_reg_soc_gpu_vpu: reg-soc-gpu-vpu { + fsl,pins = < + MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x16 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x45 + MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x45 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x45 + MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x45 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 + MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 + MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 + MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 + MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 + MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 + MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 + MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 + MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 + MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 + MX8MQ_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d + MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd + MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd + MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd + MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd + MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd + MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd + MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd + MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd + MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f + MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf + MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf + MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf + MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf + MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf + MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf + MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf + MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf + MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; +};