From patchwork Tue Aug 13 13:31:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092227 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7AA191823 for ; Tue, 13 Aug 2019 13:32:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 699BB28682 for ; Tue, 13 Aug 2019 13:32:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6758B28694; Tue, 13 Aug 2019 13:32:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2A25728682 for ; Tue, 13 Aug 2019 13:32:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/WQ2U2FUiTl7fKE/rsj98YX+slPkQ3k4/I0Uow+EnPs=; b=M/0xC2UEor3xsS tILiNGxDhmCKUfNbez7nMY4IPpDKRe/CQ+odrrd5pNVJXU8gVQfIUydUlXfgV4qM9huf8U1hX6T1/ +AsbCh49Ot85GeVBp7niyx4siixhD+fayG+HKCfIwH+JJQVjNAJvKtlNfHRg2YvTlghH/j7nK9wUu Fcs04O2kus48xaaG1OuoE5XUZ/pLiIAKZytFNzP6V+iNyLtlWPkrY11zPiuuBGwII4TbULOfnwot3 E85nRnSp1BlAJDeKmZ9a00W+o7uG1XttDRf4VNiKR8ZIfOx0+ac8Lv9EMwv6Npka8awUtzWiXZaSz QkehKHxUAkl319GuPDfg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWuN-0004He-Q0; Tue, 13 Aug 2019 13:32:15 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWuK-0004G0-SE; Tue, 13 Aug 2019 13:32:14 +0000 X-UUID: 7b95c97b3c4b48d9ac8927c7d7a054c0-20190813 X-UUID: 7b95c97b3c4b48d9ac8927c7d7a054c0-20190813 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 828683873; Tue, 13 Aug 2019 05:32:07 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 06:32:05 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 21:31:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 13 Aug 2019 21:31:58 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 1/8] cpufreq: mediatek: change to regulator_get_optional Date: Tue, 13 Aug 2019 21:31:46 +0800 Message-ID: <1565703113-31479-2-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063212_910073_9E1D7737 X-CRM114-Status: GOOD ( 11.03 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" For new mediatek chip mt8183, cci and little cluster share the same buck, so need to modify the attribute of regulator from exclusive to optional Signed-off-by: Andrew-sh.Cheng --- drivers/cpufreq/mediatek-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index f14f3a85f2f7..a370577ffc73 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -338,7 +338,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) goto out_free_resources; } - proc_reg = regulator_get_exclusive(cpu_dev, "proc"); + proc_reg = regulator_get_optional(cpu_dev, "proc"); if (IS_ERR(proc_reg)) { if (PTR_ERR(proc_reg) == -EPROBE_DEFER) pr_warn("proc regulator for cpu%d not ready, retry.\n", From patchwork Tue Aug 13 13:31:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092251 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 481706C5 for ; Tue, 13 Aug 2019 13:33:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 35FA628683 for ; Tue, 13 Aug 2019 13:33:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29AEB2868C; Tue, 13 Aug 2019 13:33:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C9DDF2869F for ; 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Tue, 13 Aug 2019 21:31:59 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 2/8] cpufreq: mediatek: add clock enable for intermediate clock Date: Tue, 13 Aug 2019 21:31:47 +0800 Message-ID: <1565703113-31479-3-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 80B7E4F667209262ECE5DDF92431368CC350851965A8FE2E5A324CCB557F77822000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063321_810452_20AC0573 X-CRM114-Status: GOOD ( 12.07 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" Intermediate clock is not always enabled by ccf in different projects, so cpufreq should always enable it by itself. Signed-off-by: Andrew-sh.Cheng --- drivers/cpufreq/mediatek-cpufreq.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index a370577ffc73..acd9539e95de 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -368,13 +368,17 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) goto out_free_resources; } + ret = clk_prepare_enable(inter_clk); + if (ret) + goto out_free_opp_table; + /* Search a safe voltage for intermediate frequency. */ rate = clk_get_rate(inter_clk); opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); if (IS_ERR(opp)) { pr_err("failed to get intermediate opp for cpu%d\n", cpu); ret = PTR_ERR(opp); - goto out_free_opp_table; + goto out_disable_clock; } info->intermediate_voltage = dev_pm_opp_get_voltage(opp); dev_pm_opp_put(opp); @@ -393,6 +397,9 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) return 0; +out_disable_clock: + clk_disable_unprepare(inter_clk); + out_free_opp_table: dev_pm_opp_of_cpumask_remove_table(&info->cpus); @@ -419,6 +426,10 @@ static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) clk_put(info->cpu_clk); if (!IS_ERR(info->inter_clk)) clk_put(info->inter_clk); + if (!IS_ERR(info->inter_clk)) { + clk_disable_unprepare(info->inter_clk); + clk_put(info->inter_clk); + } dev_pm_opp_of_cpumask_remove_table(&info->cpus); } From patchwork Tue Aug 13 13:31:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092269 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6795F6C5 for ; Tue, 13 Aug 2019 13:33:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 57B1D284DC for ; Tue, 13 Aug 2019 13:33:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B96B28688; Tue, 13 Aug 2019 13:33:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EB808284DC for ; Tue, 13 Aug 2019 13:33:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7w+Cw7MoH4GVyAzu5RElWK1oyoXnDue43uW4RYIUbMQ=; b=RTqLbnH3EEZN+L A2Kq9wIYQC5+b0EWhYQwBMJvGWPPtwgJy+DXTqZh4rbknrnycyiMqJ2JTk0icYcR7/bqVn5a2WCvR 8vt9MN7RiiqRUi+bHxgz+1uzXGX1fGIE7VZGr4ueHa6f5ui70cVerdmJMNiMR4b2GsuFanJ92+5My 2YLCAcjFJZ3HKdgsPHEzFpnpBf73X17jP108sYcV4o76PUBBrk/4GtmxmW3Zpw3p6FLUoAR4eRAxC ZjrSPJX8Np2yyXitb7Ti0f5ec1D1ocRhoT8LdkflVLRAbXs0PiTSC2Tj6Hx/9R/IcJE5k3kQd+D5j iQ9BLZkIW5Z+fWnJMNMA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWvq-0005th-Hs; Tue, 13 Aug 2019 13:33:46 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWvR-0005UM-HS; Tue, 13 Aug 2019 13:33:24 +0000 X-UUID: dfe8fe8805924b6cb1c41792ea7e2ca1-20190813 X-UUID: dfe8fe8805924b6cb1c41792ea7e2ca1-20190813 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 900902866; Tue, 13 Aug 2019 05:32:03 -0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 06:32:02 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 21:31:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 13 Aug 2019 21:32:01 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 3/8] cpufreq: mediatek: Add support for mt8183 Date: Tue, 13 Aug 2019 21:31:48 +0800 Message-ID: <1565703113-31479-4-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063321_813595_FA79DF31 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" Add compatible string for mediatek mt8183 Signed-off-by: Andrew-sh.Cheng --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/mediatek-cpufreq.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 03dc4244ab00..0f7e837a264e 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -117,6 +117,7 @@ static const struct of_device_id blacklist[] __initconst = { { .compatible = "mediatek,mt817x", }, { .compatible = "mediatek,mt8173", }, { .compatible = "mediatek,mt8176", }, + { .compatible = "mediatek,mt8183", }, { .compatible = "nvidia,tegra124", }, { .compatible = "nvidia,tegra210", }, diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index acd9539e95de..4dce41b18369 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -546,6 +546,7 @@ static const struct of_device_id mtk_cpufreq_machines[] __initconst = { { .compatible = "mediatek,mt817x", }, { .compatible = "mediatek,mt8173", }, { .compatible = "mediatek,mt8176", }, + { .compatible = "mediatek,mt8183", }, { } }; From patchwork Tue Aug 13 13:31:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C917714D5 for ; Tue, 13 Aug 2019 13:32:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B74F628500 for ; Tue, 13 Aug 2019 13:32:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A0D0528698; Tue, 13 Aug 2019 13:32:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 939B828683 for ; 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Tue, 13 Aug 2019 21:32:02 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 4/8] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Date: Tue, 13 Aug 2019 21:31:49 +0800 Message-ID: <1565703113-31479-5-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063212_908823_8BDD4271 X-CRM114-Status: UNSURE ( 9.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" This adds dt-binding documentation of cci devfreq for Mediatek MT8183 SoC platform. Signed-off-by: Andrew-sh.Cheng --- .../bindings/devfreq/mt8183-cci-devfreq.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt b/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt new file mode 100644 index 000000000000..a65a70bb9f09 --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt @@ -0,0 +1,20 @@ +* Mediatek Cache Coherent Interconnect(CCI) frequency device + +Required properties: +- compatible: should contain "mediatek,mt8183-cci" for frequency scaling of CCI +- clocks: for frequency scaling of CCI +- clock-names: for frequency scaling of CCI driver to reference +- regulator: for voltage scaling of CCI +- operating-points-v2: for frequency scaling of CCI opp table + +Example: + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; + clock-names = "cci_clock"; + operating-points-v2 = <&cci_opp>; + }; + + &cci { + proc-supply = <&mt6358_vproc12_reg>; + }; \ No newline at end of file From patchwork Tue Aug 13 13:31:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092233 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0B95B14D5 for ; Tue, 13 Aug 2019 13:32:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EEB15285C6 for ; Tue, 13 Aug 2019 13:32:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DFD0E28684; Tue, 13 Aug 2019 13:32:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 39017285C6 for ; Tue, 13 Aug 2019 13:32:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JvO76vlB0UsruHZNXyPA2ykun4N6tidhOJVS99RiBT0=; b=eUr6OHJBhM8ddc 9agjsC4DD/JimyVF4zJp1n442a2FU0BJcbEZltzPuE3apy5W8eM1ZLRv1tESayavImchcgFgtsoBc NMNw0uIFHixV/BhhhcX1xXazRSHWkF9YIaps07uwvKKGO1dKnR+HWsD2ToCbUPjDT5C5kq6ZaGhYY nbnI4uPJU//CGQt6siekvoQwvdsTguqo0HFSPYa3vy34dNBTJ7OBi3j2I//E1qAe+2ZaISV4M0LOH xg1TRed02IucwcUU6uYdIBaC16ffCGpDgaX7q8bDAx+TXPDjcGYJ6qo9QaixfCUcEUzMQ0zZmuw53 +FP7mb2Kc5sjjObxUgFw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWuj-0004iD-SR; Tue, 13 Aug 2019 13:32:37 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWuM-0004G0-4n; Tue, 13 Aug 2019 13:32:15 +0000 X-UUID: 82e0d297bd1b4d258a85998a3e83be08-20190813 X-UUID: 82e0d297bd1b4d258a85998a3e83be08-20190813 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 278930921; Tue, 13 Aug 2019 05:32:06 -0800 Received: from MTKMBS02N2.mediatek.inc (172.21.101.101) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 06:32:05 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 21:31:58 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 13 Aug 2019 21:32:02 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 5/8] devfreq: add mediatek cci devfreq Date: Tue, 13 Aug 2019 21:31:50 +0800 Message-ID: <1565703113-31479-6-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FAEA0E8442C9E41E1221ED1F2F85A3FE0F473227AB12AD4E348BF513F0928E6A2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063214_233606_720C54B3 X-CRM114-Status: GOOD ( 18.76 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" This adds a devfreq driver for the Cache Coherent Interconnect (CCI) of the Mediatek MT8183. On the MT8183 the CCI is supplied by the same regulator as the LITTLE cores. The driver is notified when the regulator voltage changes (driven by cpufreq) and adjusts the CCI frequency to the maximum possible value. Signed-off-by: Andrew-sh.Cheng --- drivers/devfreq/Kconfig | 10 ++ drivers/devfreq/Makefile | 1 + drivers/devfreq/mt8183-cci-devfreq.c | 247 +++++++++++++++++++++++++++++++++++ 3 files changed, 258 insertions(+) create mode 100644 drivers/devfreq/mt8183-cci-devfreq.c diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index ba98a4e3ad33..0c8204d6b78a 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -92,6 +92,16 @@ config ARM_EXYNOS_BUS_DEVFREQ and adjusts the operating frequencies and voltages with OPP support. This does not yet operate with optimal voltages. +config ARM_MT8183_CCI_DEVFREQ + tristate "MT8183 CCI DEVFREQ Driver" + depends on ARM_MEDIATEK_CPUFREQ + help + This adds a devfreq driver for Cache Coherent Interconnect + of Mediatek MT8183, which is shared the same regulator + with cpu cluster. + It can track buck voltage and update a proper cci frequency. + Use notification to get regulator status. + config ARM_TEGRA_DEVFREQ tristate "Tegra DEVFREQ Driver" depends on ARCH_TEGRA_124_SOC diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile index 32b8d4d3f12c..817dde779f16 100644 --- a/drivers/devfreq/Makefile +++ b/drivers/devfreq/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o # DEVFREQ Drivers obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o +obj-$(CONFIG_ARM_MT8183_CCI_DEVFREQ) += mt8183-cci-devfreq.o obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c new file mode 100644 index 000000000000..818a167c442f --- /dev/null +++ b/drivers/devfreq/mt8183-cci-devfreq.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + + * Author: Andrew-sh.Cheng + */ + +#include +#include +#include +#include +#include +#include + +#include "governor.h" + +struct cci_devfreq { + struct devfreq *devfreq; + struct regulator *proc_reg; + unsigned long proc_reg_uV; + struct clk *cci_clk; + struct notifier_block nb; +}; + +static int cci_devfreq_regulator_notifier(struct notifier_block *nb, + unsigned long val, void *data) +{ + int ret; + struct cci_devfreq *cci_df = + container_of(nb, struct cci_devfreq, nb); + + /* deal with reduce frequency */ + if (val & REGULATOR_EVENT_PRE_VOLTAGE_CHANGE) { + struct pre_voltage_change_data *pvc_data = data; + + if (pvc_data->min_uV < pvc_data->old_uV) { + cci_df->proc_reg_uV = + (unsigned long)(pvc_data->min_uV); + mutex_lock(&cci_df->devfreq->lock); + ret = update_devfreq(cci_df->devfreq); + if (ret) + pr_err("Fail to reduce cci frequency: %d\n", + ret); + mutex_unlock(&cci_df->devfreq->lock); + } + } else if ((val & REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE) && + ((unsigned long)data > cci_df->proc_reg_uV)) { + cci_df->proc_reg_uV = (unsigned long)data; + mutex_lock(&cci_df->devfreq->lock); + ret = update_devfreq(cci_df->devfreq); + if (ret) + pr_err("Fail to raise cci frequency back: %d\n", ret); + mutex_unlock(&cci_df->devfreq->lock); + } else if ((val & REGULATOR_EVENT_VOLTAGE_CHANGE) && + (cci_df->proc_reg_uV < (unsigned long)data)) { + /* deal with increase frequency */ + cci_df->proc_reg_uV = (unsigned long)data; + mutex_lock(&cci_df->devfreq->lock); + ret = update_devfreq(cci_df->devfreq); + if (ret) + pr_err("Fail to raise cci frequency: %d\n", ret); + mutex_unlock(&cci_df->devfreq->lock); + } + + return 0; +} + +static int mtk_cci_governor_get_target(struct devfreq *devfreq, + unsigned long *freq) +{ + struct cci_devfreq *cci_df; + struct dev_pm_opp *opp; + + cci_df = dev_get_drvdata(devfreq->dev.parent); + + /* find available frequency */ + opp = dev_pm_opp_find_freq_ceil_by_volt(devfreq->dev.parent, + cci_df->proc_reg_uV); + *freq = dev_pm_opp_get_freq(opp); + + return 0; +} + +static int mtk_cci_governor_event_handler(struct devfreq *devfreq, + unsigned int event, void *data) +{ + int ret; + struct cci_devfreq *cci_df; + struct notifier_block *nb; + + cci_df = dev_get_drvdata(devfreq->dev.parent); + nb = &cci_df->nb; + + switch (event) { + case DEVFREQ_GOV_START: + case DEVFREQ_GOV_RESUME: + nb->notifier_call = cci_devfreq_regulator_notifier; + ret = regulator_register_notifier(cci_df->proc_reg, + nb); + if (ret) + pr_err("%s: failed to add governor: %d\n", __func__, + ret); + break; + + case DEVFREQ_GOV_STOP: + case DEVFREQ_GOV_SUSPEND: + ret = regulator_unregister_notifier(cci_df->proc_reg, + nb); + if (ret) + pr_err("%s: failed to add governor: %d\n", __func__, + ret); + break; + + default: + break; + } + + return 0; +} + +static struct devfreq_governor mtk_cci_devfreq_governor = { + .name = "mtk_cci_vmon", + .get_target_freq = mtk_cci_governor_get_target, + .event_handler = mtk_cci_governor_event_handler, + .immutable = true +}; + +static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq, + u32 flags) +{ + int ret; + struct cci_devfreq *cci_df = dev_get_drvdata(dev); + + if (!cci_df) + return -EINVAL; + + ret = clk_set_rate(cci_df->cci_clk, *freq); + if (ret) { + pr_err("%s: failed cci to set rate: %d\n", __func__, + ret); + return ret; + } + + return 0; +} + +static struct devfreq_dev_profile cci_devfreq_profile = { + .target = mtk_cci_devfreq_target, +}; + +static int mtk_cci_devfreq_probe(struct platform_device *pdev) +{ + struct device *cci_dev = &pdev->dev; + struct cci_devfreq *cci_df; + int ret; + + cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL); + if (!cci_df) + return -ENOMEM; + + cci_df->cci_clk = devm_clk_get(cci_dev, "cci_clock"); + ret = PTR_ERR_OR_ZERO(cci_df->cci_clk); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(cci_dev, "failed to get clock for CCI: %d\n", + ret); + return ret; + } + cci_df->proc_reg = devm_regulator_get_optional(cci_dev, "proc"); + ret = PTR_ERR_OR_ZERO(cci_df->proc_reg); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(cci_dev, "failed to get regulator for CCI: %d\n", + ret); + return ret; + } + + ret = dev_pm_opp_of_add_table(cci_dev); + if (ret) { + dev_err(cci_dev, "Fail to init CCI OPP table: %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, cci_df); + + cci_df->devfreq = devm_devfreq_add_device(cci_dev, + &cci_devfreq_profile, + "mtk_cci_vmon", + NULL); + if (IS_ERR(cci_df->devfreq)) { + ret = PTR_ERR(cci_df->devfreq); + dev_err(cci_dev, "cannot create cci devfreq device:%d\n", ret); + dev_pm_opp_of_remove_table(cci_dev); + return ret; + } + + return 0; +} + +static const __maybe_unused struct of_device_id + mediatek_cci_devfreq_of_match[] = { + { .compatible = "mediatek,mt8183-cci" }, + { }, +}; +MODULE_DEVICE_TABLE(of, mediatek_cci_devfreq_of_match); + +static struct platform_driver cci_devfreq_driver = { + .probe = mtk_cci_devfreq_probe, + .driver = { + .name = "mediatek-cci-devfreq", + .of_match_table = of_match_ptr(mediatek_cci_devfreq_of_match), + }, +}; + +static int __init mtk_cci_devfreq_init(void) +{ + int ret; + + ret = devfreq_add_governor(&mtk_cci_devfreq_governor); + if (ret) { + pr_err("%s: failed to add governor: %d\n", __func__, ret); + return ret; + } + + ret = platform_driver_register(&cci_devfreq_driver); + if (ret) + devfreq_remove_governor(&mtk_cci_devfreq_governor); + + return ret; +} +module_init(mtk_cci_devfreq_init) + +static void __exit mtk_cci_devfreq_exit(void) +{ + int ret; + + ret = devfreq_remove_governor(&mtk_cci_devfreq_governor); + if (ret) + pr_err("%s: failed to remove governor: %d\n", __func__, ret); + + platform_driver_unregister(&cci_devfreq_driver); +} +module_exit(mtk_cci_devfreq_exit) + +MODULE_DESCRIPTION("Mediatek CCI devfreq driver"); +MODULE_AUTHOR("Andrew-sh.Cheng "); +MODULE_LICENSE("GPL v2"); From patchwork Tue Aug 13 13:31:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092245 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53C961823 for ; Tue, 13 Aug 2019 13:33:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4350A2869F for ; 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Tue, 13 Aug 2019 05:32:12 -0800 Received: from MTKMBS01N2.mediatek.inc (172.21.101.79) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 06:32:11 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 21:32:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 13 Aug 2019 21:32:03 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 6/8] PM / OPP: Support adjusting OPP voltages at runtime Date: Tue, 13 Aug 2019 21:31:51 +0800 Message-ID: <1565703113-31479-7-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 45C891B5CDE799B39BBD36E00A2DD157FFB30200B7A1D213CDF68F7B0F153F442000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063257_079846_CC9E34BD X-CRM114-Status: GOOD ( 16.49 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, Roger Lu , Stephen Boyd , linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Stephen Boyd On some SoCs the Adaptive Voltage Scaling (AVS) technique is employed to optimize the operating voltage of a device. At a given frequency, the hardware monitors dynamic factors and either makes a suggestion for how much to adjust a voltage for the current frequency, or it automatically adjusts the voltage without software intervention. Add an API to the OPP library for the former case, so that AVS type devices can update the voltages for an OPP when the hardware determines the voltage should change. The assumption is that drivers like CPUfreq or devfreq will register for the OPP notifiers and adjust the voltage according to suggestions that AVS makes. This patch is devired from [1] submitted by Stephen. [1] https://lore.kernel.org/patchwork/patch/599279/ Signed-off-by: Stephen Boyd Signed-off-by: Roger Lu --- drivers/opp/core.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/pm_opp.h | 11 +++++++++ 2 files changed, 74 insertions(+) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index c094d5d20fd7..407a07f29b12 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -2054,6 +2054,69 @@ static int _opp_set_availability(struct device *dev, unsigned long freq, } /** + * dev_pm_opp_adjust_voltage() - helper to change the voltage of an OPP + * @dev: device for which we do this operation + * @freq: OPP frequency to adjust voltage of + * @u_volt: new OPP voltage + * + * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the + * copy operation, returns 0 if no modifcation was done OR modification was + * successful. + */ +int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, + unsigned long u_volt) +{ + struct opp_table *opp_table; + struct dev_pm_opp *tmp_opp, *opp = ERR_PTR(-ENODEV); + int r = 0; + + /* Find the opp_table */ + opp_table = _find_opp_table(dev); + if (IS_ERR(opp_table)) { + r = PTR_ERR(opp_table); + dev_warn(dev, "%s: Device OPP not found (%d)\n", __func__, r); + return r; + } + + mutex_lock(&opp_table->lock); + + /* Do we have the frequency? */ + list_for_each_entry(tmp_opp, &opp_table->opp_list, node) { + if (tmp_opp->rate == freq) { + opp = tmp_opp; + break; + } + } + + if (IS_ERR(opp)) { + r = PTR_ERR(opp); + goto adjust_unlock; + } + + /* Is update really needed? */ + if (opp->supplies->u_volt == u_volt) + goto adjust_unlock; + + opp->supplies->u_volt = u_volt; + + dev_pm_opp_get(opp); + mutex_unlock(&opp_table->lock); + + /* Notify the voltage change of the OPP */ + blocking_notifier_call_chain(&opp_table->head, OPP_EVENT_ADJUST_VOLTAGE, + opp); + + dev_pm_opp_put(opp); + goto adjust_put_table; + +adjust_unlock: + mutex_unlock(&opp_table->lock); +adjust_put_table: + dev_pm_opp_put_opp_table(opp_table); + return r; +} + +/** * dev_pm_opp_enable() - Enable a specific OPP * @dev: device for which we do this operation * @freq: OPP frequency to enable diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h index af5021f27cb7..86947d53e8c4 100644 --- a/include/linux/pm_opp.h +++ b/include/linux/pm_opp.h @@ -22,6 +22,7 @@ struct opp_table; enum dev_pm_opp_event { OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE, + OPP_EVENT_ADJUST_VOLTAGE, }; /** @@ -111,6 +112,9 @@ int dev_pm_opp_add(struct device *dev, unsigned long freq, void dev_pm_opp_remove(struct device *dev, unsigned long freq); void dev_pm_opp_remove_all_dynamic(struct device *dev); +int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, + unsigned long u_volt); + int dev_pm_opp_enable(struct device *dev, unsigned long freq); int dev_pm_opp_disable(struct device *dev, unsigned long freq); @@ -234,6 +238,13 @@ static inline void dev_pm_opp_remove_all_dynamic(struct device *dev) { } +static inline int +dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, + unsigned long u_volt) +{ + return 0; +} + static inline int dev_pm_opp_enable(struct device *dev, unsigned long freq) { return 0; From patchwork Tue Aug 13 13:31:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092271 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 246546C5 for ; Tue, 13 Aug 2019 13:33:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 11F7D28622 for ; Tue, 13 Aug 2019 13:33:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0652A284DC; Tue, 13 Aug 2019 13:33:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 871EC28622 for ; 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Tue, 13 Aug 2019 21:32:04 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 7/8] cpufreq: mediatek: add opp notification for SVS support Date: Tue, 13 Aug 2019 21:31:52 +0800 Message-ID: <1565703113-31479-8-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063323_263919_13410E34 X-CRM114-Status: GOOD ( 13.43 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" cpufreq should listen opp notification and do proper actions when receiving disable and voltage adjustment events, which are triggered when SVS is enabled. Signed-off-by: Andrew-sh.Cheng --- drivers/cpufreq/mediatek-cpufreq.c | 78 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index 4dce41b18369..9820c8003507 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -42,6 +42,10 @@ struct mtk_cpu_dvfs_info { struct list_head list_head; int intermediate_voltage; bool need_voltage_tracking; + struct mutex lock; /* avoid notify and policy race condition */ + struct notifier_block opp_nb; + int opp_cpu; + unsigned long opp_freq; }; static LIST_HEAD(dvfs_info_list); @@ -231,6 +235,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, vproc = dev_pm_opp_get_voltage(opp); dev_pm_opp_put(opp); + mutex_lock(&info->lock); /* * If the new voltage or the intermediate voltage is higher than the * current voltage, scale up voltage first. @@ -242,6 +247,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, pr_err("cpu%d: failed to scale up voltage!\n", policy->cpu); mtk_cpufreq_set_voltage(info, old_vproc); + mutex_unlock(&info->lock); return ret; } } @@ -253,6 +259,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, policy->cpu); mtk_cpufreq_set_voltage(info, old_vproc); WARN_ON(1); + mutex_unlock(&info->lock); return ret; } @@ -263,6 +270,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, policy->cpu); clk_set_parent(cpu_clk, armpll); mtk_cpufreq_set_voltage(info, old_vproc); + mutex_unlock(&info->lock); return ret; } @@ -273,6 +281,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, policy->cpu); mtk_cpufreq_set_voltage(info, inter_vproc); WARN_ON(1); + mutex_unlock(&info->lock); return ret; } @@ -288,15 +297,74 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, clk_set_parent(cpu_clk, info->inter_clk); clk_set_rate(armpll, old_freq_hz); clk_set_parent(cpu_clk, armpll); + mutex_unlock(&info->lock); return ret; } } + info->opp_freq = freq_hz; + mutex_unlock(&info->lock); + return 0; } #define DYNAMIC_POWER "dynamic-power-coefficient" +static int mtk_cpufreq_opp_notifier(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct dev_pm_opp *opp = data; + struct dev_pm_opp *opp_item; + struct mtk_cpu_dvfs_info *info = + container_of(nb, struct mtk_cpu_dvfs_info, opp_nb); + unsigned long freq, volt; + struct cpufreq_policy *policy; + int ret = 0; + + if (event == OPP_EVENT_ADJUST_VOLTAGE) { + freq = dev_pm_opp_get_freq(opp); + + mutex_lock(&info->lock); + if (info->opp_freq == freq) { + volt = dev_pm_opp_get_voltage(opp); + ret = mtk_cpufreq_set_voltage(info, volt); + if (ret) + dev_err(info->cpu_dev, "failed to scale voltage: %d\n", + ret); + } + mutex_unlock(&info->lock); + } else if (event == OPP_EVENT_DISABLE) { + freq = info->opp_freq; + opp_item = dev_pm_opp_find_freq_ceil(info->cpu_dev, &freq); + if (!IS_ERR(opp_item)) + dev_pm_opp_put(opp_item); + else + freq = 0; + + /* case of current opp is disabled */ + if (freq == 0 || freq != info->opp_freq) { + // find an enable opp item + freq = 1; + opp_item = dev_pm_opp_find_freq_ceil(info->cpu_dev, + &freq); + if (!IS_ERR(opp_item)) { + dev_pm_opp_put(opp_item); + policy = cpufreq_cpu_get(info->opp_cpu); + if (policy) { + cpufreq_driver_target(policy, + freq / 1000, + CPUFREQ_RELATION_L); + cpufreq_cpu_put(policy); + } + } else + pr_err("%s: all opp items are disabled\n", + __func__); + } + } + + return notifier_from_errno(ret); +} + static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) { struct device *cpu_dev; @@ -383,11 +451,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) info->intermediate_voltage = dev_pm_opp_get_voltage(opp); dev_pm_opp_put(opp); + info->opp_cpu = cpu; + info->opp_nb.notifier_call = mtk_cpufreq_opp_notifier; + ret = dev_pm_opp_register_notifier(cpu_dev, &info->opp_nb); + if (ret) { + pr_warn("cannot register opp notification\n"); + goto out_free_opp_table; + } + + mutex_init(&info->lock); info->cpu_dev = cpu_dev; info->proc_reg = proc_reg; info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg; info->cpu_clk = cpu_clk; info->inter_clk = inter_clk; + info->opp_freq = clk_get_rate(cpu_clk); /* * If SRAM regulator is present, software "voltage tracking" is needed From patchwork Tue Aug 13 13:31:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11092279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADCDA14D5 for ; Tue, 13 Aug 2019 13:34:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A5EF27D4A for ; Tue, 13 Aug 2019 13:34:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8CD3828688; Tue, 13 Aug 2019 13:34:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 17AB2285C6 for ; Tue, 13 Aug 2019 13:34:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zpjApxh9BcerAThRQD/DeUTY9Ts1Onf9Br9v47p7kF4=; b=cIBYg77fbaC7so lfqeGaqph1DB0JPuW+cmmHUTCnuVAcNhdvlxH7rDuIDmhBItKhBj3vzjzyvCiaICXTKitdjr6AAm6 igSnZCwVNED+pFd0B7FPMgYdFJ9DQv8Ty81xOqR8QEz2YU+rHIlARyxqImxV3AL5ZSjEKVxVGW34k jXFiCcP24cLDzc9YsQe+nygn0JyX5q7+wn86k/7gIlKOacCrAwU+k2qivRwGauq9iVasAsy7aKrsY iJbbSTXYyNphM8qrV/UaVcrltA/YIIzlUrwbcaJYa4Ipbyb40LjD6jphUeo0uPrO1EoLl5x5EluHf lWittHDcfcbej+1L+c7g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hxWwH-0006OS-Lt; Tue, 13 Aug 2019 13:34:13 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hxWvU-0005UM-Sf; Tue, 13 Aug 2019 13:33:26 +0000 X-UUID: b40049b4cb9e46449f9d5decd40df368-20190813 X-UUID: b40049b4cb9e46449f9d5decd40df368-20190813 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1751156485; Tue, 13 Aug 2019 05:32:08 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 06:32:07 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 13 Aug 2019 21:32:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 13 Aug 2019 21:32:06 +0800 From: Andrew-sh.Cheng To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , "Rob Herring" , Mark Rutland , "Matthias Brugger" , "Rafael J. Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" Subject: [v4, 8/8] devfreq: mediatek: cci devfreq register opp notification for SVS support Date: Tue, 13 Aug 2019 21:31:53 +0800 Message-ID: <1565703113-31479-9-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> References: <1565703113-31479-1-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_063325_025443_F6458BF6 X-CRM114-Status: GOOD ( 13.19 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, fan.chen@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Andrew-sh.Cheng" SVS will change the voltage of opp item. CCI devfreq need to react to change frequency. Signed-off-by: Andrew-sh.Cheng --- drivers/devfreq/mt8183-cci-devfreq.c | 62 ++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c index 818a167c442f..bc5c75d55c03 100644 --- a/drivers/devfreq/mt8183-cci-devfreq.c +++ b/drivers/devfreq/mt8183-cci-devfreq.c @@ -19,7 +19,10 @@ struct cci_devfreq { struct regulator *proc_reg; unsigned long proc_reg_uV; struct clk *cci_clk; + unsigned long freq; struct notifier_block nb; + struct notifier_block opp_nb; + int cci_min_freq; }; static int cci_devfreq_regulator_notifier(struct notifier_block *nb, @@ -65,17 +68,61 @@ static int cci_devfreq_regulator_notifier(struct notifier_block *nb, return 0; } +static int ccidevfreq_opp_notifier(struct notifier_block *nb, +unsigned long event, void *data) +{ + int ret; + struct dev_pm_opp *opp = data; + struct cci_devfreq *cci_df = container_of(nb, struct cci_devfreq, + opp_nb); + unsigned long freq, volt, cur_volt; + + if (event == OPP_EVENT_ADJUST_VOLTAGE) { + freq = dev_pm_opp_get_freq(opp); + /* current opp item is changed */ + if (freq == cci_df->freq) { + volt = dev_pm_opp_get_voltage(opp); + cur_volt = regulator_get_voltage(cci_df->proc_reg); + + if (volt > cur_volt) { + /* need reduce freq */ + mutex_lock(&cci_df->devfreq->lock); + ret = update_devfreq(cci_df->devfreq); + if (ret) + pr_err("Fail to reduce cci frequency by opp notification: %d\n", + ret); + mutex_unlock(&cci_df->devfreq->lock); + } + } + + if (freq == cci_df->cci_min_freq) { + volt = dev_pm_opp_get_voltage(opp); + regulator_set_voltage(cci_df->proc_reg, volt, INT_MAX); + } + } + + return 0; +} + + static int mtk_cci_governor_get_target(struct devfreq *devfreq, unsigned long *freq) { struct cci_devfreq *cci_df; struct dev_pm_opp *opp; + int ret; cci_df = dev_get_drvdata(devfreq->dev.parent); /* find available frequency */ opp = dev_pm_opp_find_freq_ceil_by_volt(devfreq->dev.parent, cci_df->proc_reg_uV); + ret = PTR_ERR_OR_ZERO(opp); + if (ret) { + pr_err("%s[%d], cannot find opp with voltage=%d: %d\n", + __func__, __LINE__, cci_df->proc_reg_uV, ret); + return ret; + } *freq = dev_pm_opp_get_freq(opp); return 0; @@ -87,9 +134,11 @@ static int mtk_cci_governor_event_handler(struct devfreq *devfreq, int ret; struct cci_devfreq *cci_df; struct notifier_block *nb; + struct notifier_block *opp_nb; cci_df = dev_get_drvdata(devfreq->dev.parent); nb = &cci_df->nb; + opp_nb = &cci_df->opp_nb; switch (event) { case DEVFREQ_GOV_START: @@ -100,6 +149,8 @@ static int mtk_cci_governor_event_handler(struct devfreq *devfreq, if (ret) pr_err("%s: failed to add governor: %d\n", __func__, ret); + opp_nb->notifier_call = ccidevfreq_opp_notifier; + dev_pm_opp_register_notifier(devfreq->dev.parent, opp_nb); break; case DEVFREQ_GOV_STOP: @@ -141,6 +192,8 @@ static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq, return ret; } + cci_df->freq = *freq; + return 0; } @@ -152,6 +205,8 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev) { struct device *cci_dev = &pdev->dev; struct cci_devfreq *cci_df; + unsigned long freq, volt; + struct dev_pm_opp *opp; int ret; cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL); @@ -181,6 +236,13 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev) return ret; } + /* set voltage lower bound */ + freq = 1; + opp = dev_pm_opp_find_freq_ceil(cci_dev, &freq); + cci_df->cci_min_freq = dev_pm_opp_get_freq(opp); + volt = dev_pm_opp_get_voltage(opp); + dev_pm_opp_put(opp); + platform_set_drvdata(pdev, cci_df); cci_df->devfreq = devm_devfreq_add_device(cci_dev,