From patchwork Wed Aug 14 13:14:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093957 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6BE8D6C5 for ; Wed, 14 Aug 2019 13:14:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 59AA028732 for ; Wed, 14 Aug 2019 13:14:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E08C28831; Wed, 14 Aug 2019 13:14:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D563C28732 for ; Wed, 14 Aug 2019 13:14:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727742AbfHNNOU (ORCPT ); Wed, 14 Aug 2019 09:14:20 -0400 Received: from muru.com ([72.249.23.125]:57620 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726551AbfHNNOU (ORCPT ); Wed, 14 Aug 2019 09:14:20 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id CA6E18176; Wed, 14 Aug 2019 13:14:45 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Tomi Valkeinen , Michael Turquette , Stephen Boyd , Tero Kristo , linux-clk@vger.kernel.org Subject: [PATCH 1/6] ARM: OMAP2+: Drop legacy platform data for omap4 gpu Date: Wed, 14 Aug 2019 06:14:03 -0700 Message-Id: <20190814131408.57162-2-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I've tested that the interconnect target module enables and idles just fine when probed with ti-sysc with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 0x56000024 = 0x00010200 # SGX540 CORE_REVISION # echo auto > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 And when idled, it will produce "Bus error" as expected. Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 1 - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 53 ---------------------- 2 files changed, 54 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -330,7 +330,6 @@ target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; - ti,hwmods = "gpu"; reg = <0x5601fc00 0x4>, <0x5601fc10 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1085,41 +1085,6 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = { }, }; -/* - * 'gpu' class - * 2d/3d graphics accelerator - */ - -static struct omap_hwmod_class_sysconfig omap44xx_gpu_sysc = { - .rev_offs = 0x1fc00, - .sysc_offs = 0x1fc10, - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class omap44xx_gpu_hwmod_class = { - .name = "gpu", - .sysc = &omap44xx_gpu_sysc, -}; - -/* gpu */ -static struct omap_hwmod omap44xx_gpu_hwmod = { - .name = "gpu", - .class = &omap44xx_gpu_hwmod_class, - .clkdm_name = "l3_gfx_clkdm", - .main_clk = "sgx_clk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_GFX_GFX_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'hdq1w' class * hdq / 1-wire serial interface controller @@ -2596,14 +2561,6 @@ static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* gpu -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_gpu__l3_main_2 = { - .master = &omap44xx_gpu_hwmod, - .slave = &omap44xx_l3_main_2_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* hsi -> l3_main_2 */ static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = { .master = &omap44xx_hsi_hwmod, @@ -3028,14 +2985,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_main_2 -> gpu */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpu = { - .master = &omap44xx_l3_main_2_hwmod, - .slave = &omap44xx_gpu_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_per -> hdq1w */ static struct omap_hwmod_ocp_if omap44xx_l4_per__hdq1w = { .master = &omap44xx_l4_per_hwmod, @@ -3450,7 +3399,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_debugss__l3_main_2, &omap44xx_dma_system__l3_main_2, &omap44xx_fdif__l3_main_2, - &omap44xx_gpu__l3_main_2, &omap44xx_hsi__l3_main_2, &omap44xx_ipu__l3_main_2, &omap44xx_iss__l3_main_2, @@ -3503,7 +3451,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_per__elm, &omap44xx_l4_cfg__fdif, &omap44xx_l3_main_2__gpmc, - &omap44xx_l3_main_2__gpu, &omap44xx_l4_per__hdq1w, &omap44xx_l4_cfg__hsi, &omap44xx_l3_main_2__ipu, From patchwork Wed Aug 14 13:14:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093961 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3739F1823 for ; Wed, 14 Aug 2019 13:14:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 247E6286DB for ; Wed, 14 Aug 2019 13:14:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 185DE2882C; Wed, 14 Aug 2019 13:14:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 943272882A for ; Wed, 14 Aug 2019 13:14:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727750AbfHNNOX (ORCPT ); Wed, 14 Aug 2019 09:14:23 -0400 Received: from muru.com ([72.249.23.125]:57628 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726551AbfHNNOX (ORCPT ); Wed, 14 Aug 2019 09:14:23 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 71AAA81DD; Wed, 14 Aug 2019 13:14:48 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Tomi Valkeinen , Michael Turquette , Stephen Boyd , Tero Kristo , linux-clk@vger.kernel.org Subject: [PATCH 2/6] bus: ti-sysc: Add module enable quirk for SGX on omap36xx Date: Wed, 14 Aug 2019 06:14:04 -0700 Message-Id: <20190814131408.57162-3-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add module enable quirk for SGX needed on omap36xx. Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 21 +++++++++++++++++++++ include/linux/platform_data/ti-sysc.h | 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -73,6 +73,7 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = { * @clk_enable_quirk: module specific clock enable quirk * @clk_disable_quirk: module specific clock disable quirk * @reset_done_quirk: module specific reset done quirk + * @module_enable_quirk: module specific enable quirk */ struct sysc { struct device *dev; @@ -98,6 +99,7 @@ struct sysc { void (*clk_enable_quirk)(struct sysc *sysc); void (*clk_disable_quirk)(struct sysc *sysc); void (*reset_done_quirk)(struct sysc *sysc); + void (*module_enable_quirk)(struct sysc *sysc); }; static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np, @@ -938,6 +940,9 @@ static int sysc_enable_module(struct device *dev) sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); } + if (ddata->module_enable_quirk) + ddata->module_enable_quirk(ddata); + return 0; } @@ -1251,6 +1256,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { SYSC_MODULE_QUIRK_I2C), SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0, SYSC_MODULE_QUIRK_I2C), + SYSC_QUIRK("gpu", 0x50000000, 0x14, -1, -1, 0x00010201, 0xffffffff, 0), + SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, + SYSC_MODULE_QUIRK_SGX), SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, SYSC_MODULE_QUIRK_WDT), @@ -1268,6 +1276,7 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0), SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0), + SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, 0), SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0), SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0), SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0), @@ -1419,6 +1428,15 @@ static void sysc_clk_disable_quirk_i2c(struct sysc *ddata) sysc_clk_quirk_i2c(ddata, false); } +/* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */ +static void sysc_module_enable_quirk_sgx(struct sysc *ddata) +{ + int offset = 0xff08; /* OCP_DEBUG_CONFIG */ + u32 val = BIT(31); /* THALIA_INT_BYPASS */ + + sysc_write(ddata, offset, val); +} + /* Watchdog timer needs a disable sequence after reset */ static void sysc_reset_done_quirk_wdt(struct sysc *ddata) { @@ -1461,6 +1479,9 @@ static void sysc_init_module_quirks(struct sysc *ddata) return; } + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX) + ddata->module_enable_quirk = sysc_module_enable_quirk_sgx; + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT) ddata->reset_done_quirk = sysc_reset_done_quirk_wdt; } diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -49,6 +49,7 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_MODULE_QUIRK_SGX BIT(18) #define SYSC_MODULE_QUIRK_HDQ1W BIT(17) #define SYSC_MODULE_QUIRK_I2C BIT(16) #define SYSC_MODULE_QUIRK_WDT BIT(15) From patchwork Wed Aug 14 13:14:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093965 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E57FF1823 for ; Wed, 14 Aug 2019 13:14:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D333828732 for ; Wed, 14 Aug 2019 13:14:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C697128806; Wed, 14 Aug 2019 13:14:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 680D728816 for ; Wed, 14 Aug 2019 13:14:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727913AbfHNNOZ (ORCPT ); Wed, 14 Aug 2019 09:14:25 -0400 Received: from muru.com ([72.249.23.125]:57646 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726551AbfHNNOZ (ORCPT ); Wed, 14 Aug 2019 09:14:25 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 360658216; Wed, 14 Aug 2019 13:14:51 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , Michael Turquette , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Stephen Boyd , Tero Kristo , Tomi Valkeinen , linux-clk@vger.kernel.org Subject: [PATCH 3/6] clk: ti: add clkctrl data omap5 sgx Date: Wed, 14 Aug 2019 06:14:05 -0700 Message-Id: <20190814131408.57162-4-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Looks like we have sgx clock missing currently so let's add it. Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Michael Turquette Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Stephen Boyd Cc: Tero Kristo Cc: Tomi Valkeinen Cc: linux-clk@vger.kernel.org Signed-off-by: Tony Lindgren --- drivers/clk/ti/clk-54xx.c | 34 +++++++++++++++++++++++++++++++ include/dt-bindings/clock/omap5.h | 3 +++ 2 files changed, 37 insertions(+) diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -314,6 +314,39 @@ static const struct omap_clkctrl_reg_data omap5_dss_clkctrl_regs[] __initconst = { 0 }, }; +static const char * const omap5_gpu_core_mux_parents[] __initconst = { + "dpll_core_h14x2_ck", + "dpll_per_h14x2_ck", + NULL, +}; + +static const char * const omap5_gpu_hyd_mux_parents[] __initconst = { + "dpll_core_h14x2_ck", + "dpll_per_h14x2_ck", + NULL, +}; + +static const char * const omap5_gpu_sys_clk_parents[] __initconst = { + "sys_clkin", + NULL, +}; + +static const struct omap_clkctrl_div_data omap5_gpu_sys_clk_data __initconst = { + .max_div = 2, +}; + +static const struct omap_clkctrl_bit_data omap5_gpu_core_bit_data[] __initconst = { + { 24, TI_CLK_MUX, omap5_gpu_core_mux_parents, NULL }, + { 25, TI_CLK_MUX, omap5_gpu_hyd_mux_parents, NULL }, + { 26, TI_CLK_DIVIDER, omap5_gpu_sys_clk_parents, &omap5_gpu_sys_clk_data }, + { 0 }, +}; + +static const struct omap_clkctrl_reg_data omap5_gpu_clkctrl_regs[] __initconst = { + { OMAP5_GPU_CLKCTRL, omap5_gpu_core_bit_data, CLKF_SW_SUP, "gpu_cm:clk:0000:24" }, + { 0 }, +}; + static const char * const omap5_mmc1_fclk_mux_parents[] __initconst = { "func_128m_clk", "dpll_per_m2x2_ck", @@ -470,6 +503,7 @@ const struct omap_clkctrl_data omap5_clkctrl_data[] __initconst = { { 0x4a008e20, omap5_l3instr_clkctrl_regs }, { 0x4a009020, omap5_l4per_clkctrl_regs }, { 0x4a009420, omap5_dss_clkctrl_regs }, + { 0x4a009520, omap5_gpu_clkctrl_regs }, { 0x4a009620, omap5_l3init_clkctrl_regs }, { 0x4ae07920, omap5_wkupaon_clkctrl_regs }, { 0 }, diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h --- a/include/dt-bindings/clock/omap5.h +++ b/include/dt-bindings/clock/omap5.h @@ -89,6 +89,9 @@ /* dss clocks */ #define OMAP5_DSS_CORE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) +/* gpu clocks */ +#define OMAP5_GPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) + /* l3init clocks */ #define OMAP5_MMC1_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) #define OMAP5_MMC2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30) From patchwork Wed Aug 14 13:14:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74F0914DB for ; Wed, 14 Aug 2019 13:14:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6335928816 for ; Wed, 14 Aug 2019 13:14:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 57B5C28833; Wed, 14 Aug 2019 13:14:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C30D22882C for ; Wed, 14 Aug 2019 13:14:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727848AbfHNNO2 (ORCPT ); Wed, 14 Aug 2019 09:14:28 -0400 Received: from muru.com ([72.249.23.125]:57660 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726551AbfHNNO2 (ORCPT ); Wed, 14 Aug 2019 09:14:28 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id D360D80C8; Wed, 14 Aug 2019 13:14:53 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Tomi Valkeinen , Michael Turquette , Stephen Boyd , Tero Kristo , linux-clk@vger.kernel.org Subject: [PATCH 4/6] ARM: dts: Configure sgx for omap5 Date: Wed, 14 Aug 2019 06:14:06 -0700 Message-Id: <20190814131408.57162-5-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I've tested that the interconnect target module enables and idles just fine when probed with ti-sysc with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5600) # rwmem 0x5600fe00 # OCP Revision 0x5600fe00 = 0x40000000 # echo auto > $(find /sys -name control | grep \/5600) # rwmem 0x5600fe10 # rwmem 0x56000024 Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5.dtsi | 23 +++++++++++++++++++++++ arch/arm/boot/dts/omap54xx-clocks.dtsi | 14 ++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -257,6 +257,29 @@ ports-implemented = <0x1>; }; + target-module@56000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x5600fe00 0x4>, + <0x5600fe10 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&gpu_clkctrl OMAP5_GPU_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x56000000 0x2000000>; + + /* + * Closed source PowerVR driver, no child device + * binding or driver in mainline + */ + }; + dss: dss@58000000 { compatible = "ti,omap5-dss"; reg = <0x58000000 0x80>; diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -1146,6 +1146,20 @@ }; }; + gpu_cm: gpu_cm@1500 { + compatible = "ti,omap4-cm"; + reg = <0x1500 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1500 0x100>; + + gpu_clkctrl: clk@20 { + compatible = "ti,clkctrl"; + reg = <0x20 0x4>; + #clock-cells = <2>; + }; + }; + l3init_cm: l3init_cm@1600 { compatible = "ti,omap4-cm"; reg = <0x1600 0x100>; From patchwork Wed Aug 14 13:14:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B09D1823 for ; Wed, 14 Aug 2019 13:14:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 19096286DB for ; Wed, 14 Aug 2019 13:14:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0DCC928832; Wed, 14 Aug 2019 13:14:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 810042882A for ; Wed, 14 Aug 2019 13:14:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727990AbfHNNOb (ORCPT ); Wed, 14 Aug 2019 09:14:31 -0400 Received: from muru.com ([72.249.23.125]:57678 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727972AbfHNNOa (ORCPT ); Wed, 14 Aug 2019 09:14:30 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 745F58176; Wed, 14 Aug 2019 13:14:56 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Tomi Valkeinen , Michael Turquette , Stephen Boyd , Tero Kristo , linux-clk@vger.kernel.org Subject: [PATCH 5/6] ARM: dts: Configure interconnect target module for omap3 sgx Date: Wed, 14 Aug 2019 06:14:07 -0700 Message-Id: <20190814131408.57162-6-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Looks like omap34xx OCP registers are not readable unlike on omap36xx. We use SGX revision register instead of the OCP revision register for 34xx and do not configure any SYSCONFIG register unlike for 36xx. I've tested that the interconnect target module enables and idles just fine with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5000); rwmem 0x5000fe10 # rwmem 0x50000014 # SGX revision register on 36xx 0x50000014 = 0x00010205 # echo auto > $(find /sys -name control | grep \/5000) # rwmem 0x5000fe00 And when idled, it will produce "Bus error" as expected. Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren Tested-by: Adam Ford #logicpd-som-lv-35xx-devkit --- arch/arm/boot/dts/omap34xx.dtsi | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/omap36xx.dtsi | 27 +++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -100,6 +100,32 @@ interrupts = <18>; }; }; + + /* + * On omap34xx the OCP registers do not seem to be accessible + * at all unlike on 36xx. Maybe SGX is permanently set to + * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is + * write-only at 0x50000e10. We detect SGX based on the SGX + * revision register instead of the unreadable OCP revision + * register. Also note that on early 34xx es1 revision there + * are also different clocks, but we do not have any dts users + * for it. + */ + sgx_module: target-module@50000000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x50000014 0x4>; + reg-names = "rev"; + clocks = <&sgx_fck>, <&sgx_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x50000000 0x4000>; + + /* + * Closed source PowerVR driver, no cnhild device + * binding or driver in mainline + */ + }; }; thermal_zones: thermal-zones { diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -139,6 +139,33 @@ interrupts = <18>; }; }; + + /* + * The OCP register layout seems to be a subset of the + * "ti,sysc-omap4" with just sidle and midle bits. + */ + sgx_module: target-module@50000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x5000fe00 0x4>, + <0x5000fe10 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&sgx_fck>, <&sgx_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x50000000 0x2000000>; + + /* + * Closed source PowerVR driver, no cnhild device + * binding or driver in mainline + */ + }; }; thermal_zones: thermal-zones { From patchwork Wed Aug 14 13:14:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11093977 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9BE671823 for ; Wed, 14 Aug 2019 13:14:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8B06C287DB for ; Wed, 14 Aug 2019 13:14:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F4422881E; Wed, 14 Aug 2019 13:14:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 269532882D for ; Wed, 14 Aug 2019 13:14:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727991AbfHNNOd (ORCPT ); Wed, 14 Aug 2019 09:14:33 -0400 Received: from muru.com ([72.249.23.125]:57690 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727685AbfHNNOd (ORCPT ); Wed, 14 Aug 2019 09:14:33 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 2458C80C8; Wed, 14 Aug 2019 13:14:59 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= , devicetree@vger.kernel.org, Adam Ford , =?utf-8?q?Filip?= =?utf-8?q?_Matijevi=C4=87?= , "H. Nikolaus Schaller" , Ivaylo Dimitrov , moaz korena , Merlijn Wajer , =?utf-8?q?Pawe=C5=82_Chmiel?= , Philipp Rossak , Tomi Valkeinen , Michael Turquette , Stephen Boyd , Tero Kristo , linux-clk@vger.kernel.org Subject: [PATCH 6/6] ARM: dts: Configure rstctrl reset for SGX Date: Wed, 14 Aug 2019 06:14:08 -0700 Message-Id: <20190814131408.57162-7-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190814131408.57162-1-tony@atomide.com> References: <20190814131408.57162-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The following can be tested via sysfs with the following to ensure the SGX module gets enabled and disabled properly: # echo on > /sys/bus/platform/devices/5600fe00.target-module/power/control # rwmem 0x5600fe00 # revision register 0x5600fe00 = 0x40000000 # echo auto > /sys/bus/platform/devices/5600fe00.target-module/power/control # rwmem 0x5000fe00 Bus error Note that this patch depends on the PRM rstctrl driver that has been recently posted. If the child device driver(s) need to prevent rstctrl reset on PM runtime suspend, the drivers need to increase the usecount for the shared rstctrl reset that can be mapped also for the child device(s) or accessed via dev->parent. Cc: Adam Ford Cc: Filip Matijević Cc: "H. Nikolaus Schaller" Cc: Ivaylo Dimitrov Cc: moaz korena Cc: Merlijn Wajer Cc: Paweł Chmiel Cc: Philipp Rossak Cc: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -460,6 +460,31 @@ <&edma 5 0>; dma-names = "tx", "rx"; }; + + target-module@56000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x5600fe00 0x4>, + <0x5600fe10 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>; + clock-names = "fck"; + resets = <&prm_gfx 0>; + reset-names = "rstctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x56000000 0x1000000>; + + /* + * Closed source PowerVR driver, no child device + * binding or driver in mainline + */ + }; }; };