From patchwork Thu Sep 6 15:33:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 10590909 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F395920 for ; Thu, 6 Sep 2018 17:28:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 08E352B009 for ; Thu, 6 Sep 2018 17:28:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EDBA02B00C; Thu, 6 Sep 2018 17:28:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6FD8D2B005 for ; Thu, 6 Sep 2018 17:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728378AbeIFWFJ (ORCPT ); Thu, 6 Sep 2018 18:05:09 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:39714 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728175AbeIFWFJ (ORCPT ); Thu, 6 Sep 2018 18:05:09 -0400 X-Greylist: delayed 7075 seconds by postgrey-1.27 at vger.kernel.org; Thu, 06 Sep 2018 18:05:09 EDT Received: by wens.csie.org (Postfix, from userid 1000) id 622B65FD38; Thu, 6 Sep 2018 23:33:05 +0800 (CST) From: Chen-Yu Tsai To: Ulf Hansson , Maxime Ripard Cc: Chen-Yu Tsai , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH resend] mmc: sunxi: Use new timing mode for A64 eMMC controller Date: Thu, 6 Sep 2018 23:33:04 +0800 Message-Id: <20180906153304.22239-1-wens@csie.org> X-Mailer: git-send-email 2.19.0.rc1 MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The eMMC controller is also a new timing mode controller, but it doesn't have the timing mode switch. It does however have signal delay and calibration controls, typical of Allwinner MMC controllers that support the new timing mode. Enable the new timing mode setting for the A64 eMMC controller. This also enables MMC HS-DDR modes, which gives higher throughput for eMMC chips that support it, and can deliver such throughput. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- This is just a resend. A separate patch clarifying the usage of the new timing mode should meet Maxime's request for comments clarifying the new timing mode usage from the initial submission of this patch. --- drivers/mmc/host/sunxi-mmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 5f8d3ea0a0f8..279e326e397e 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1177,6 +1177,7 @@ static const struct sunxi_mmc_cfg sun50i_a64_emmc_cfg = { .idma_des_size_bits = 13, .clk_delays = NULL, .can_calibrate = true, + .needs_new_timings = true, }; static const struct of_device_id sunxi_mmc_of_match[] = {