From patchwork Mon Aug 19 02:23:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Kowalczyk?= X-Patchwork-Id: 11100235 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE6C1912 for ; Mon, 19 Aug 2019 05:03:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA54028481 for ; Mon, 19 Aug 2019 05:03:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A461328562; Mon, 19 Aug 2019 05:03:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 079BD28481 for ; Mon, 19 Aug 2019 05:03:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hzZni-0003T5-9l; Mon, 19 Aug 2019 05:01:50 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hzXMr-0007Xn-EC for xen-devel@lists.xenproject.org; Mon, 19 Aug 2019 02:25:57 +0000 X-Inumbo-ID: ac99d8b0-c228-11e9-b90c-bc764e2007e4 Received: from out4-smtp.messagingengine.com (unknown [66.111.4.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id ac99d8b0-c228-11e9-b90c-bc764e2007e4; Mon, 19 Aug 2019 02:25:56 +0000 (UTC) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 0446E20F24; Sun, 18 Aug 2019 22:25:56 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Sun, 18 Aug 2019 22:25:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:message-id:mime-version:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=/CVNj+ SHPZl6K/KJ86ocKbDglMh3IcSz6hX1P4cLp3k=; b=AYf9EwLKx7g/SsGfpsItt2 5btyqU+qDSQaAjda4hhK9dn8vBrd8lz9+3390JRgK0uIK/WA0izFuRHyjvbxz6D5 ekgHZTpprzDPhjkoRBxIXEn9EQwOfMNNFTxuAJUrtKKDGoqTBvu1kZeXF0qqjX7A s1xdr4OyykDy10XhPflUJpoA5Xqp2k4mrpg3DaXSl8iXex6tRtj1HpY66OvB4PoK FHXAk48MeephgRjUZsArVQQn8u8eVIVAmQCoLa80utYMYO6dFlSccN8XTrROMMI4 EbZ/iMGzYFiX+x8NzLjPJVvq/OWZQ40mQCP82Y4KB/7AEf3SiwvuZHU7ONUzfovg == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddrudefkedgheekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffogggtgfesthekredtredtjeenucfhrhhomhepofhitghhrghl ucfmohifrghltgiihihkuceomhhkohifsehinhhvihhsihgslhgvthhhihhnghhslhgrsg drtghomheqnecuffhomhgrihhnpehtrhgrmhhpohhlihhnvgdrshgspdifrghkvghuphdr shgsnecukfhppeekledrieegrdduledruddvfeenucfrrghrrghmpehmrghilhhfrhhomh epmhhkohifsehinhhvihhsihgslhgvthhhihhnghhslhgrsgdrtghomhenucevlhhushht vghrufhiiigvpedt X-ME-Proxy: Received: from localhost.localdomain (89-64-19-123.dynamic.chello.pl [89.64.19.123]) by mail.messagingengine.com (Postfix) with ESMTPA id A392E8005B; Sun, 18 Aug 2019 22:25:53 -0400 (EDT) From: =?utf-8?q?Micha=C5=82_Kowalczyk?= To: xen-devel@lists.xenproject.org Date: Mon, 19 Aug 2019 04:23:33 +0200 Message-Id: <1c917278029b206317a2155fb78e63ed14b621e5.1566176127.git.mkow@invisiblethingslab.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 19 Aug 2019 05:01:49 +0000 Subject: [Xen-devel] [PATCH v1] x86: Restore IA32_MISC_ENABLE on wakeup X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Wei Liu , =?utf-8?q?Micha=C5=82_Kowalczyk?= , Andrew Cooper , =?utf-8?q?Marek_Marczykowski-G?= =?utf-8?q?=C3=B3recki?= , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Code in intel.c:early_init_intel() modifies IA32_MISC_ENABLE MSR. Those modifications must be restored after resuming from S3 (see e.g. Linux wakeup code), otherwise bad things may happen (e.g. wakeup code may cause #GP when trying to set IA32_EFER.NXE [1]). This bug was noticed on a ThinkPad x230 with NX disabled in the BIOS: Xen could correctly boot, but crashed when resuming from suspend. Applying this patch fixed the problem. [1] Intel SDM vol 3: "If the execute-disable capability is not available, a write to set IA32_EFER.NXE produces a #GP exception." Signed-off-by: Michał Kowalczyk --- xen/arch/x86/boot/trampoline.S | 6 +++--- xen/arch/x86/boot/wakeup.S | 15 +++++++++++++++ xen/arch/x86/cpu/intel.c | 2 +- xen/include/asm-x86/processor.h | 2 +- 4 files changed, 20 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S index 7c6a2328d2..fcaa3eeaf1 100644 --- a/xen/arch/x86/boot/trampoline.S +++ b/xen/arch/x86/boot/trampoline.S @@ -85,7 +85,7 @@ trampoline_gdt: .long trampoline_gdt + BOOT_PSEUDORM_DS + 2 - . .popsection -GLOBAL(trampoline_misc_enable_off) +GLOBAL(misc_enable_off) .quad 0 GLOBAL(cpuid_ext_features) @@ -117,8 +117,8 @@ trampoline_protmode_entry: mov %eax,%cr3 /* Adjust IA32_MISC_ENABLE if needed (for NX enabling below). */ - mov bootsym_rel(trampoline_misc_enable_off,4,%esi) - mov bootsym_rel(trampoline_misc_enable_off+4,4,%edi) + mov bootsym_rel(misc_enable_off,4,%esi) + mov bootsym_rel(misc_enable_off+4,4,%edi) mov %esi,%eax or %edi,%eax jz 1f diff --git a/xen/arch/x86/boot/wakeup.S b/xen/arch/x86/boot/wakeup.S index e3cb9e033a..b5f825e983 100644 --- a/xen/arch/x86/boot/wakeup.S +++ b/xen/arch/x86/boot/wakeup.S @@ -138,6 +138,21 @@ wakeup_32: add bootsym_rel(trampoline_xen_phys_start,4,%eax) mov %eax,%cr3 + /* Reapply IA32_MISC_ENABLE modifications from early_init_intel(). */ + mov bootsym_rel(misc_enable_off, 4, %esi) + mov bootsym_rel(misc_enable_off+4, 4, %edi) + mov %esi, %eax + or %edi, %eax + jz 1f + mov $MSR_IA32_MISC_ENABLE, %ecx + rdmsr + not %esi + not %edi + and %esi, %eax + and %edi, %edx + wrmsr +1: + /* Will cpuid feature change after resume? */ /* Set up EFER (Extended Feature Enable Register). */ mov bootsym_rel(cpuid_ext_features,4,%edi) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 5356a6ae10..a01e519281 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -269,7 +269,7 @@ static void early_init_intel(struct cpuinfo_x86 *c) MSR_IA32_MISC_ENABLE_XD_DISABLE); if (disable) { wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable); - bootsym(trampoline_misc_enable_off) |= disable; + bootsym(misc_enable_off) |= disable; } if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index 2862321eee..b325e4b0df 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -152,7 +152,7 @@ extern void (*ctxt_switch_masking)(const struct vcpu *next); extern bool_t opt_cpu_info; extern u32 cpuid_ext_features; -extern u64 trampoline_misc_enable_off; +extern u64 misc_enable_off; /* Maximum width of physical addresses supported by the hardware. */ extern unsigned int paddr_bits;