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Thu, 22 Aug 2019 18:51:35 +0000 From: "Ghannam, Yazen" To: "linux-edac@vger.kernel.org" CC: "Ghannam, Yazen" , "linux-kernel@vger.kernel.org" , "bp@alien8.de" Subject: [RFC PATCH v2] EDAC/amd64: Check for memory before fully initializing an instance Thread-Topic: [RFC PATCH v2] EDAC/amd64: Check for memory before fully initializing an instance Thread-Index: AQHVWRqf0jl/DMf26EebTiGpQW84oA== Date: Thu, 22 Aug 2019 18:51:35 +0000 Message-ID: <20190822185123.189179-1-Yazen.Ghannam@amd.com> References: <20190821235938.118710-11-Yazen.Ghannam@amd.com> In-Reply-To: <20190821235938.118710-11-Yazen.Ghannam@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0201CA0052.namprd02.prod.outlook.com (2603:10b6:803:20::14) To SN6PR12MB2639.namprd12.prod.outlook.com (2603:10b6:805:6f::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Yazen.Ghannam@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [165.204.78.2] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 27c4371d-f897-41cc-6d9a-08d72731c1f6 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);SRVR:SN6PR12MB2829; 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Free any cached hardware data before returning. Also, return 0 in this case since this is not a failure. Other nodes may have memory and the module should attempt to load an instance for them. Move printing of hardware information to after the instance is initialized, so that the information is only printed for nodes with memory. Signed-off-by: Yazen Ghannam --- Link: https://lkml.kernel.org/r/20190821235938.118710-11-Yazen.Ghannam@amd.com v1->v2: * Moved hardware info printing to after instance is initialized. * Added message for when instance has no memory. drivers/edac/amd64_edac.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index c1cb0234f085..3f0fe6ed1fa3 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2831,8 +2831,6 @@ static void read_mc_regs(struct amd64_pvt *pvt) edac_dbg(1, " DIMM type: %s\n", edac_mem_types[pvt->dram_type]); determine_ecc_sym_sz(pvt); - - dump_misc_regs(pvt); } /* @@ -3505,6 +3503,23 @@ static int init_one_instance(struct amd64_pvt *pvt, return ret; } +static bool instance_has_memory(struct amd64_pvt *pvt) +{ + bool cs_enabled = false; + int num_channels = 2; + int cs = 0, dct = 0; + + if (pvt->umc) + num_channels = num_umcs; + + for (dct = 0; dct < num_channels; dct++) { + for_each_chip_select(cs, dct, pvt) + cs_enabled |= csrow_enabled(cs, dct, pvt); + } + + return cs_enabled; +} + static int probe_one_instance(unsigned int nid) { struct pci_dev *F3 = node_to_amd_nb(nid)->misc; @@ -3535,6 +3550,12 @@ static int probe_one_instance(unsigned int nid) if (ret < 0) goto err_enable; + ret = 0; + if (!instance_has_memory(pvt)) { + amd64_warn("Node %d: DRAM ECC disabled. No DIMMs detected.\n", nid); + goto err_enable; + } + if (!ecc_enabled(pvt)) { ret = 0; @@ -3561,6 +3582,8 @@ static int probe_one_instance(unsigned int nid) goto err_enable; } + dump_misc_regs(pvt); + return ret; err_enable: