From patchwork Wed Aug 28 19:17:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11119701 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 399A41398 for ; Wed, 28 Aug 2019 19:18:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D0D0E233A1 for ; Wed, 28 Aug 2019 19:18:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Yjb6U4UM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726911AbfH1TSE (ORCPT ); Wed, 28 Aug 2019 15:18:04 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:42990 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726887AbfH1TSD (ORCPT ); Wed, 28 Aug 2019 15:18:03 -0400 Received: by mail-pg1-f195.google.com with SMTP id p3so226395pgb.9 for ; Wed, 28 Aug 2019 12:18:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=frRCVqPEFMbhw8WqpjXDJar8k8pcOq5o3U1C6HdWuBw=; b=Yjb6U4UM55j8Qd5lit9icVMiTabO3K/CK55xecjtlEFvjf+4Pdftmlehf2ZPI1XIYc XrzRw9OqguPYP/qHWihbXPRn6ybHx6rhep7dXtDjlsOroLX5AKsTmUPW7cm/2xjS/Hp6 dw/ffiytgOzt9ZYxOZAGv7I+35KMp+ivU2u9dlKLMgz6xEtf26Wysin8jIrSgFYnq3Jb C3i14S5BW5mrcB8yH9ljDgWNGHe4oAX3+91T+dNOO1xbJK+SMB6UxpfRUikAymXzARuy Gv5nYSbgbCB8hb+Ruc8hubVmChEAiViAlTyrKPrLdvfCuzC5B9R6HU1RSuen7bquT3Dg Rgpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=frRCVqPEFMbhw8WqpjXDJar8k8pcOq5o3U1C6HdWuBw=; b=oWS/K2pzNxluduBBBKVj8hlfZknYJO5cJBFKd1zaM3AMcMTLpa1kdrEd64BLP5keNN QGM6phRgOitslusIrB3lJx8/3mfTKyXRgMMfdoZQ/vO0a/WHB0A/qoqbNSYV+uSS9L8A GnmfbGc8aSS8sm94TAII7Bwg+OqmBj47ZyCYZTL7aohXpHtg9h4smBynIk9ZR4q4KCTG uPL6jlVa/04VWDqItSl+1xBBp9JyF/hT9dRroxOprNuBL5Vnu87GGKOTtTv1wFDashwS 9vnzsGOMi8I/qy8maYAODOcvmYylYkzRjbGLgqT1q+NZJGpX1YMmbbpboPSy2qofzQMd F+0Q== X-Gm-Message-State: APjAAAVCwfMrFP+hLyKk4wHoX+did2dw4Ym5VdUGZWVouiS2iNPphcLM VknFCRCisGZOqZkB/X/qpKy3eg== X-Google-Smtp-Source: APXvYqwrFTCnXoqdHbgZohuVx98l8XulzgZc2FWKZBE02LtPNRDCRgfcbpdHghyq8UYkjWZjVa3ZRw== X-Received: by 2002:a63:e948:: with SMTP id q8mr4686361pgj.93.1567019882331; Wed, 28 Aug 2019 12:18:02 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id n128sm122717pfn.46.2019.08.28.12.18.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Aug 2019 12:18:01 -0700 (PDT) From: Bjorn Andersson To: Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" Cc: Rob Herring , Mark Rutland , Andy Gross , Bean Huo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Linus Walleij Subject: [PATCH v4 1/3] scsi: ufs: Introduce vops for resetting device Date: Wed, 28 Aug 2019 12:17:54 -0700 Message-Id: <20190828191756.24312-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190828191756.24312-1-bjorn.andersson@linaro.org> References: <20190828191756.24312-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Some UFS memory devices needs their reset line toggled in order to get them into a good state for initialization. Provide a new vops to allow the platform driver to implement this operation. Reviewed-by: Alim Akhtar Signed-off-by: Bjorn Andersson Reviewed-by: Bean Huo --- Changes since v3: - None drivers/scsi/ufs/ufshcd.c | 6 ++++++ drivers/scsi/ufs/ufshcd.h | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 219c435d69a7..0fb4bfdd7943 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -6235,6 +6235,9 @@ static int ufshcd_reset_and_restore(struct ufs_hba *hba) int retries = MAX_HOST_RESET_RETRIES; do { + /* Reset the attached device */ + ufshcd_vops_device_reset(hba); + err = ufshcd_host_reset_and_restore(hba); } while (err && --retries); @@ -8371,6 +8374,9 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) goto exit_gating; } + /* Reset the attached device */ + ufshcd_vops_device_reset(hba); + /* Host controller enable */ err = ufshcd_hba_enable(hba); if (err) { diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 9f61550abc7f..c94cfda52829 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -298,6 +298,7 @@ struct ufs_pwr_mode_info { * @resume: called during host controller PM callback * @dbg_register_dump: used to dump controller debug information * @phy_initialization: used to initialize phys + * @device_reset: called to issue a reset pulse on the UFS device */ struct ufs_hba_variant_ops { const char *name; @@ -326,6 +327,7 @@ struct ufs_hba_variant_ops { int (*resume)(struct ufs_hba *, enum ufs_pm_op); void (*dbg_register_dump)(struct ufs_hba *hba); int (*phy_initialization)(struct ufs_hba *); + void (*device_reset)(struct ufs_hba *hba); }; /* clock gating state */ @@ -1070,6 +1072,12 @@ static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba) hba->vops->dbg_register_dump(hba); } +static inline void ufshcd_vops_device_reset(struct ufs_hba *hba) +{ + if (hba->vops && hba->vops->device_reset) + hba->vops->device_reset(hba); +} + extern struct ufs_pm_lvl_states ufs_pm_lvl_states[]; /* From patchwork Wed Aug 28 19:17:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11119709 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18DF81398 for ; Wed, 28 Aug 2019 19:18:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E8893214DA for ; Wed, 28 Aug 2019 19:18:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="AFwFkCbw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726926AbfH1TSO (ORCPT ); Wed, 28 Aug 2019 15:18:14 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:44198 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726921AbfH1TSE (ORCPT ); Wed, 28 Aug 2019 15:18:04 -0400 Received: by mail-pl1-f193.google.com with SMTP id t14so397176plr.11 for ; Wed, 28 Aug 2019 12:18:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=peYkc8bpnDp6jFbXtkwKHOUEOwA9yyWEoa4Q9aEgSqo=; b=AFwFkCbwz63sJkbk32teOrITW/PxPxz4IF3E60WGCC6OIkYgPjzJSp1x7aiVGloV89 A4uKhTR4+72TgIhhMk3aWziPHvzqP0HeYcmoHdfilhX66Y1mMr9h8pFru1N4BoVW+TI3 0bTriWTQ9pTYyp4T40Ovwi8X0YboAI2w8vwO3wVWVR2ZmNP1uTjxRccGoZGnvCOI1tQN N184XnZqBtgT/eO0a37h7hSBchxRf+7/0PDYYjjmHqzqGjtfC8/8HN6mpqOE9jpA3smd 5X1x8XQLUJXnd8RDqF7+6RztHUb74CDvTbltYi6eRQjdu2uciJ+H5xMQqgc26X9PQt2d 79pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=peYkc8bpnDp6jFbXtkwKHOUEOwA9yyWEoa4Q9aEgSqo=; b=W/2SHUZmQ3qeXad+qQMB5jEbueGq84RRHtvX4gFccDvB7CwRkKWWQALFC8EHxIFOCB E7dVDKE/2IJ+J24JDHxCZQjTWpsRtZ0dY0HchZwSnNDM1nRVGhM/qo+kSM7pJsEAjrN7 6cd/JPL2SvsWppJbGOCRfRsNNioqZN7k3XQ9ZMCTf+uzxxIDAplzf9aiuWqbbYtVDirS kVZJObaFslJUFRFLqrGR02F5+povTf5ZjKEzP+Es4ga93UV+FZoIkUbTBiYKtSFoAt1N 9D3WiAXRIpF48lKAOMSsr1PTox8aNpo/5iFMOuUefkG1k5L9QxDsaiZ5bdqbK6WU2WQ0 cuyw== X-Gm-Message-State: APjAAAWNipmWpvr2rsYTV9DuTd6hKE1feBbhp+qxbZh+n3+ekqwfW8SY BMuT5L9KVsAVaAvxZy2EpfzCiw== X-Google-Smtp-Source: APXvYqybIMSlWnXZB7dwowyvH/Nncyh1fSLknh4G6/YETH495I0ZI/Wu7VCVHUtdSGq+TuI+zjgunA== X-Received: by 2002:a17:902:96a:: with SMTP id 97mr5909479plm.264.1567019883819; Wed, 28 Aug 2019 12:18:03 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id n128sm122717pfn.46.2019.08.28.12.18.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Aug 2019 12:18:03 -0700 (PDT) From: Bjorn Andersson To: Rob Herring , Mark Rutland , Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" Cc: Andy Gross , Bean Huo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Linus Walleij Subject: [PATCH v4 2/3] scsi: ufs-qcom: Implement device_reset vops Date: Wed, 28 Aug 2019 12:17:55 -0700 Message-Id: <20190828191756.24312-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190828191756.24312-1-bjorn.andersson@linaro.org> References: <20190828191756.24312-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The UFS_RESET pin on Qualcomm SoCs are controlled by TLMM and exposed through the GPIO framework. Acquire the device-reset GPIO and use this to implement the device_reset vops, to allow resetting the attached memory. Based on downstream support implemented by Subhash Jadavani . Signed-off-by: Bjorn Andersson Acked-by: Rob Herring --- Changes since v3: - Renamed device-reset-gpios to just reset-gpios. - Explicitly bail on !host->device_reset, to not rely on passing NULL to gpiod_set_value_cansleep() .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 2 ++ drivers/scsi/ufs/ufs-qcom.c | 36 +++++++++++++++++++ drivers/scsi/ufs/ufs-qcom.h | 4 +++ 3 files changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index a74720486ee2..d78ef63935f9 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -54,6 +54,8 @@ Optional properties: PHY reset from the UFS controller. - resets : reset node register - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. +- reset-gpios : A phandle and gpio specifier denoting the GPIO connected + to the RESET pin of the UFS memory device. Note: If above properties are not defined it can be assumed that the supply regulators or clocks are always on. diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c index 4473f339cbc0..2200c8434ef3 100644 --- a/drivers/scsi/ufs/ufs-qcom.c +++ b/drivers/scsi/ufs/ufs-qcom.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "ufshcd.h" @@ -1140,6 +1141,15 @@ static int ufs_qcom_init(struct ufs_hba *hba) } } + host->device_reset = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(host->device_reset)) { + err = PTR_ERR(host->device_reset); + if (err != -EPROBE_DEFER) + dev_err(dev, "failed to acquire reset gpio: %d\n", err); + goto out_variant_clear; + } + err = ufs_qcom_bus_register(host); if (err) goto out_variant_clear; @@ -1545,6 +1555,31 @@ static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba) usleep_range(1000, 1100); } +/** + * ufs_qcom_device_reset() - toggle the (optional) device reset line + * @hba: per-adapter instance + * + * Toggles the (optional) reset line to reset the attached device. + */ +static void ufs_qcom_device_reset(struct ufs_hba *hba) +{ + struct ufs_qcom_host *host = ufshcd_get_variant(hba); + + /* reset gpio is optional */ + if (!host->device_reset) + return; + + /* + * The UFS device shall detect reset pulses of 1us, sleep for 10us to + * be on the safe side. + */ + gpiod_set_value_cansleep(host->device_reset, 1); + usleep_range(10, 15); + + gpiod_set_value_cansleep(host->device_reset, 0); + usleep_range(10, 15); +} + /** * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations * @@ -1565,6 +1600,7 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = { .suspend = ufs_qcom_suspend, .resume = ufs_qcom_resume, .dbg_register_dump = ufs_qcom_dump_dbg_regs, + .device_reset = ufs_qcom_device_reset, }; /** diff --git a/drivers/scsi/ufs/ufs-qcom.h b/drivers/scsi/ufs/ufs-qcom.h index 001915d1e0e4..d401f174bb70 100644 --- a/drivers/scsi/ufs/ufs-qcom.h +++ b/drivers/scsi/ufs/ufs-qcom.h @@ -195,6 +195,8 @@ struct ufs_qcom_testbus { u8 select_minor; }; +struct gpio_desc; + struct ufs_qcom_host { /* * Set this capability if host controller supports the QUniPro mode @@ -232,6 +234,8 @@ struct ufs_qcom_host { struct ufs_qcom_testbus testbus; struct reset_controller_dev rcdev; + + struct gpio_desc *device_reset; }; static inline u32 From patchwork Wed Aug 28 19:17:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11119705 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CBA9E184E for ; Wed, 28 Aug 2019 19:18:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AA196214DA for ; Wed, 28 Aug 2019 19:18:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="gIkfOOHw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727017AbfH1TSN (ORCPT ); Wed, 28 Aug 2019 15:18:13 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:46264 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726947AbfH1TSF (ORCPT ); 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id n128sm122717pfn.46.2019.08.28.12.18.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Aug 2019 12:18:04 -0700 (PDT) From: Bjorn Andersson To: Rob Herring , Mark Rutland , Andy Gross Cc: Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Linus Walleij Subject: [PATCH v4 3/3] arm64: dts: qcom: sdm845: Specify UFS device-reset GPIO Date: Wed, 28 Aug 2019 12:17:56 -0700 Message-Id: <20190828191756.24312-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190828191756.24312-1-bjorn.andersson@linaro.org> References: <20190828191756.24312-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Specify the UFS device-reset gpio for db845c and mtp, so that the controller will issue a reset of the UFS device. Reviewed-by: Linus Walleij Signed-off-by: Bjorn Andersson --- Changes since v3: - Renamed property - Added property to db845c arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2 ++ arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 71bd717a4251..f5a85caff1a3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -497,6 +497,8 @@ &ufs_mem_hc { status = "okay"; + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l20a_2p95>; vcc-max-microamp = <800000>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 2e78638eb73b..c57548b7b250 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -388,6 +388,8 @@ &ufs_mem_hc { status = "okay"; + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l20a_2p95>; vcc-max-microamp = <600000>; };