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Fri, 30 Aug 2019 03:46:34 -0400 (EDT) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH 1/2] mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock() Date: Fri, 30 Aug 2019 17:16:43 +0930 Message-Id: <20190830074644.10936-2-andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190830074644.10936-1-andrew@aj.id.au> References: <20190830074644.10936-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190830_004644_646967_3C5DA932 X-CRM114-Status: UNSURE ( 8.46 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [66.111.4.26 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ulf.hansson@linaro.org, linux-aspeed@lists.ozlabs.org, Andrew Jeffery , openbmc@lists.ozlabs.org, ryanchen.aspeed@gmail.com, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The early-exit didn't seem to matter on the AST2500, but on the AST2600 the SD clock genuinely may not be running on entry to aspeed_sdhci_set_clock(). Remove the early exit to ensure we always run sdhci_enable_clk(). Signed-off-by: Andrew Jeffery --- drivers/mmc/host/sdhci-of-aspeed.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index d5acb5afc50f..a9175ca85696 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -55,9 +55,6 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) int div; u16 clk; - if (clock == host->clock) - return; - sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); if (clock == 0) From patchwork Fri Aug 30 07:46:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11123227 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66C9514E5 for ; Fri, 30 Aug 2019 07:47:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 41EE2206BB for ; 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Fri, 30 Aug 2019 03:46:38 -0400 (EDT) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH 2/2] mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK Date: Fri, 30 Aug 2019 17:16:44 +0930 Message-Id: <20190830074644.10936-3-andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190830074644.10936-1-andrew@aj.id.au> References: <20190830074644.10936-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190830_004644_781191_EF576A82 X-CRM114-Status: GOOD ( 11.92 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [66.111.4.26 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ulf.hansson@linaro.org, linux-aspeed@lists.ozlabs.org, Andrew Jeffery , openbmc@lists.ozlabs.org, ryanchen.aspeed@gmail.com, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the maximum clock rate if it is set. This enables artificial limitation of the bus speed via max-frequency in the devicetree for e.g. the AST2600 evaluation board where I am seeing errors at 200MHz. Signed-off-by: Andrew Jeffery --- drivers/mmc/host/sdhci-of-aspeed.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index a9175ca85696..5cc00abcd71f 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -52,16 +52,24 @@ static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc, static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) { + struct sdhci_pltfm_host *pltfm_host; + unsigned long parent; int div; u16 clk; + pltfm_host = sdhci_priv(host); + parent = clk_get_rate(pltfm_host->clk); + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); if (clock == 0) goto out; + if (WARN_ON(clock > host->max_clk)) + clock = host->max_clk; + for (div = 1; div < 256; div *= 2) { - if ((host->max_clk / div) <= clock) + if ((parent / div) <= clock) break; } div >>= 1; @@ -74,6 +82,14 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) host->clock = clock; } +static unsigned int aspeed_sdhci_get_max_clock(struct sdhci_host *host) +{ + if (host->mmc->f_max) + return host->mmc->f_max; + + return sdhci_pltfm_clk_get_max_clock(host); +} + static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width) { struct sdhci_pltfm_host *pltfm_priv; @@ -100,7 +116,7 @@ static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width) static const struct sdhci_ops aspeed_sdhci_ops = { .set_clock = aspeed_sdhci_set_clock, - .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .get_max_clock = aspeed_sdhci_get_max_clock, .set_bus_width = aspeed_sdhci_set_bus_width, .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, .reset = sdhci_reset,