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Wed, 04 Sep 2019 22:48:55 -0700 (PDT) From: jamestai.sky@gmail.com X-Google-Original-From: james.tai@realtek.com To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: Add support for Realtek SOC Date: Thu, 5 Sep 2019 13:46:47 +0800 Message-Id: <20190905054647.1235-1-james.tai@realtek.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190904_224859_275834_CA5682BD X-CRM114-Status: GOOD ( 17.23 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:544 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (jamestai.sky[at]gmail.com) -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , "Jason A . Donenfeld" , "james.tai" , Arnd Bergmann , Ard Biesheuvel , CY_Huang , Linus Walleij , Nicolas Pitre , Nick Desaulniers , Russell King , Stefan Agner , Mike Rapoport , Masahiro Yamada , Paul Burton , Benjamin Gaignard , Mauro Carvalho Chehab , Doug Anderson , Thierry Reding , Phinex Hung MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: "james.tai" This patch adds the basic machine file for the Realtek RTD16XX platform. Signed-off-by: james.tai --- arch/arm/Kconfig | 2 + arch/arm/Makefile | 2 + arch/arm/mach-realtek/Kconfig | 32 ++++++++++++ arch/arm/mach-realtek/Makefile | 3 ++ arch/arm/mach-realtek/platsmp.c | 91 +++++++++++++++++++++++++++++++++ arch/arm/mach-realtek/platsmp.h | 7 +++ arch/arm/mach-realtek/realtek.c | 78 ++++++++++++++++++++++++++++ 7 files changed, 215 insertions(+) create mode 100644 arch/arm/mach-realtek/Kconfig create mode 100644 arch/arm/mach-realtek/Makefile create mode 100644 arch/arm/mach-realtek/platsmp.c create mode 100644 arch/arm/mach-realtek/platsmp.h create mode 100644 arch/arm/mach-realtek/realtek.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 33b00579beff..c7c9a3662eb7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -836,6 +836,8 @@ source "arch/arm/mach-zx/Kconfig" source "arch/arm/mach-zynq/Kconfig" +source "arch/arm/mach-realtek/Kconfig" + # ARMv7-M architecture config ARCH_EFM32 bool "Energy Micro efm32" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c3624ca6c0bc..1f0926449d47 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -148,6 +148,7 @@ endif textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 textofs-$(CONFIG_ARCH_MESON) := 0x00208000 +textofs-$(CONFIG_ARCH_REALTEK) := 0x00208000 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 # Machine directory name. This list is sorted alphanumerically @@ -225,6 +226,7 @@ machine-$(CONFIG_ARCH_VT8500) += vt8500 machine-$(CONFIG_ARCH_W90X900) += w90x900 machine-$(CONFIG_ARCH_ZX) += zx machine-$(CONFIG_ARCH_ZYNQ) += zynq +machine-$(CONFIG_ARCH_REALTEK) += realtek machine-$(CONFIG_PLAT_SPEAR) += spear # Platform directory name. This list is sorted alphanumerically diff --git a/arch/arm/mach-realtek/Kconfig b/arch/arm/mach-realtek/Kconfig new file mode 100644 index 000000000000..a8269964dbdb --- /dev/null +++ b/arch/arm/mach-realtek/Kconfig @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: GPL-2.0-only +menuconfig ARCH_REALTEK + bool "Realtek SoCs" + select ARM_GLOBAL_TIMER + select CLKDEV_LOOKUP + select HAVE_SMP + select HAVE_MACH_CLKDEV + select GENERIC_CLOCKEVENTS + select HAVE_SCHED_CLOCK + select ARCH_HAS_CPUFREQ + select CLKSRC_OF + select ARCH_REQUIRE_GPIOLIB + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + select PINCTRL + select COMMON_CLK + select ARCH_HAS_BARRIERS + select SPARSE_IRQ + select PM_OPP + select ARM_HAS_SG_CHAIN + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR + select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER + select PCI_DOMAINS if PCI + select USE_OF + +config ARCH_RTD16XX + bool "Enable support for RTD1619" + depends on ARCH_REALTEK + select ARM_GIC_V3 + select ARM_PSCI diff --git a/arch/arm/mach-realtek/Makefile b/arch/arm/mach-realtek/Makefile new file mode 100644 index 000000000000..9cdc1f1f2917 --- /dev/null +++ b/arch/arm/mach-realtek/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_ARCH_REALTEK) += realtek.o +obj-$(CONFIG_SMP) += platsmp.o diff --git a/arch/arm/mach-realtek/platsmp.c b/arch/arm/mach-realtek/platsmp.c new file mode 100644 index 000000000000..5c4368fe1520 --- /dev/null +++ b/arch/arm/mach-realtek/platsmp.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BL31_CMD 0x8400ff04 +#define BL31_DAT 0x00001619 +#define CPUID 28 +#define CORE_PWRDN_EN 0x1 + +#define CPUPWRCTLR __ACCESS_CP15(c15, 0, c2, 7) + +static u32 __iomem *cpu_release_virt; + +static int rtk_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long entry_pa = __pa_symbol(secondary_startup); + + writel_relaxed(entry_pa | (cpu << CPUID), cpu_release_virt); + + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + return 0; +} + +void rtk_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *np; + u32 release_phys; + int cpu; + + for_each_possible_cpu(cpu) { + + np = of_get_cpu_node(cpu, NULL); + if (!np) + continue; + + if (of_property_read_u32(np, "cpu-release-addr", &release_phys)) + continue; + + cpu_release_virt = ioremap(release_phys, sizeof(u32)); + + set_cpu_present(cpu, true); + } +} + +#ifdef CONFIG_HOTPLUG_CPU + +static void rtk_cpu_die(unsigned int cpu) +{ + struct arm_smccc_res res; + unsigned int cpu_pwr_ctrl; + + writel_relaxed(0x0, cpu_release_virt); + + /* notify BL31 cpu hotplug */ + arm_smccc_smc(BL31_CMD, BL31_DAT, 0, 0, 0, 0, 0, 0, &res); + v7_exit_coherency_flush(louis); + + cpu_pwr_ctrl = read_sysreg(CPUPWRCTLR); + cpu_pwr_ctrl |= CORE_PWRDN_EN; + write_sysreg(cpu_pwr_ctrl, CPUPWRCTLR); + + dsb(sy); + + for (;;) + wfi(); +} +#endif + +struct smp_operations rtk_smp_ops __initdata = { + .smp_prepare_cpus = rtk_prepare_cpus, + .smp_boot_secondary = rtk_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = rtk_cpu_die, +#endif +}; diff --git a/arch/arm/mach-realtek/platsmp.h b/arch/arm/mach-realtek/platsmp.h new file mode 100644 index 000000000000..9c411d097c14 --- /dev/null +++ b/arch/arm/mach-realtek/platsmp.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +extern struct smp_operations rtk_smp_ops; diff --git a/arch/arm/mach-realtek/realtek.c b/arch/arm/mach-realtek/realtek.c new file mode 100644 index 000000000000..d248e19f4c1d --- /dev/null +++ b/arch/arm/mach-realtek/realtek.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "platsmp.h" + +#define RBUS_BASE_PHYS (0x98000000) +#define RBUS_BASE_VIRT (0xfe000000) +#define RBUS_BASE_SIZE (0x00100000) + +static struct map_desc rtk_io_desc[] __initdata = { + { + .virtual = (unsigned long) IOMEM(RBUS_BASE_VIRT), + .pfn = __phys_to_pfn(RBUS_BASE_PHYS), + .length = RBUS_BASE_SIZE, + .type = MT_DEVICE, + }, +}; + +void __init rtk_map_io(void) +{ + debug_ll_io_init(); + iotable_init(rtk_io_desc, ARRAY_SIZE(rtk_io_desc)); +} + +static void __init rtk_dt_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static void __init rtk_timer_init(void) +{ +#ifdef CONFIG_COMMON_CLK + of_clk_init(NULL); +#endif + timer_probe(); + tick_setup_hrtimer_broadcast(); +} + +bool __init rtk_smp_init_ops(void) +{ + smp_set_ops(smp_ops(rtk_smp_ops)); + + return true; +} + +static const char *const rtd16xx_board_dt_compat[] = { + "realtek,rtd1619", + NULL, +}; + +DT_MACHINE_START(RTD16XX, "Realtek rtd16xx platform") + .map_io = rtk_map_io, + .init_machine = rtk_dt_init, + .init_time = rtk_timer_init, + .dt_compat = rtd16xx_board_dt_compat, + .smp = smp_ops(rtk_smp_ops), + .smp_init = smp_init_ops(rtk_smp_init_ops), +MACHINE_END